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Whole-tree reformat
This follows discussions from #3413. Followup commits add clang-format file, script and blame ignore lists.
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@@ -15,130 +15,127 @@
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#include <type_traits>
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namespace FEXCore {
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class LookupCache;
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class CompileService;
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}
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class LookupCache;
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class CompileService;
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} // namespace FEXCore
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namespace FEXCore::Context {
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class Context;
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class Context;
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}
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namespace FEXCore::CPU {
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class CPUBackend;
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union Relocation;
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}
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class CPUBackend;
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union Relocation;
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} // namespace FEXCore::CPU
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namespace FEXCore::Frontend {
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class Decoder;
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class Decoder;
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}
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namespace FEXCore::IR{
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class OpDispatchBuilder;
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class PassManager;
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}
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namespace FEXCore::IR {
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class OpDispatchBuilder;
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class PassManager;
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} // namespace FEXCore::IR
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namespace FEXCore::Core {
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struct DebugDataSubblock {
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uint32_t HostCodeOffset;
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uint32_t HostCodeSize;
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};
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struct DebugDataSubblock {
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uint32_t HostCodeOffset;
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uint32_t HostCodeSize;
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};
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struct DebugDataGuestOpcode {
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uint64_t GuestEntryOffset;
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ptrdiff_t HostEntryOffset;
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};
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struct DebugDataGuestOpcode {
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uint64_t GuestEntryOffset;
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ptrdiff_t HostEntryOffset;
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};
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/**
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* @brief Contains debug data for a block of code for later debugger analysis
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*
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* Needs to remain around for as long as the code could be executed at least
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*/
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struct DebugData : public FEXCore::Allocator::FEXAllocOperators {
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uint64_t HostCodeSize; ///< The size of the code generated in the host JIT
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fextl::vector<DebugDataSubblock> Subblocks;
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fextl::vector<DebugDataGuestOpcode> GuestOpcodes;
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fextl::vector<FEXCore::CPU::Relocation> *Relocations;
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};
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/**
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* @brief Contains debug data for a block of code for later debugger analysis
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*
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* Needs to remain around for as long as the code could be executed at least
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*/
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struct DebugData : public FEXCore::Allocator::FEXAllocOperators {
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uint64_t HostCodeSize; ///< The size of the code generated in the host JIT
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fextl::vector<DebugDataSubblock> Subblocks;
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fextl::vector<DebugDataGuestOpcode> GuestOpcodes;
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fextl::vector<FEXCore::CPU::Relocation>* Relocations;
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};
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// Buffered JIT symbol tracking.
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struct JITSymbolBuffer {
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// Maximum buffer size to ensure we are a page in size.
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constexpr static size_t BUFFER_SIZE = 4096 - (8 * 2);
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// Maximum distance until the end of the buffer to do a write.
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constexpr static size_t NEEDS_WRITE_DISTANCE = BUFFER_SIZE - 64;
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// Maximum time threshhold to wait before a buffer write occurs.
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constexpr static std::chrono::milliseconds MAXIMUM_THRESHOLD {100};
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// Buffered JIT symbol tracking.
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struct JITSymbolBuffer {
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// Maximum buffer size to ensure we are a page in size.
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constexpr static size_t BUFFER_SIZE = 4096 - (8 * 2);
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// Maximum distance until the end of the buffer to do a write.
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constexpr static size_t NEEDS_WRITE_DISTANCE = BUFFER_SIZE - 64;
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// Maximum time threshhold to wait before a buffer write occurs.
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constexpr static std::chrono::milliseconds MAXIMUM_THRESHOLD {100};
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JITSymbolBuffer()
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: LastWrite {std::chrono::steady_clock::now()} {
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}
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// stead_clock to ensure a monotonic increasing clock.
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// In highly stressed situations this can still cause >2% CPU time in vdso_clock_gettime.
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// If we need lower CPU time when JIT symbols are enabled then FEX can read the cycle counter directly.
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std::chrono::steady_clock::time_point LastWrite{};
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size_t Offset{};
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char Buffer[BUFFER_SIZE]{};
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};
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static_assert(sizeof(JITSymbolBuffer) == 4096, "Ensure this is one page in size");
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JITSymbolBuffer()
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: LastWrite {std::chrono::steady_clock::now()} {}
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// stead_clock to ensure a monotonic increasing clock.
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// In highly stressed situations this can still cause >2% CPU time in vdso_clock_gettime.
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// If we need lower CPU time when JIT symbols are enabled then FEX can read the cycle counter directly.
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std::chrono::steady_clock::time_point LastWrite {};
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size_t Offset {};
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char Buffer[BUFFER_SIZE] {};
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};
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static_assert(sizeof(JITSymbolBuffer) == 4096, "Ensure this is one page in size");
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struct InternalThreadState : public FEXCore::Allocator::FEXAllocOperators {
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FEXCore::Core::CpuStateFrame* const CurrentFrame = &BaseFrameState;
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struct InternalThreadState : public FEXCore::Allocator::FEXAllocOperators {
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FEXCore::Core::CpuStateFrame* const CurrentFrame = &BaseFrameState;
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struct {
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std::atomic_bool Running {false};
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std::atomic_bool WaitingToStart {true};
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std::atomic_bool EarlyExit {false};
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std::atomic_bool ThreadSleeping {false};
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} RunningEvents;
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struct {
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std::atomic_bool Running {false};
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std::atomic_bool WaitingToStart {true};
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std::atomic_bool EarlyExit {false};
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std::atomic_bool ThreadSleeping {false};
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} RunningEvents;
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FEXCore::Context::Context *CTX;
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std::atomic<SignalEvent> SignalReason{SignalEvent::Nothing};
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FEXCore::Context::Context* CTX;
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std::atomic<SignalEvent> SignalReason {SignalEvent::Nothing};
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fextl::unique_ptr<FEXCore::Threads::Thread> ExecutionThread;
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bool StartPaused {false};
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InterruptableConditionVariable StartRunning;
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Event ThreadWaiting;
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fextl::unique_ptr<FEXCore::Threads::Thread> ExecutionThread;
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bool StartPaused {false};
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InterruptableConditionVariable StartRunning;
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Event ThreadWaiting;
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fextl::unique_ptr<FEXCore::IR::OpDispatchBuilder> OpDispatcher;
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fextl::unique_ptr<FEXCore::IR::OpDispatchBuilder> OpDispatcher;
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fextl::unique_ptr<FEXCore::CPU::CPUBackend> CPUBackend;
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fextl::unique_ptr<FEXCore::LookupCache> LookupCache;
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fextl::unique_ptr<FEXCore::CPU::CPUBackend> CPUBackend;
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fextl::unique_ptr<FEXCore::LookupCache> LookupCache;
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fextl::unique_ptr<FEXCore::Frontend::Decoder> FrontendDecoder;
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fextl::unique_ptr<FEXCore::IR::PassManager> PassManager;
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FEXCore::HLE::ThreadManagement ThreadManager;
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fextl::unique_ptr<JITSymbolBuffer> SymbolBuffer;
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fextl::unique_ptr<FEXCore::Frontend::Decoder> FrontendDecoder;
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fextl::unique_ptr<FEXCore::IR::PassManager> PassManager;
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FEXCore::HLE::ThreadManagement ThreadManager;
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fextl::unique_ptr<JITSymbolBuffer> SymbolBuffer;
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int StatusCode{};
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FEXCore::Context::ExitReason ExitReason {FEXCore::Context::ExitReason::EXIT_WAITING};
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std::shared_ptr<FEXCore::CompileService> CompileService;
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int StatusCode {};
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FEXCore::Context::ExitReason ExitReason {FEXCore::Context::ExitReason::EXIT_WAITING};
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std::shared_ptr<FEXCore::CompileService> CompileService;
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std::shared_mutex ObjectCacheRefCounter{};
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std::shared_mutex ObjectCacheRefCounter {};
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struct DeferredSignalState {
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struct DeferredSignalState {
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#ifndef _WIN32
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siginfo_t Info;
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siginfo_t Info;
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#endif
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int Signal;
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};
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// Queue of thread local signal frames that have been deferred.
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// Async signals aren't guaranteed to be delivered in any particular order, but FEX treats them as FILO.
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fextl::vector<DeferredSignalState> DeferredSignalFrames;
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///< Data pointer for exclusive use by the frontend
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void* FrontendPtr;
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// BaseFrameState should always be at the end, directly before the interrupt fault page
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alignas(16) FEXCore::Core::CpuStateFrame BaseFrameState{};
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// Can be reprotected as RO to trigger an interrupt at generated code block entrypoints
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alignas(FEXCore::Utils::FEX_PAGE_SIZE) uint8_t InterruptFaultPage[FEXCore::Utils::FEX_PAGE_SIZE];
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int Signal;
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};
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static_assert((offsetof(FEXCore::Core::InternalThreadState, InterruptFaultPage) -
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offsetof(FEXCore::Core::InternalThreadState, BaseFrameState)) < 4096,
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"Fault page is outside of immediate range from CPU state");
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// static_assert(std::is_standard_layout<InternalThreadState>::value, "This needs to be standard layout");
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}
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// Queue of thread local signal frames that have been deferred.
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// Async signals aren't guaranteed to be delivered in any particular order, but FEX treats them as FILO.
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fextl::vector<DeferredSignalState> DeferredSignalFrames;
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///< Data pointer for exclusive use by the frontend
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void* FrontendPtr;
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// BaseFrameState should always be at the end, directly before the interrupt fault page
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alignas(16) FEXCore::Core::CpuStateFrame BaseFrameState {};
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// Can be reprotected as RO to trigger an interrupt at generated code block entrypoints
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alignas(FEXCore::Utils::FEX_PAGE_SIZE) uint8_t InterruptFaultPage[FEXCore::Utils::FEX_PAGE_SIZE];
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};
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static_assert(
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(offsetof(FEXCore::Core::InternalThreadState, InterruptFaultPage) - offsetof(FEXCore::Core::InternalThreadState, BaseFrameState)) < 4096,
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"Fault page is outside of immediate range from CPU state");
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// static_assert(std::is_standard_layout<InternalThreadState>::value, "This needs to be standard layout");
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} // namespace FEXCore::Core
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