diff --git a/FEXCore/Source/Interface/IR/RegisterAllocationData.h b/FEXCore/Source/Interface/IR/RegisterAllocationData.h
index 205293d1c..866ed1326 100644
--- a/FEXCore/Source/Interface/IR/RegisterAllocationData.h
+++ b/FEXCore/Source/Interface/IR/RegisterAllocationData.h
@@ -24,6 +24,12 @@ union PhysicalRegister {
     : Reg(Reg)
     , Class(Class.Val) {}
 
+  PhysicalRegister(OrderedNodeWrapper Arg)
+    : Raw(Arg.GetImmediate()) {}
+
+  PhysicalRegister(Ref Node)
+    : Raw(Node->Reg) {}
+
   static const PhysicalRegister Invalid() {
     return PhysicalRegister(InvalidClass, InvalidReg);
   }