From b28001ff2b436b08931e606e997964daedc80b66 Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Sun, 15 Mar 2020 00:24:59 -0700
Subject: [PATCH 1/2] Updates tzcnt unit test to handle more zero input cases

We weren't testing for 32bit and 16bit tzcnt with zero for the input
operand
---
 unittests/ASM/REP/F3_BC.asm | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/unittests/ASM/REP/F3_BC.asm b/unittests/ASM/REP/F3_BC.asm
index 5e6c1f4a8..4b50f830f 100644
--- a/unittests/ASM/REP/F3_BC.asm
+++ b/unittests/ASM/REP/F3_BC.asm
@@ -7,7 +7,9 @@
     "RDX": "0x40",
     "RSI": "0x0",
     "R14": "0x0",
-    "R13": "0x0"
+    "R13": "0x0",
+    "R12": "0x20",
+    "R11": "0x10"
   },
   "MemoryRegions": {
     "0x100000000": "4096"
@@ -32,7 +34,11 @@ tzcnt ebx, dword [rdx + 8 * 1]
 tzcnt rcx, qword [rdx + 8 * 2]
 
 mov r15, 0
+mov r12, 0
+mov r11, 0
 tzcnt rdx, r15
+tzcnt r12d, r15d
+tzcnt r11w, r15w
 
 mov r15, 0xFFFFFFFFFFFFFFFF
 tzcnt esi, r15d

From 2a37f5fea6f782037185e21d19a593ee09b19ee4 Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Sun, 15 Mar 2020 00:26:05 -0700
Subject: [PATCH 2/2] Fixes FindTrailingZeros IR op for <64bit sizes in x86 JIT

32bit and 16bit were returning wrong values for values of zero
---
 .../Source/Interface/Core/JIT/x86_64/JIT.cpp        | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
index 9c2f33217..f90b82a0d 100644
--- a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
+++ b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
@@ -3548,7 +3548,18 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView<true> const
         }
         case IR::OP_FINDTRAILINGZEROS: {
           auto Op = IROp->C<IR::IROp_FindTrailingZeros>();
-          tzcnt(GetDst<RA_64>(Node), GetSrc<RA_64>(Op->Header.Args[0].ID()));
+          switch (OpSize) {
+            case 2:
+              tzcnt(GetDst<RA_16>(Node), GetSrc<RA_16>(Op->Header.Args[0].ID()));
+            break;
+            case 4:
+              tzcnt(GetDst<RA_32>(Node), GetSrc<RA_32>(Op->Header.Args[0].ID()));
+              break;
+            case 8:
+              tzcnt(GetDst<RA_64>(Node), GetSrc<RA_64>(Op->Header.Args[0].ID()));
+              break;
+            default: LogMan::Msg::A("Unknown size: %d", OpSize); break;
+          }
           break;
         }
         case IR::OP_DUMMY: