diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index d844086e9..90a7015cf 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5915,6 +5915,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b01, 0xD8), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xD9), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(1, 0b01, 0xDA), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xDB), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xDC), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xDD), 1, &OpDispatchBuilder::AVXVectorALUOp}, @@ -5927,6 +5928,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b01, 0xE8), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xE9), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(1, 0b01, 0xEA), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xEB), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xEC), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xED), 1, &OpDispatchBuilder::AVXVectorALUOp}, @@ -5956,7 +5958,10 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(2, 0b01, 0x2A), 1, &OpDispatchBuilder::VMOVVectorNTOp}, {OPD(2, 0b01, 0x37), 1, &OpDispatchBuilder::AVXVectorALUOp}, - {OPD(2, 0b01, 0x3B), 1, &OpDispatchBuilder::UnimplementedOp}, + {OPD(2, 0b01, 0x38), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(2, 0b01, 0x39), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(2, 0b01, 0x3A), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(2, 0b01, 0x3B), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(2, 0b01, 0x58), 1, &OpDispatchBuilder::VBROADCASTOp<4>}, {OPD(2, 0b01, 0x59), 1, &OpDispatchBuilder::VBROADCASTOp<8>}, diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index d9288f2df..ae95defbf 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -499,6 +499,19 @@ void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); template void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); + template void OpDispatchBuilder::VectorALUROp(OpcodeArgs) { auto Size = GetSrcSize(Op); diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index df4645287..503761476 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -212,7 +212,7 @@ void InitializeVEXTables() { {OPD(1, 0b01, 0xD8), 1, X86InstInfo{"VPSUBUSB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xD9), 1, X86InstInfo{"VPSUBUSW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(1, 0b01, 0xDA), 1, X86InstInfo{"VPMINUB", TYPE_INST, FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, + {OPD(1, 0b01, 0xDA), 1, X86InstInfo{"VPMINUB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xDB), 1, X86InstInfo{"VPAND", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xDC), 1, X86InstInfo{"VPADDUSB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xDD), 1, X86InstInfo{"VPADDUSW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, @@ -234,7 +234,7 @@ void InitializeVEXTables() { {OPD(1, 0b01, 0xE8), 1, X86InstInfo{"VPSUBSB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xE9), 1, X86InstInfo{"VPSUBSW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(1, 0b01, 0xEA), 1, X86InstInfo{"VPMINSW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b01, 0xEA), 1, X86InstInfo{"VPMINSW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xEB), 1, X86InstInfo{"VPOR", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xEC), 1, X86InstInfo{"VPADDSB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xED), 1, X86InstInfo{"VPADDSW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, @@ -314,10 +314,10 @@ void InitializeVEXTables() { {OPD(2, 0b01, 0x36), 1, X86InstInfo{"VPERMD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(2, 0b01, 0x37), 1, X86InstInfo{"VPCMPGTQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(2, 0b01, 0x38), 1, X86InstInfo{"VPMINSB", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(2, 0b01, 0x39), 1, X86InstInfo{"VPMINSD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(2, 0b01, 0x3A), 1, X86InstInfo{"VPMINUW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(2, 0b01, 0x3B), 1, X86InstInfo{"VPMINUD", TYPE_INST, FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, + {OPD(2, 0b01, 0x38), 1, X86InstInfo{"VPMINSB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, + {OPD(2, 0b01, 0x39), 1, X86InstInfo{"VPMINSD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, + {OPD(2, 0b01, 0x3A), 1, X86InstInfo{"VPMINUW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, + {OPD(2, 0b01, 0x3B), 1, X86InstInfo{"VPMINUD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(2, 0b01, 0x3C), 1, X86InstInfo{"VPMAXSB", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(2, 0b01, 0x3D), 1, X86InstInfo{"VPMAXSD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(2, 0b01, 0x3E), 1, X86InstInfo{"VPMAXUW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vpminsb.asm b/unittests/ASM/VEX/vpminsb.asm new file mode 100644 index 000000000..0338352aa --- /dev/null +++ b/unittests/ASM/VEX/vpminsb.asm @@ -0,0 +1,41 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM0": ["0x4142434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"], + "XMM1": ["0x8062636465666768", "0x5152535455565758", "0x6162636465666768", "0x5152535455565758"], + "XMM2": ["0x8042434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x8042434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"], + "XMM4": ["0x8042434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x8042434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpminsb xmm2, xmm0, xmm1 +vpminsb ymm3, ymm0, ymm1 + +vpminsb xmm4, xmm0, [rdx + 32] +vpminsb ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x7172737475767778 +dq 0x4142434445464748 +dq 0x7172737475767778 + +dq 0x8062636465666768 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x5152535455565758 diff --git a/unittests/ASM/VEX/vpminsd.asm b/unittests/ASM/VEX/vpminsd.asm new file mode 100644 index 000000000..59d149ee6 --- /dev/null +++ b/unittests/ASM/VEX/vpminsd.asm @@ -0,0 +1,41 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM0": ["0x4142434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"], + "XMM1": ["0x8000000065666768", "0x5152535455565758", "0x6162636465666768", "0x5152535455565758"], + "XMM2": ["0x8000000045464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x8000000045464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"], + "XMM4": ["0x8000000045464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x8000000045464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpminsd xmm2, xmm0, xmm1 +vpminsd ymm3, ymm0, ymm1 + +vpminsd xmm4, xmm0, [rdx + 32] +vpminsd ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x7172737475767778 +dq 0x4142434445464748 +dq 0x7172737475767778 + +dq 0x8000000065666768 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x5152535455565758 diff --git a/unittests/ASM/VEX/vpminsw.asm b/unittests/ASM/VEX/vpminsw.asm new file mode 100644 index 000000000..644f55d7c --- /dev/null +++ b/unittests/ASM/VEX/vpminsw.asm @@ -0,0 +1,41 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM0": ["0x4142434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"], + "XMM1": ["0x8000636465666768", "0x5152535455565758", "0x6162636465666768", "0x5152535455565758"], + "XMM2": ["0x8000434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x8000434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"], + "XMM4": ["0x8000434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x8000434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpminsw xmm2, xmm0, xmm1 +vpminsw ymm3, ymm0, ymm1 + +vpminsw xmm4, xmm0, [rdx + 32] +vpminsw ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x7172737475767778 +dq 0x4142434445464748 +dq 0x7172737475767778 + +dq 0x8000636465666768 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x5152535455565758 diff --git a/unittests/ASM/VEX/vpminub.asm b/unittests/ASM/VEX/vpminub.asm new file mode 100644 index 000000000..02e30146d --- /dev/null +++ b/unittests/ASM/VEX/vpminub.asm @@ -0,0 +1,41 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM0": ["0x4142434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"], + "XMM1": ["0x6162636465666768", "0x5152535455565758", "0x6162636465666768", "0x5152535455565758"], + "XMM2": ["0x4142434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x4142434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"], + "XMM4": ["0x4142434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x4142434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpminub xmm2, xmm0, xmm1 +vpminub ymm3, ymm0, ymm1 + +vpminub xmm4, xmm0, [rdx + 32] +vpminub ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x7172737475767778 +dq 0x4142434445464748 +dq 0x7172737475767778 + +dq 0x6162636465666768 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x5152535455565758 diff --git a/unittests/ASM/VEX/vpminud.asm b/unittests/ASM/VEX/vpminud.asm new file mode 100644 index 000000000..d074453f9 --- /dev/null +++ b/unittests/ASM/VEX/vpminud.asm @@ -0,0 +1,41 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM0": ["0x4142434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"], + "XMM1": ["0x6162636465666768", "0x5152535455565758", "0x6162636465666768", "0x5152535455565758"], + "XMM2": ["0x4142434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x4142434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"], + "XMM4": ["0x4142434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x4142434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpminud xmm2, xmm0, xmm1 +vpminud ymm3, ymm0, ymm1 + +vpminud xmm4, xmm0, [rdx + 32] +vpminud ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x7172737475767778 +dq 0x4142434445464748 +dq 0x7172737475767778 + +dq 0x6162636465666768 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x5152535455565758 diff --git a/unittests/ASM/VEX/vpminuw.asm b/unittests/ASM/VEX/vpminuw.asm new file mode 100644 index 000000000..53a9d9431 --- /dev/null +++ b/unittests/ASM/VEX/vpminuw.asm @@ -0,0 +1,41 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM0": ["0x4142434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"], + "XMM1": ["0x6162636465666768", "0x5152535455565758", "0x6162636465666768", "0x5152535455565758"], + "XMM2": ["0x4142434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x4142434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"], + "XMM4": ["0x4142434445464748", "0x5152535455565758", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x4142434445464748", "0x5152535455565758", "0x4142434445464748", "0x5152535455565758"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpminuw xmm2, xmm0, xmm1 +vpminuw ymm3, ymm0, ymm1 + +vpminuw xmm4, xmm0, [rdx + 32] +vpminuw ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x7172737475767778 +dq 0x4142434445464748 +dq 0x7172737475767778 + +dq 0x6162636465666768 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x5152535455565758