From cbcb0034256bed78d6c869faf8505efd3b5e0aca Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 21 Oct 2026 14:03:35 -0700 Subject: [PATCH 1/2] HostFeatures: Make a stronger distinction between CPU features and Process features We want to have two distinct control knobs here. CPU features that don't change between Linux, Wow64, Arm64ec, and additional options that change depending on the process environment. This distinction was a /bit/ muddy where I added `SupportsFaultFreeSynchronousFaults` to the wrong side of that. Make it more distinct by logically splitting it out so that HostType, the fault-free-faults, and added Is64BitMode all lives together. This lets the DiskCache code which is hashing these variables look a bit nicer and also correctly logically separate the two halves. --- FEXCore/Source/Interface/Core/DiskCache.cpp | 11 +- FEXCore/Source/Interface/Core/DiskCache.h | 2 +- FEXCore/Source/Interface/Core/Frontend.cpp | 4 +- FEXCore/Source/Interface/Core/JIT/MiscOps.cpp | 2 +- .../Interface/Core/OpcodeDispatcher.cpp | 12 +-- FEXCore/include/FEXCore/Core/HostFeatures.h | 101 ++++++++++-------- Source/Common/HostFeatures.cpp | 7 +- Source/Common/HostFeatures.h | 2 +- Source/Tools/CodeSizeValidation/Main.cpp | 2 +- .../Tools/FEXInterpreter/FEXInterpreter.cpp | 2 +- Source/Tools/FEXOfflineCompiler/Main.cpp | 2 +- .../TestHarnessRunner/TestHarnessRunner.cpp | 2 +- Source/Windows/Common/CPUFeatures.cpp | 15 ++- 13 files changed, 92 insertions(+), 72 deletions(-) diff --git a/FEXCore/Source/Interface/Core/DiskCache.cpp b/FEXCore/Source/Interface/Core/DiskCache.cpp index 1ddd90568..ed63ddb62 100644 --- a/FEXCore/Source/Interface/Core/DiskCache.cpp +++ b/FEXCore/Source/Interface/Core/DiskCache.cpp @@ -409,17 +409,18 @@ namespace DiskCache { uint64_t HostFeaturesHash; } MachineBucketData = {FormatVersion, HostFeatureHash.HostFeaturesHash}; - fextl::vector BucketBytes(sizeof(MachineBucketData) + (sizeof(uint8_t) * 2) + SerializedConfig.size()); + fextl::vector BucketBytes(sizeof(MachineBucketData) + sizeof(HostFeatureHash.ProcessFeaturesHash) + SerializedConfig.size()); memcpy(BucketBytes.data(), &MachineBucketData, sizeof(MachineBucketData)); // 64-bit mode and HostType is in the ProcessBucket hash only instead of the MachineBucketHash // These effect code-gen, but they aren't part of the MachineBucketHash, as it comes from Process state. - BucketBytes[sizeof(MachineBucketData)] = CTX->Config.Is64BitMode; - BucketBytes[sizeof(MachineBucketData) + 1] = FEXCore::ToUnderlying(HostFeatureHash.HostType); - memcpy(BucketBytes.data() + sizeof(MachineBucketData) + 2, SerializedConfig.data(), SerializedConfig.size()); + memcpy(&BucketBytes[sizeof(MachineBucketData)], &HostFeatureHash.ProcessFeaturesHash, sizeof(HostFeatureHash.ProcessFeaturesHash)); + memcpy(BucketBytes.data() + sizeof(MachineBucketData) + sizeof(HostFeatureHash.ProcessFeaturesHash), SerializedConfig.data(), + SerializedConfig.size()); uint64_t MachineBucketHash = XXH3_64bits(BucketBytes.data(), sizeof(MachineBucketData)); - uint64_t ProcessBucketHash = XXH3_64bits(BucketBytes.data() + sizeof(MachineBucketData), 2 + SerializedConfig.size()); + uint64_t ProcessBucketHash = + XXH3_64bits(BucketBytes.data() + sizeof(MachineBucketData), sizeof(HostFeatureHash.ProcessFeaturesHash) + SerializedConfig.size()); BucketHash.high64 = MachineBucketHash; BucketHash.low64 = ProcessBucketHash; diff --git a/FEXCore/Source/Interface/Core/DiskCache.h b/FEXCore/Source/Interface/Core/DiskCache.h index fb4a340ab..e39f4308e 100644 --- a/FEXCore/Source/Interface/Core/DiskCache.h +++ b/FEXCore/Source/Interface/Core/DiskCache.h @@ -249,7 +249,7 @@ namespace DiskCache { // The current version of the diskcache. // This must be changed any time codegen changes occur! // Be aware of the impact of changing this frequently! - static constexpr uint16_t FormatVersion = 34; + static constexpr uint16_t FormatVersion = 35; static constexpr uint32_t LOOKUP_KEY_MAX_BUCKET_DEPTH = 500; diff --git a/FEXCore/Source/Interface/Core/Frontend.cpp b/FEXCore/Source/Interface/Core/Frontend.cpp index 78d5f1a2e..31d647a38 100644 --- a/FEXCore/Source/Interface/Core/Frontend.cpp +++ b/FEXCore/Source/Interface/Core/Frontend.cpp @@ -1352,8 +1352,8 @@ const Decoder::DecodeStream Decoder::AdjustAddrForSpecialRegion(const uint8_t* _ constexpr uint64_t VSyscall_Base = 0xFFFF'FFFF'FF60'0000ULL; constexpr uint64_t VSyscall_End = VSyscall_Base + 0x1000; - if (BlockInfo.Is64BitMode && CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux && RIP >= VSyscall_Base && - RIP < VSyscall_End) { + if (BlockInfo.Is64BitMode && CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux && + RIP >= VSyscall_Base && RIP < VSyscall_End) { // VSyscall // This doesn't exist on AArch64 and on x86_64 hosts this is emulated with faults to a region mapped with --xp permissions // Offset 0: vgettimeofday diff --git a/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp b/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp index b2dfee5bc..998f46ae7 100644 --- a/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp @@ -76,7 +76,7 @@ DEF_OP(Break) { LoadConstant(ARMEmitter::Size::i64Bit, TMP1, Constant); str(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData)); - if (CTX->HostFeatures.SupportsFaultFreeSynchronousFaults) { + if (CTX->HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults) { ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SynchronousFault)); br(TMP1); } else { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 0cf57cfe2..9a7494350 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -4884,7 +4884,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { case 0xCD: { // INT imm8 uint8_t Literal = Op->Src[0].Literal(); - if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux) { + if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux) { constexpr uint8_t SYSCALL_LITERAL = 0x80; if (Literal == SYSCALL_LITERAL) { if (Is64BitMode) [[unlikely]] { @@ -4896,8 +4896,8 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { SyscallOp(Op, false); return; } - } else if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64 || - CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { + } else if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64 || + CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { constexpr uint8_t SYSCALL_LITERAL = 0x2E; if (Literal == SYSCALL_LITERAL) { // Can be used for both 64-bit and 32-bit syscalls on windows @@ -4905,7 +4905,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { return; } - if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { + if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { // This is used when QueryPerformanceCounter is called on recent Windows versions, it causes CNTVCT to be written into RAX. constexpr uint8_t GET_CNTVCT_LITERAL = 0x81; if (Literal == GET_CNTVCT_LITERAL) { @@ -5151,7 +5151,7 @@ void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) { // - Explicitly use an MFENCE before this instruction if you want this behaviour // This instruction is not an execution fence, so subsequent instructions can execute after this // - Explicitly use an LFENCE after RDTSCP if you want to block this behaviour - if (CTX->HostFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { + if (CTX->HostFeatures.ProcessFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { // RDTSCP is unsupported on Win32 platforms if TPIDRRO isn't supported. UnimplementedOp(Op); return; @@ -5165,7 +5165,7 @@ void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) { } void OpDispatchBuilder::RDPIDOp(OpcodeArgs) { - if (CTX->HostFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { + if (CTX->HostFeatures.ProcessFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { // RDTSCP is unsupported on Win32 platforms if TPIDRRO isn't supported. UnimplementedOp(Op); return; diff --git a/FEXCore/include/FEXCore/Core/HostFeatures.h b/FEXCore/include/FEXCore/Core/HostFeatures.h index 93584c011..80897b5a3 100644 --- a/FEXCore/include/FEXCore/Core/HostFeatures.h +++ b/FEXCore/include/FEXCore/Core/HostFeatures.h @@ -14,7 +14,7 @@ namespace FEXCore { */ struct HostFeatures { // Changes code generation slightly. - enum class HostTypeEnum : uint32_t { + enum class HostTypeEnum : uint8_t { Unknown, Linux, Wow64, @@ -32,65 +32,82 @@ struct HostFeatures { return 4 << DCacheLineLog2; } + /** + * @brief This structure contains all the data required to determine hashing at the "process" level. + * Unlike the `HostFeaturesHash` below, this data changes codegen depending on if the process is Linux, Arm64EC, or Wow64. + */ + struct ProcessFeaturesHash { + HostTypeEnum HostType : 2 {}; + uint8_t SupportsFaultFreeSynchronousFaults : 1 {}; + // This only determines the starting mode a process started in. + // The process can technically long jump to-from the other modes. + uint8_t Is64BitMode : 1 {}; + uint8_t pad : 4 {}; + }; + static_assert(sizeof(ProcessFeaturesHash) == 1); + struct CacheHash { + // This hash is used to determine the "bucket" a machine goes in to. + // This should match between Linux, Arm64EC, and Wow64. uint64_t HostFeaturesHash; - HostTypeEnum HostType; + + // This hash is used to determine features that are different between process types. + ProcessFeaturesHash ProcessFeaturesHash; }; [[nodiscard]] CacheHash HashForCaching() const { - static_assert(offsetof(HostFeatures, HostType) == 8); + static_assert(offsetof(HostFeatures, ProcessFeatures) == 8); CacheHash Result {}; memcpy(&Result.HostFeaturesHash, this, sizeof(uint64_t)); - Result.HostType = HostType; + Result.ProcessFeaturesHash = ProcessFeatures; return Result; } // Affects codegen and is basically machine description. - uint32_t DCacheLineLog2 : 4 {}; - uint32_t SupportsCacheMaintenanceOps : 1 {}; - uint32_t SupportsAES : 1 {}; - uint32_t SupportsCRC : 1 {}; - uint32_t SupportsCLZERO : 1 {}; - uint32_t SupportsAtomics : 1 {}; - uint32_t SupportsRCPC : 1 {}; - uint32_t SupportsTSOImm9 : 1 {}; - uint32_t SupportsRAND : 1 {}; - uint32_t SupportsAVX : 1 {}; - uint32_t SupportsSVE128 : 1 {}; - uint32_t SupportsSVE256 : 1 {}; - uint32_t SupportsSHA : 1 {}; - uint32_t SupportsPMULL_128Bit : 1 {}; - uint32_t SupportsCSSC : 1 {}; - uint32_t SupportsFCMA : 1 {}; - uint32_t SupportsFlagM : 1 {}; - uint32_t SupportsFlagM2 : 1 {}; - uint32_t SupportsRPRES : 1 {}; - uint32_t SupportsPreserveAllABI : 1 {}; - uint32_t SupportsAES256 : 1 {}; - uint32_t SupportsSVEBitPerm : 1 {}; - uint32_t SupportsCPUIndexInTPIDRRO : 1 {}; - uint32_t SupportsFRINTTS : 1 {}; - uint32_t SupportsECV : 1 {}; - uint32_t SupportsWFXT : 1 {}; - uint32_t Supports3DNow : 1 {}; - uint32_t SupportsSSE4a : 1 {}; - uint32_t SupportsMOPS : 1 {}; - uint32_t SupportsI8MM : 1 {}; - uint32_t SupportsDotProd : 1 {}; - uint32_t PreferZVAForVZero : 1 {}; - uint32_t SupportsAFP : 1 {}; - uint32_t SupportsFloatExceptions : 1 {}; - uint32_t SupportsFaultFreeSynchronousFaults : 1 {}; - uint32_t SupportsBF16 : 1 {}; + uint32_t DCacheLineLog2 : 4 {}; + uint32_t SupportsCacheMaintenanceOps : 1 {}; + uint32_t SupportsAES : 1 {}; + uint32_t SupportsCRC : 1 {}; + uint32_t SupportsCLZERO : 1 {}; + uint32_t SupportsAtomics : 1 {}; + uint32_t SupportsRCPC : 1 {}; + uint32_t SupportsTSOImm9 : 1 {}; + uint32_t SupportsRAND : 1 {}; + uint32_t SupportsAVX : 1 {}; + uint32_t SupportsSVE128 : 1 {}; + uint32_t SupportsSVE256 : 1 {}; + uint32_t SupportsSHA : 1 {}; + uint32_t SupportsPMULL_128Bit : 1 {}; + uint32_t SupportsCSSC : 1 {}; + uint32_t SupportsFCMA : 1 {}; + uint32_t SupportsFlagM : 1 {}; + uint32_t SupportsFlagM2 : 1 {}; + uint32_t SupportsRPRES : 1 {}; + uint32_t SupportsPreserveAllABI : 1 {}; + uint32_t SupportsAES256 : 1 {}; + uint32_t SupportsSVEBitPerm : 1 {}; + uint32_t SupportsCPUIndexInTPIDRRO : 1 {}; + uint32_t SupportsFRINTTS : 1 {}; + uint32_t SupportsECV : 1 {}; + uint32_t SupportsWFXT : 1 {}; + uint32_t Supports3DNow : 1 {}; + uint32_t SupportsSSE4a : 1 {}; + uint32_t SupportsMOPS : 1 {}; + uint32_t SupportsI8MM : 1 {}; + uint32_t SupportsDotProd : 1 {}; + uint32_t PreferZVAForVZero : 1 {}; + uint32_t SupportsAFP : 1 {}; + uint32_t SupportsFloatExceptions : 1 {}; + uint32_t SupportsBF16 : 1 {}; // Flag if this is InstCountCI uint32_t IsInstCountCI : 1 {}; - uint32_t pad : 24 {}; + uint32_t pad : 25 {}; // This affects codegen, but it isn't machine state - HostTypeEnum HostType {}; + ProcessFeaturesHash ProcessFeatures {}; // MIDR information // Also used for determining number of CPU cores for CPUID diff --git a/Source/Common/HostFeatures.cpp b/Source/Common/HostFeatures.cpp index 429725006..97a0cbcee 100644 --- a/Source/Common/HostFeatures.cpp +++ b/Source/Common/HostFeatures.cpp @@ -601,7 +601,7 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe OverrideFeatures(&HostFeatures, ForceSVEWidth()); } -FEXCore::HostFeatures FetchHostFeatures() { +FEXCore::HostFeatures FetchHostFeatures(bool Is64BitMode) { FEX_CONFIG_OPT(CPUFeatureRegisters, CPUFEATUREREGISTERS); CPUFeatures Features {}; @@ -634,7 +634,10 @@ FEXCore::HostFeatures FetchHostFeatures() { FetchHostFeatures(Features, HostFeatures, true, CTR, MIDR); HostFeatures.SupportsCPUIndexInTPIDRRO = false; - HostFeatures.HostType = FEXCore::HostFeatures::HostTypeEnum::Linux; + HostFeatures.ProcessFeatures.HostType = FEXCore::HostFeatures::HostTypeEnum::Linux; + HostFeatures.ProcessFeatures.Is64BitMode = Is64BitMode; + // Fault free syncronous faults unsupported on Linux for now. + HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults = false; HostFeatures.ProcessPID = ::getpid(); return HostFeatures; } diff --git a/Source/Common/HostFeatures.h b/Source/Common/HostFeatures.h index 0fe73c9c5..667d67896 100644 --- a/Source/Common/HostFeatures.h +++ b/Source/Common/HostFeatures.h @@ -692,6 +692,6 @@ void FillMIDRInformationViaLinux(FEXCore::HostFeatures* Features); void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFeatures, bool SupportsCacheMaintenanceOps, uint64_t CTR, uint64_t MIDR); -FEXCore::HostFeatures FetchHostFeatures(); +FEXCore::HostFeatures FetchHostFeatures(bool Is64BitMode); FEX::CPUFeatures GetCPUFeaturesFromIDRegisters(); } // namespace FEX diff --git a/Source/Tools/CodeSizeValidation/Main.cpp b/Source/Tools/CodeSizeValidation/Main.cpp index 94e4c75cd..c3ed88f4e 100644 --- a/Source/Tools/CodeSizeValidation/Main.cpp +++ b/Source/Tools/CodeSizeValidation/Main.cpp @@ -702,7 +702,7 @@ int main(int argc, char** argv, char** const envp) { // Create FEXCore context. fextl::unique_ptr CTX; { - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(TestHeaderData->Bitness == 64); HostFeatures.IsInstCountCI = true; CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures); } diff --git a/Source/Tools/FEXInterpreter/FEXInterpreter.cpp b/Source/Tools/FEXInterpreter/FEXInterpreter.cpp index 52bdba1e6..2881ad9ce 100644 --- a/Source/Tools/FEXInterpreter/FEXInterpreter.cpp +++ b/Source/Tools/FEXInterpreter/FEXInterpreter.cpp @@ -550,7 +550,7 @@ int main(int argc, char** argv, char** const envp) { bool SupportsSVE256 {}; fextl::unique_ptr CTX; { - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(Loader.Is64BitMode()); CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures); SupportsAVX = HostFeatures.SupportsAVX; SupportsSVE256 = HostFeatures.SupportsSVE256; diff --git a/Source/Tools/FEXOfflineCompiler/Main.cpp b/Source/Tools/FEXOfflineCompiler/Main.cpp index 484aeb8c7..866d5d12e 100644 --- a/Source/Tools/FEXOfflineCompiler/Main.cpp +++ b/Source/Tools/FEXOfflineCompiler/Main.cpp @@ -410,7 +410,7 @@ static std::optional GenerateSingleCache(FEXCore::ExecutableFileInf // Load HostFeatures #ifndef _WIN32 - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(Is64Bit); #else const auto NtDll = GetModuleHandleW(L"ntdll.dll"); const bool IsWine = !!GetProcAddress(NtDll, "wine_get_version"); diff --git a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp index 420a03333..87e5d2d24 100644 --- a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp +++ b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp @@ -245,7 +245,7 @@ int main(int argc, char** argv, char** const envp) { bool SupportsAVX = false; FEXCore::Core::CPUState State; - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(Loader.Is64BitMode()); auto CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures); #ifndef _WIN32 diff --git a/Source/Windows/Common/CPUFeatures.cpp b/Source/Windows/Common/CPUFeatures.cpp index 4da5c0803..bc4dfb08c 100644 --- a/Source/Windows/Common/CPUFeatures.cpp +++ b/Source/Windows/Common/CPUFeatures.cpp @@ -83,16 +83,15 @@ FEXCore::HostFeatures CPUFeatures::FetchHostFeatures(bool IsWine, FEXCore::HostF HostFeatures.SupportsCPUIndexInTPIDRRO = !IsWine; - HostFeatures.HostType = HostType; HostFeatures.ProcessPID = ProcessPID; - if (HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64) { - // AVX is unsupported for WOW64 - HostFeatures.SupportsAVX = false; - } else { - // arm64ec supports synchronous faults without a double-fault dance. - HostFeatures.SupportsFaultFreeSynchronousFaults = true; - } + // AVX is unsupported for WOW64 + HostFeatures.SupportsAVX = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec; + + HostFeatures.ProcessFeatures.HostType = HostType; + HostFeatures.ProcessFeatures.Is64BitMode = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec; + // arm64ec supports synchronous faults without a double-fault dance. + HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec; return HostFeatures; } From 888bd7f55df6691db019e65644b194e1b5342b3a Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 21 Oct 2026 16:20:01 -0700 Subject: [PATCH 2/2] InstcountCI: Update --- unittests/InstructionCountCI/AFP/H0F3A.json | 2 +- unittests/InstructionCountCI/AFP/SVE256/Secondary.json | 2 +- unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json | 2 +- unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json | 2 +- unittests/InstructionCountCI/AFP/Secondary.json | 2 +- unittests/InstructionCountCI/AFP/Secondary_REP.json | 2 +- unittests/InstructionCountCI/AFP/Secondary_REPNE.json | 2 +- unittests/InstructionCountCI/AFP/VEX_map1.json | 2 +- unittests/InstructionCountCI/AFP/VEX_map3.json | 2 +- unittests/InstructionCountCI/AVX128/FMA4.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map1.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map2.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map3.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json | 2 +- unittests/InstructionCountCI/AVX128/VEX_map_group.json | 2 +- unittests/InstructionCountCI/Atomics.json | 2 +- unittests/InstructionCountCI/Crypto/H0F38.json | 2 +- unittests/InstructionCountCI/Crypto/H0F38_SVE128.json | 2 +- unittests/InstructionCountCI/Crypto/H0F3A.json | 2 +- unittests/InstructionCountCI/DDD.json | 2 +- unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json | 2 +- .../InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json | 2 +- unittests/InstructionCountCI/FEXOpt/MultiInst.json | 2 +- unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json | 2 +- unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json | 2 +- unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json | 2 +- unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json | 2 +- unittests/InstructionCountCI/FEXOpt/Peephole.json | 2 +- unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json | 2 +- unittests/InstructionCountCI/FEXOpt/libnss.json | 2 +- unittests/InstructionCountCI/FlagM/Atomics.json | 2 +- unittests/InstructionCountCI/FlagM/FlagOpts.json | 2 +- unittests/InstructionCountCI/FlagM/H0F38.json | 2 +- unittests/InstructionCountCI/FlagM/HotBlocks.json | 2 +- unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json | 2 +- unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json | 2 +- unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json | 2 +- unittests/InstructionCountCI/FlagM/Primary.json | 2 +- unittests/InstructionCountCI/FlagM/PrimaryGroup.json | 2 +- unittests/InstructionCountCI/FlagM/Primary_32Bit.json | 2 +- unittests/InstructionCountCI/FlagM/Secondary.json | 2 +- unittests/InstructionCountCI/FlagM/SecondaryGroup.json | 2 +- unittests/InstructionCountCI/FlagM/SecondaryModRM.json | 2 +- unittests/InstructionCountCI/FlagM/Secondary_OpSize.json | 2 +- unittests/InstructionCountCI/FlagM/Secondary_REP.json | 2 +- unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json | 2 +- unittests/InstructionCountCI/FlagM/VEX_map1.json | 2 +- unittests/InstructionCountCI/FlagM/VEX_map2.json | 2 +- unittests/InstructionCountCI/FlagM/VEX_map_group.json | 2 +- unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json | 2 +- unittests/InstructionCountCI/FlagM/x87-HalfLife.json | 2 +- unittests/InstructionCountCI/FlagM/x87-Oblivion.json | 2 +- unittests/InstructionCountCI/FlagM/x87-Psychonauts.json | 2 +- unittests/InstructionCountCI/FlagM/x87.json | 2 +- .../InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json | 2 +- unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json | 2 +- unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json | 2 +- unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json | 2 +- unittests/InstructionCountCI/FlagM/x87_f64.json | 2 +- unittests/InstructionCountCI/H0F38.json | 2 +- unittests/InstructionCountCI/H0F3A.json | 2 +- unittests/InstructionCountCI/H0F3A_SVE128.json | 2 +- unittests/InstructionCountCI/MOPS/Primary.json | 2 +- unittests/InstructionCountCI/Primary.json | 2 +- unittests/InstructionCountCI/PrimaryGroup.json | 2 +- unittests/InstructionCountCI/Primary_32Bit.json | 2 +- unittests/InstructionCountCI/RPRES/DDD.json | 2 +- unittests/InstructionCountCI/RPRES/Secondary.json | 2 +- unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json | 2 +- unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json | 2 +- unittests/InstructionCountCI/Repeat.json | 2 +- unittests/InstructionCountCI/SSE42_Strings.json | 2 +- unittests/InstructionCountCI/Secondary.json | 2 +- unittests/InstructionCountCI/SecondaryGroup.json | 2 +- unittests/InstructionCountCI/SecondaryModRM.json | 2 +- unittests/InstructionCountCI/Secondary_32Bit.json | 2 +- unittests/InstructionCountCI/Secondary_OpSize.json | 2 +- unittests/InstructionCountCI/Secondary_OpSize_FCMA.json | 2 +- unittests/InstructionCountCI/Secondary_OpSize_SVE128.json | 2 +- unittests/InstructionCountCI/Secondary_OpSize_SVE256.json | 2 +- unittests/InstructionCountCI/Secondary_REP.json | 2 +- unittests/InstructionCountCI/Secondary_REPNE.json | 2 +- unittests/InstructionCountCI/Secondary_REPNE_FCMA.json | 2 +- unittests/InstructionCountCI/Secondary_REPNE_SVE128.json | 2 +- unittests/InstructionCountCI/Secondary_REP_FRINTTS.json | 2 +- unittests/InstructionCountCI/Secondary_SVE128.json | 2 +- unittests/InstructionCountCI/VEX_map1.json | 2 +- unittests/InstructionCountCI/VEX_map1_FCMA.json | 2 +- unittests/InstructionCountCI/VEX_map1_FRINTTS.json | 2 +- unittests/InstructionCountCI/VEX_map2.json | 2 +- unittests/InstructionCountCI/VEX_map2_DOTPROD.json | 2 +- unittests/InstructionCountCI/VEX_map2_I8MM.json | 2 +- unittests/InstructionCountCI/VEX_map2_svebitperm.json | 2 +- unittests/InstructionCountCI/VEX_map3.json | 2 +- unittests/InstructionCountCI/VEX_map_group.json | 2 +- unittests/InstructionCountCI/X87ldst-SVE.json | 2 +- unittests/InstructionCountCI/x87.json | 2 +- unittests/InstructionCountCI/x87_32Bit.json | 2 +- unittests/InstructionCountCI/x87_f64.json | 2 +- unittests/InstructionCountCI/x87_f64_32Bit.json | 2 +- 108 files changed, 108 insertions(+), 108 deletions(-) diff --git a/unittests/InstructionCountCI/AFP/H0F3A.json b/unittests/InstructionCountCI/AFP/H0F3A.json index e2d5cc240..2e83b0cb5 100644 --- a/unittests/InstructionCountCI/AFP/H0F3A.json +++ b/unittests/InstructionCountCI/AFP/H0F3A.json @@ -8,7 +8,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "roundss xmm0, xmm1, 00000000b": { diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary.json index e7c9cd7ad..f9b71ce31 100644 --- a/unittests/InstructionCountCI/AFP/SVE256/Secondary.json +++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtpi2ps xmm0, [rax]": { diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json index 9e4b43b6c..17ed67ddb 100644 --- a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json +++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json @@ -9,7 +9,7 @@ "DisabledHostFeatures": [ "RPRES" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtsi2ss xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json index b2a228818..feca09b2e 100644 --- a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json +++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtsi2sd xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/Secondary.json b/unittests/InstructionCountCI/AFP/Secondary.json index 333a65268..b994ea673 100644 --- a/unittests/InstructionCountCI/AFP/Secondary.json +++ b/unittests/InstructionCountCI/AFP/Secondary.json @@ -8,7 +8,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtpi2ps xmm0, [rax]": { diff --git a/unittests/InstructionCountCI/AFP/Secondary_REP.json b/unittests/InstructionCountCI/AFP/Secondary_REP.json index 12bd9fca5..8a4c2266c 100644 --- a/unittests/InstructionCountCI/AFP/Secondary_REP.json +++ b/unittests/InstructionCountCI/AFP/Secondary_REP.json @@ -9,7 +9,7 @@ "SVE256", "RPRES" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtsi2ss xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/Secondary_REPNE.json b/unittests/InstructionCountCI/AFP/Secondary_REPNE.json index 6da25a197..78473ac71 100644 --- a/unittests/InstructionCountCI/AFP/Secondary_REPNE.json +++ b/unittests/InstructionCountCI/AFP/Secondary_REPNE.json @@ -8,7 +8,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtsi2sd xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/VEX_map1.json b/unittests/InstructionCountCI/AFP/VEX_map1.json index bfb4a3f40..84a7a5315 100644 --- a/unittests/InstructionCountCI/AFP/VEX_map1.json +++ b/unittests/InstructionCountCI/AFP/VEX_map1.json @@ -9,7 +9,7 @@ "DisabledHostFeatures": [ "RPRES" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vsqrtss xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AFP/VEX_map3.json b/unittests/InstructionCountCI/AFP/VEX_map3.json index 5ae5a0b15..f0d3fc4bd 100644 --- a/unittests/InstructionCountCI/AFP/VEX_map3.json +++ b/unittests/InstructionCountCI/AFP/VEX_map3.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vroundss xmm0, xmm1, 00000000b": { diff --git a/unittests/InstructionCountCI/AVX128/FMA4.json b/unittests/InstructionCountCI/AVX128/FMA4.json index 0ef58d99a..203439c33 100644 --- a/unittests/InstructionCountCI/AVX128/FMA4.json +++ b/unittests/InstructionCountCI/AVX128/FMA4.json @@ -7,7 +7,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vfmaddsubps xmm0, xmm1, xmm2, xmm3": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1.json b/unittests/InstructionCountCI/AVX128/VEX_map1.json index 9c6b648e5..08b6c79db 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1.json @@ -13,7 +13,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vmovups xmm0, xmm0": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json b/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json index 52473bcec..bf6909c05 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json @@ -9,7 +9,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vaddsubpd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json index cb7218f5d..95dd85f76 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json @@ -10,7 +10,7 @@ "FLAGM2", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vmovntps [rax], xmm0": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json index edd518922..c4a8dea88 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json @@ -10,7 +10,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vucomiss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2.json b/unittests/InstructionCountCI/AVX128/VEX_map2.json index 55186f132..db5f55702 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2.json @@ -13,7 +13,7 @@ "I8MM", "DOTPROD" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpshufb xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json b/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json index b0494bce4..22246d2a1 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json @@ -8,7 +8,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vfmadd132ss xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json b/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json index 695d30d1d..6c2fae0cf 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json @@ -12,7 +12,7 @@ "SVE256", "I8MM" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json b/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json index 00c2997fb..cc5babe6e 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json @@ -11,7 +11,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json index a3ee56283..26a47d362 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json @@ -10,7 +10,7 @@ "FLAGM2", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vmovntdqa xmm0, [rax]": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json index db299f36a..52f91db5a 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json @@ -11,7 +11,7 @@ "SVE256", "SVEBITPERM" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vtestps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3.json b/unittests/InstructionCountCI/AVX128/VEX_map3.json index 03f5697f7..d2097b688 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map3.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map3.json @@ -7,7 +7,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpermq ymm0, ymm1, 1": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json index 801958366..6629c3ab9 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json @@ -8,7 +8,7 @@ "AFP", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vblendvps xmm0, xmm1, xmm2, xmm3": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map_group.json b/unittests/InstructionCountCI/AVX128/VEX_map_group.json index 05b5ae3bb..a91819930 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map_group.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map_group.json @@ -9,7 +9,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpsrlw xmm0, xmm1, 0": { diff --git a/unittests/InstructionCountCI/Atomics.json b/unittests/InstructionCountCI/Atomics.json index 7901f83d5..23efc153e 100644 --- a/unittests/InstructionCountCI/Atomics.json +++ b/unittests/InstructionCountCI/Atomics.json @@ -9,7 +9,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "lock add byte [rax], cl": { diff --git a/unittests/InstructionCountCI/Crypto/H0F38.json b/unittests/InstructionCountCI/Crypto/H0F38.json index 3bcc7a63c..9a7facb6f 100644 --- a/unittests/InstructionCountCI/Crypto/H0F38.json +++ b/unittests/InstructionCountCI/Crypto/H0F38.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "sha1nexte xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json b/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json index 8fa168922..52885a4e1 100644 --- a/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json +++ b/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "sha1nexte xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Crypto/H0F3A.json b/unittests/InstructionCountCI/Crypto/H0F3A.json index f9ece15d1..3fcd30120 100644 --- a/unittests/InstructionCountCI/Crypto/H0F3A.json +++ b/unittests/InstructionCountCI/Crypto/H0F3A.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "pclmulqdq xmm0, xmm1, 00000b": { diff --git a/unittests/InstructionCountCI/DDD.json b/unittests/InstructionCountCI/DDD.json index 3b0136322..8deadb3dd 100644 --- a/unittests/InstructionCountCI/DDD.json +++ b/unittests/InstructionCountCI/DDD.json @@ -10,7 +10,7 @@ "AFP", "RPRES" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "These 3DNow! instructions are optimal assuming that FEX doesn't SRA MMX registers", diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json index 11563376e..4d209448f 100644 --- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json +++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json @@ -8,7 +8,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "Instructions that explicitly push against the limits of ARM's loadstore instructions" diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json index 217e77b4e..a04516c87 100644 --- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json +++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json @@ -8,7 +8,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "Instructions that explicitly push against the limits of ARM's loadstore instructions" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst.json b/unittests/InstructionCountCI/FEXOpt/MultiInst.json index 54543d1b3..9f86fb4c5 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst.json @@ -13,7 +13,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json index 6b755a4f6..6b1c3fb78 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json @@ -11,7 +11,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json index 5f4870a71..a4a34b715 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json @@ -9,7 +9,7 @@ "SVE256", "RPRES" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json index 4c6308e5f..f4ca71182 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json @@ -14,7 +14,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json index dc439a638..ab56eec0e 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json @@ -14,7 +14,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/Peephole.json b/unittests/InstructionCountCI/FEXOpt/Peephole.json index 20db0e7a3..6adfff57a 100644 --- a/unittests/InstructionCountCI/FEXOpt/Peephole.json +++ b/unittests/InstructionCountCI/FEXOpt/Peephole.json @@ -11,7 +11,7 @@ "I8MM", "DOTPROD" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "This file tracks the translations for the 'peephole' optimizations in FEX.", diff --git a/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json b/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json index dbf71a50d..e472e73f1 100644 --- a/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json +++ b/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json @@ -10,7 +10,7 @@ "FLAGM2", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "This file tracks the translations for the 'peephole' optimizations in FEX.", diff --git a/unittests/InstructionCountCI/FEXOpt/libnss.json b/unittests/InstructionCountCI/FEXOpt/libnss.json index 9262692e3..a2ea6cfad 100644 --- a/unittests/InstructionCountCI/FEXOpt/libnss.json +++ b/unittests/InstructionCountCI/FEXOpt/libnss.json @@ -12,7 +12,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [], "Instructions": { diff --git a/unittests/InstructionCountCI/FlagM/Atomics.json b/unittests/InstructionCountCI/FlagM/Atomics.json index 71ef5ed10..42f4d94a7 100644 --- a/unittests/InstructionCountCI/FlagM/Atomics.json +++ b/unittests/InstructionCountCI/FlagM/Atomics.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "lock add byte [rax], cl": { diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json index 4685b08ac..a1e469533 100644 --- a/unittests/InstructionCountCI/FlagM/FlagOpts.json +++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Chained add": { diff --git a/unittests/InstructionCountCI/FlagM/H0F38.json b/unittests/InstructionCountCI/FlagM/H0F38.json index a27f2b8f7..47cdd32aa 100644 --- a/unittests/InstructionCountCI/FlagM/H0F38.json +++ b/unittests/InstructionCountCI/FlagM/H0F38.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "ptest xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks.json b/unittests/InstructionCountCI/FlagM/HotBlocks.json index b1a5b95fd..7c33b5b0b 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "The Witcher 3": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index da81880af..bcdeef0a3 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Sonic Mania movie player": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json index dfabec23c..fd523aa20 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json @@ -10,7 +10,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "FMOD scalar loop": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json index 0f2da2ebb..e6692ecad 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "The Sims 1 hot block": { diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json index b5c555471..9c8566afd 100644 --- a/unittests/InstructionCountCI/FlagM/Primary.json +++ b/unittests/InstructionCountCI/FlagM/Primary.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "add bl, cl": { diff --git a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json index 8a1f33890..5dc10521a 100644 --- a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json +++ b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "add al, 1": { diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json index 83d45f5f6..3238fa918 100644 --- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "push es": { diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json index 32ced6d09..9eb866231 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary.json +++ b/unittests/InstructionCountCI/FlagM/Secondary.json @@ -11,7 +11,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "ucomiss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json index 2da0dfd72..12c3e05e6 100644 --- a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json +++ b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json @@ -11,7 +11,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "sgdt [rax]": { diff --git a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json index 47629ea9e..ad771321c 100644 --- a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json +++ b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json @@ -11,7 +11,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "xgetbv": { diff --git a/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json b/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json index 4ea509315..cfcde8d46 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json +++ b/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json @@ -11,7 +11,7 @@ "AFP", "FCMA" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "ucomisd xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/Secondary_REP.json b/unittests/InstructionCountCI/FlagM/Secondary_REP.json index f91b03b6e..9a95dc467 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary_REP.json +++ b/unittests/InstructionCountCI/FlagM/Secondary_REP.json @@ -12,7 +12,7 @@ "AFP", "CSSC" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "popcnt ax, bx": { diff --git a/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json b/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json index db7a975b0..69eb590a9 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json +++ b/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json @@ -12,7 +12,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "popcnt ax, bx": { diff --git a/unittests/InstructionCountCI/FlagM/VEX_map1.json b/unittests/InstructionCountCI/FlagM/VEX_map1.json index cacb72a5e..ec7314790 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map1.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map1.json @@ -12,7 +12,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vucomiss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/VEX_map2.json b/unittests/InstructionCountCI/FlagM/VEX_map2.json index cb3cfd87f..b935edfc3 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map2.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map2.json @@ -10,7 +10,7 @@ "AFP", "SVEBITPERM" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vtestps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/VEX_map_group.json b/unittests/InstructionCountCI/FlagM/VEX_map_group.json index 4410b31ae..2d9986b97 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map_group.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map_group.json @@ -9,7 +9,7 @@ "DisabledHostFeatures": [ "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "blsr eax, ebx": { diff --git a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json index 4c2f7e71d..5f0e182eb 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json +++ b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json index bcf32accf..ffbf60aaf 100644 --- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json index 16f47782d..8f978dde4 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json index 580125108..77c39af45 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index 3aa35e93e..186fb2f11 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -11,7 +11,7 @@ "CSSC", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "fadd dword [rax]": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json index 74f1e3da1..6d7a3b07f 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json index 506fe61eb..d0d7fd6cd 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json index c400dae3f..838c180fa 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json index bfb725453..f9f1ed2a9 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index a15116f4c..d1593d956 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "fadd dword [rax]": { diff --git a/unittests/InstructionCountCI/H0F38.json b/unittests/InstructionCountCI/H0F38.json index f7a670f7f..22b563ed5 100644 --- a/unittests/InstructionCountCI/H0F38.json +++ b/unittests/InstructionCountCI/H0F38.json @@ -10,7 +10,7 @@ "FLAGM2", "CRYPTO" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "pshufb mm0, mm1": { diff --git a/unittests/InstructionCountCI/H0F3A.json b/unittests/InstructionCountCI/H0F3A.json index f9f75a64a..30a4d4719 100644 --- a/unittests/InstructionCountCI/H0F3A.json +++ b/unittests/InstructionCountCI/H0F3A.json @@ -8,7 +8,7 @@ "AFP", "CRYPTO" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "SSE4.2 string instructions are skipped here.", diff --git a/unittests/InstructionCountCI/H0F3A_SVE128.json b/unittests/InstructionCountCI/H0F3A_SVE128.json index 98605a4d7..363d9f88b 100644 --- a/unittests/InstructionCountCI/H0F3A_SVE128.json +++ b/unittests/InstructionCountCI/H0F3A_SVE128.json @@ -8,7 +8,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "dpps xmm0, xmm1, 00000000b": { diff --git a/unittests/InstructionCountCI/MOPS/Primary.json b/unittests/InstructionCountCI/MOPS/Primary.json index 1142dec06..a3612285c 100644 --- a/unittests/InstructionCountCI/MOPS/Primary.json +++ b/unittests/InstructionCountCI/MOPS/Primary.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "rep movsb": { diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json index 534b87d97..8e04606aa 100644 --- a/unittests/InstructionCountCI/Primary.json +++ b/unittests/InstructionCountCI/Primary.json @@ -10,7 +10,7 @@ "FLAGM2", "MOPS" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "add bl, cl": { diff --git a/unittests/InstructionCountCI/PrimaryGroup.json b/unittests/InstructionCountCI/PrimaryGroup.json index ca768ffc9..2cf3e0753 100644 --- a/unittests/InstructionCountCI/PrimaryGroup.json +++ b/unittests/InstructionCountCI/PrimaryGroup.json @@ -9,7 +9,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "Instructions in this table that are marked optimal don't have their flag calculation part of this assumption", diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json index 70427c52b..942fffb98 100644 --- a/unittests/InstructionCountCI/Primary_32Bit.json +++ b/unittests/InstructionCountCI/Primary_32Bit.json @@ -9,7 +9,7 @@ "FlagM", "FlagM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "push es": { diff --git a/unittests/InstructionCountCI/RPRES/DDD.json b/unittests/InstructionCountCI/RPRES/DDD.json index 18c6a0089..0409777b2 100644 --- a/unittests/InstructionCountCI/RPRES/DDD.json +++ b/unittests/InstructionCountCI/RPRES/DDD.json @@ -9,7 +9,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "pfrcpv mm0, mm1": { diff --git a/unittests/InstructionCountCI/RPRES/Secondary.json b/unittests/InstructionCountCI/RPRES/Secondary.json index a1aa0870a..0b41f0c4c 100644 --- a/unittests/InstructionCountCI/RPRES/Secondary.json +++ b/unittests/InstructionCountCI/RPRES/Secondary.json @@ -9,7 +9,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "rsqrtps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json b/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json index 43a0a47c7..276474fcc 100644 --- a/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json +++ b/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json @@ -9,7 +9,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "rsqrtss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json b/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json index 24c024379..7bdcd9fcb 100644 --- a/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json +++ b/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json @@ -8,7 +8,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vrsqrtps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Repeat.json b/unittests/InstructionCountCI/Repeat.json index 64ad69487..8c0758ca8 100644 --- a/unittests/InstructionCountCI/Repeat.json +++ b/unittests/InstructionCountCI/Repeat.json @@ -6,7 +6,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": {} } diff --git a/unittests/InstructionCountCI/SSE42_Strings.json b/unittests/InstructionCountCI/SSE42_Strings.json index f30020e7d..12927d890 100644 --- a/unittests/InstructionCountCI/SSE42_Strings.json +++ b/unittests/InstructionCountCI/SSE42_Strings.json @@ -33,7 +33,7 @@ " - 1b: ECX = MSB", "[7] - Reserved" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "pcmpestrm xmm0, xmm1, 0_0_00_00_00b": { diff --git a/unittests/InstructionCountCI/Secondary.json b/unittests/InstructionCountCI/Secondary.json index 6a2ff401e..298289d42 100644 --- a/unittests/InstructionCountCI/Secondary.json +++ b/unittests/InstructionCountCI/Secondary.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Comment": [ "MMX instructions are defined as optimal without SRA being used for these instructions.", diff --git a/unittests/InstructionCountCI/SecondaryGroup.json b/unittests/InstructionCountCI/SecondaryGroup.json index 653397a4b..d4ee5624a 100644 --- a/unittests/InstructionCountCI/SecondaryGroup.json +++ b/unittests/InstructionCountCI/SecondaryGroup.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "sgdt [rax]": { diff --git a/unittests/InstructionCountCI/SecondaryModRM.json b/unittests/InstructionCountCI/SecondaryModRM.json index 10420da90..d1c5a8fe9 100644 --- a/unittests/InstructionCountCI/SecondaryModRM.json +++ b/unittests/InstructionCountCI/SecondaryModRM.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "xgetbv": { diff --git a/unittests/InstructionCountCI/Secondary_32Bit.json b/unittests/InstructionCountCI/Secondary_32Bit.json index 4f6ab1d66..faa1e73c3 100644 --- a/unittests/InstructionCountCI/Secondary_32Bit.json +++ b/unittests/InstructionCountCI/Secondary_32Bit.json @@ -7,7 +7,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "push fs": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize.json b/unittests/InstructionCountCI/Secondary_OpSize.json index a204cd2cd..6e14ecf7c 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize.json +++ b/unittests/InstructionCountCI/Secondary_OpSize.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "movupd xmm0, xmm0": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json b/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json index ff75f4416..9befdf427 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json +++ b/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "addsubpd xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json b/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json index 13fcc6eb7..ee632d3c4 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json +++ b/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json @@ -8,7 +8,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "psrlw xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json b/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json index 251a43971..4e6a50784 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json +++ b/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "pmulhuw xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REP.json b/unittests/InstructionCountCI/Secondary_REP.json index 3177b3ed6..2d0b4023b 100644 --- a/unittests/InstructionCountCI/Secondary_REP.json +++ b/unittests/InstructionCountCI/Secondary_REP.json @@ -12,7 +12,7 @@ "FRINTTS", "CSSC" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "movss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REPNE.json b/unittests/InstructionCountCI/Secondary_REPNE.json index a21e60a2f..267c4114a 100644 --- a/unittests/InstructionCountCI/Secondary_REPNE.json +++ b/unittests/InstructionCountCI/Secondary_REPNE.json @@ -10,7 +10,7 @@ "FCMA", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "movsd xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json b/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json index 5dfa44d46..8783347e7 100644 --- a/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json +++ b/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "addsubps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json b/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json index 18fc0cd4a..68d884ce8 100644 --- a/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json +++ b/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json @@ -10,7 +10,7 @@ "FCMA", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvtpd2dq xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json b/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json index 891009065..c318cb085 100644 --- a/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json +++ b/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "cvttss2si eax, xmm0": { diff --git a/unittests/InstructionCountCI/Secondary_SVE128.json b/unittests/InstructionCountCI/Secondary_SVE128.json index 0a07ff330..c813e22a0 100644 --- a/unittests/InstructionCountCI/Secondary_SVE128.json +++ b/unittests/InstructionCountCI/Secondary_SVE128.json @@ -8,7 +8,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "movmskps eax, xmm0": { diff --git a/unittests/InstructionCountCI/VEX_map1.json b/unittests/InstructionCountCI/VEX_map1.json index ce89b7a2e..969c36761 100644 --- a/unittests/InstructionCountCI/VEX_map1.json +++ b/unittests/InstructionCountCI/VEX_map1.json @@ -13,7 +13,7 @@ "FLAGM2", "FRINTTS" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vmovups xmm0, xmm0": { diff --git a/unittests/InstructionCountCI/VEX_map1_FCMA.json b/unittests/InstructionCountCI/VEX_map1_FCMA.json index c80e1acc3..cb7ab8543 100644 --- a/unittests/InstructionCountCI/VEX_map1_FCMA.json +++ b/unittests/InstructionCountCI/VEX_map1_FCMA.json @@ -8,7 +8,7 @@ "FCMA" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vaddsubpd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map1_FRINTTS.json b/unittests/InstructionCountCI/VEX_map1_FRINTTS.json index 357b0bea2..482698e8f 100644 --- a/unittests/InstructionCountCI/VEX_map1_FRINTTS.json +++ b/unittests/InstructionCountCI/VEX_map1_FRINTTS.json @@ -13,7 +13,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vcvttss2si eax, xmm0": { diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json index 61fcda1cc..e24d5f449 100644 --- a/unittests/InstructionCountCI/VEX_map2.json +++ b/unittests/InstructionCountCI/VEX_map2.json @@ -14,7 +14,7 @@ "I8MM", "DOTPROD" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpshufb xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map2_DOTPROD.json b/unittests/InstructionCountCI/VEX_map2_DOTPROD.json index 246aba7b7..9dfb6af1f 100644 --- a/unittests/InstructionCountCI/VEX_map2_DOTPROD.json +++ b/unittests/InstructionCountCI/VEX_map2_DOTPROD.json @@ -13,7 +13,7 @@ "SVEBITPERM", "I8MM" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map2_I8MM.json b/unittests/InstructionCountCI/VEX_map2_I8MM.json index ea4ac6801..3ef522c4f 100644 --- a/unittests/InstructionCountCI/VEX_map2_I8MM.json +++ b/unittests/InstructionCountCI/VEX_map2_I8MM.json @@ -12,7 +12,7 @@ "FLAGM2", "SVEBITPERM" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map2_svebitperm.json b/unittests/InstructionCountCI/VEX_map2_svebitperm.json index 0e8fc1391..5df2e0ccb 100644 --- a/unittests/InstructionCountCI/VEX_map2_svebitperm.json +++ b/unittests/InstructionCountCI/VEX_map2_svebitperm.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "pext eax, ebx, ecx": { diff --git a/unittests/InstructionCountCI/VEX_map3.json b/unittests/InstructionCountCI/VEX_map3.json index 9c9a5a9ab..2cd3be509 100644 --- a/unittests/InstructionCountCI/VEX_map3.json +++ b/unittests/InstructionCountCI/VEX_map3.json @@ -8,7 +8,7 @@ "DisabledHostFeatures": [ "AFP" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpermq ymm0, ymm1, 1": { diff --git a/unittests/InstructionCountCI/VEX_map_group.json b/unittests/InstructionCountCI/VEX_map_group.json index 8246c199e..50d12fac5 100644 --- a/unittests/InstructionCountCI/VEX_map_group.json +++ b/unittests/InstructionCountCI/VEX_map_group.json @@ -9,7 +9,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "vpsrlw xmm0, xmm1, 0": { diff --git a/unittests/InstructionCountCI/X87ldst-SVE.json b/unittests/InstructionCountCI/X87ldst-SVE.json index 8cfb9b844..18c767def 100644 --- a/unittests/InstructionCountCI/X87ldst-SVE.json +++ b/unittests/InstructionCountCI/X87ldst-SVE.json @@ -11,7 +11,7 @@ "FLAGM2", "RPRES" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "fstp tword [rax]": { diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 98c29fefe..f67e499b2 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -10,7 +10,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "fadd dword [rax]": { diff --git a/unittests/InstructionCountCI/x87_32Bit.json b/unittests/InstructionCountCI/x87_32Bit.json index 7f83d1a05..68800830e 100644 --- a/unittests/InstructionCountCI/x87_32Bit.json +++ b/unittests/InstructionCountCI/x87_32Bit.json @@ -10,7 +10,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "Multiple fld/fst": { diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index 3db53c25d..8e69a6c5a 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "fadd dword [rax]": { diff --git a/unittests/InstructionCountCI/x87_f64_32Bit.json b/unittests/InstructionCountCI/x87_f64_32Bit.json index f2ed9c421..e84633bd7 100644 --- a/unittests/InstructionCountCI/x87_f64_32Bit.json +++ b/unittests/InstructionCountCI/x87_f64_32Bit.json @@ -15,7 +15,7 @@ "SVE256", "CSSC" ], - "BinaryCacheVersion": 34 + "BinaryCacheVersion": 35 }, "Instructions": { "fstp dword [ebx*4+0x204a20]": {