diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
index 755e98339..0aa64b11a 100644
--- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
@@ -5812,8 +5812,12 @@ void InstallOpcodeHandlers() {
     {0xD5, 1, &OpDispatchBuilder::PMULOp<2, true>},
     {0xD6, 1, &OpDispatchBuilder::MOVQOp},
     {0xD7, 1, &OpDispatchBuilder::MOVMSKOp<1>}, // PMOVMSKB
+    {0xD8, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VUQSUB, 1>},
+    {0xD9, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VUQSUB, 2>},
     {0xDA, 1, &OpDispatchBuilder::PMINUOp<1>},
     {0xDB, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VAND, 16>},
+    {0xDC, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VUQADD, 1>},
+    {0xDD, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VUQADD, 2>},
     {0xDE, 1, &OpDispatchBuilder::PMAXUOp<1>},
     {0xDF, 1, &OpDispatchBuilder::ANDNOp},
     {0xE1, 1, &OpDispatchBuilder::PSRAOp<2, true, 0>},
@@ -5822,6 +5826,8 @@ void InstallOpcodeHandlers() {
     {0xE5, 1, &OpDispatchBuilder::PMULHW<true>},
     {0xE6, 1, &OpDispatchBuilder::Vector_CVT_Float_To_Int<8, true, true>},
     {0xE7, 1, &OpDispatchBuilder::MOVVectorOp},
+    {0xE8, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VSQSUB, 1>},
+    {0xE9, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VSQSUB, 2>},
     {0xEA, 1, &OpDispatchBuilder::PMINSWOp},
     {0xEB, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VOR, 16>},
     {0xEC, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VSQADD, 1>},
diff --git a/unittests/ASM/OpSize/66_D8.asm b/unittests/ASM/OpSize/66_D8.asm
new file mode 100644
index 000000000..bf5051e99
--- /dev/null
+++ b/unittests/ASM/OpSize/66_D8.asm
@@ -0,0 +1,32 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "XMM0":  ["0x2020202000000000", "0x0"],
+    "XMM1":  ["0x2020202000000000", "0x0"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+mov rdx, 0xe0000000
+
+mov rax, 0x6162636445464748
+mov [rdx + 8 * 0], rax
+mov rax, 0x5152535455565758
+mov [rdx + 8 * 1], rax
+
+mov rax, 0x4142434465666768
+mov [rdx + 8 * 2], rax
+mov rax, 0x7172737475767778
+mov [rdx + 8 * 3], rax
+
+movaps xmm0, [rdx + 8 * 0]
+movaps xmm1, [rdx + 8 * 0]
+movaps xmm2, [rdx + 8 * 2]
+
+psubusb xmm0, xmm2
+psubusb xmm1, [rdx + 8 * 2]
+
+hlt
diff --git a/unittests/ASM/OpSize/66_D9.asm b/unittests/ASM/OpSize/66_D9.asm
new file mode 100644
index 000000000..f7d3c00ad
--- /dev/null
+++ b/unittests/ASM/OpSize/66_D9.asm
@@ -0,0 +1,32 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "XMM0":  ["0x2020202000000000", "0x0"],
+    "XMM1":  ["0x2020202000000000", "0x0"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+mov rdx, 0xe0000000
+
+mov rax, 0x6162636445464748
+mov [rdx + 8 * 0], rax
+mov rax, 0x5152535455565758
+mov [rdx + 8 * 1], rax
+
+mov rax, 0x4142434465666768
+mov [rdx + 8 * 2], rax
+mov rax, 0x7172737475767778
+mov [rdx + 8 * 3], rax
+
+movaps xmm0, [rdx + 8 * 0]
+movaps xmm1, [rdx + 8 * 0]
+movaps xmm2, [rdx + 8 * 2]
+
+psubusw xmm0, xmm2
+psubusw xmm1, [rdx + 8 * 2]
+
+hlt
diff --git a/unittests/ASM/OpSize/66_DC.asm b/unittests/ASM/OpSize/66_DC.asm
new file mode 100644
index 000000000..e61abf490
--- /dev/null
+++ b/unittests/ASM/OpSize/66_DC.asm
@@ -0,0 +1,32 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "XMM0":  ["0xA2A4A6A8AAACAEB0", "0xC2C4C6C8CACCCED0"],
+    "XMM1":  ["0xA2A4A6A8AAACAEB0", "0xC2C4C6C8CACCCED0"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+mov rdx, 0xe0000000
+
+mov rax, 0x4142434445464748
+mov [rdx + 8 * 0], rax
+mov rax, 0x5152535455565758
+mov [rdx + 8 * 1], rax
+
+mov rax, 0x6162636465666768
+mov [rdx + 8 * 2], rax
+mov rax, 0x7172737475767778
+mov [rdx + 8 * 3], rax
+
+movaps xmm0, [rdx + 8 * 0]
+movaps xmm1, [rdx + 8 * 0]
+movaps xmm2, [rdx + 8 * 2]
+
+paddusb xmm0, xmm2
+paddusb xmm1, [rdx + 8 * 2]
+
+hlt
diff --git a/unittests/ASM/OpSize/66_DD.asm b/unittests/ASM/OpSize/66_DD.asm
new file mode 100644
index 000000000..2cb9a64fe
--- /dev/null
+++ b/unittests/ASM/OpSize/66_DD.asm
@@ -0,0 +1,32 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "XMM0":  ["0xA2A4A6A8AAACAEB0", "0xC2C4C6C8CACCCED0"],
+    "XMM1":  ["0xA2A4A6A8AAACAEB0", "0xC2C4C6C8CACCCED0"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+mov rdx, 0xe0000000
+
+mov rax, 0x4142434445464748
+mov [rdx + 8 * 0], rax
+mov rax, 0x5152535455565758
+mov [rdx + 8 * 1], rax
+
+mov rax, 0x6162636465666768
+mov [rdx + 8 * 2], rax
+mov rax, 0x7172737475767778
+mov [rdx + 8 * 3], rax
+
+movaps xmm0, [rdx + 8 * 0]
+movaps xmm1, [rdx + 8 * 0]
+movaps xmm2, [rdx + 8 * 2]
+
+paddusw xmm0, xmm2
+paddusw xmm1, [rdx + 8 * 2]
+
+hlt
diff --git a/unittests/ASM/OpSize/66_E8.asm b/unittests/ASM/OpSize/66_E8.asm
new file mode 100644
index 000000000..01376d555
--- /dev/null
+++ b/unittests/ASM/OpSize/66_E8.asm
@@ -0,0 +1,32 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "XMM0":  ["0xE0E0E0E0E0E0E0E0", "0xE0E0E0E0E0E0E0E0"],
+    "XMM1":  ["0xE0E0E0E0E0E0E0E0", "0xE0E0E0E0E0E0E0E0"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+mov rdx, 0xe0000000
+
+mov rax, 0x4142434445464748
+mov [rdx + 8 * 0], rax
+mov rax, 0x5152535455565758
+mov [rdx + 8 * 1], rax
+
+mov rax, 0x6162636465666768
+mov [rdx + 8 * 2], rax
+mov rax, 0x7172737475767778
+mov [rdx + 8 * 3], rax
+
+movaps xmm0, [rdx + 8 * 0]
+movaps xmm1, [rdx + 8 * 0]
+movaps xmm2, [rdx + 8 * 2]
+
+psubsb xmm0, xmm2
+psubsb xmm1, [rdx + 8 * 2]
+
+hlt
diff --git a/unittests/ASM/OpSize/66_E9.asm b/unittests/ASM/OpSize/66_E9.asm
new file mode 100644
index 000000000..b09d4846f
--- /dev/null
+++ b/unittests/ASM/OpSize/66_E9.asm
@@ -0,0 +1,32 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "XMM0":  ["0xDFE0DFE0DFE0DFE0", "0xDFE0DFE0DFE0DFE0"],
+    "XMM1":  ["0xDFE0DFE0DFE0DFE0", "0xDFE0DFE0DFE0DFE0"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+mov rdx, 0xe0000000
+
+mov rax, 0x4142434445464748
+mov [rdx + 8 * 0], rax
+mov rax, 0x5152535455565758
+mov [rdx + 8 * 1], rax
+
+mov rax, 0x6162636465666768
+mov [rdx + 8 * 2], rax
+mov rax, 0x7172737475767778
+mov [rdx + 8 * 3], rax
+
+movaps xmm0, [rdx + 8 * 0]
+movaps xmm1, [rdx + 8 * 0]
+movaps xmm2, [rdx + 8 * 2]
+
+psubsw xmm0, xmm2
+psubsw xmm1, [rdx + 8 * 2]
+
+hlt