diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index b5ed2fec7..e076eba7e 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5830,6 +5830,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b00, 0x2B), 1, &OpDispatchBuilder::VMOVVectorNTOp}, {OPD(1, 0b01, 0x2B), 1, &OpDispatchBuilder::VMOVVectorNTOp}, + {OPD(1, 0b10, 0x2D), 1, &OpDispatchBuilder::CVTFPR_To_GPR<4, true>}, + {OPD(1, 0b00, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<4>}, {OPD(1, 0b01, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<8>}, {OPD(1, 0b00, 0x2F), 1, &OpDispatchBuilder::UCOMISxOp<4>}, diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 941b967db..c2332b354 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -127,7 +127,7 @@ void InitializeVEXTables() { {OPD(1, 0b10, 0x2C), 1, X86InstInfo{"VCVTTSS2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b11, 0x2C), 1, X86InstInfo{"VCVTTSD2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(1, 0b10, 0x2D), 1, X86InstInfo{"VCVTSS2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b10, 0x2D), 1, X86InstInfo{"VCVTSS2SI", TYPE_INST, FLAGS_MODRM | FLAGS_XMM_FLAGS | FLAGS_SF_DST_GPR, 0, nullptr}}, {OPD(1, 0b11, 0x2D), 1, X86InstInfo{"VCVTSD2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b00, 0x2E), 1, X86InstInfo{"VUCOMISS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vcvtss2si.asm b/unittests/ASM/VEX/vcvtss2si.asm new file mode 100644 index 000000000..766b0be31 --- /dev/null +++ b/unittests/ASM/VEX/vcvtss2si.asm @@ -0,0 +1,46 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "RAX": "0x0000000000000001", + "RBX": "0xFFFFFFFFFFFFFFFF", + "RCX": "0x00000000FFFFFFFE", + "RDX": "0xFFFFFFFFFFFFFFFC" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea r15, [rel .data] + +vmovapd xmm0, [r15 + 8 * 0] +vmovapd xmm1, [r15 + 8 * 2] + +mov rax, -1 +mov rbx, -1 +mov rcx, -1 +mov rdx, -1 + +vcvtss2si eax, xmm0 +vcvtss2si rbx, xmm1 + +vcvtss2si ecx, [r15 + 8 * 4] +vcvtss2si rdx, [r15 + 8 * 6] + +hlt + +align 32 +.data: +dq 0x414243443F800000 +dq 0x5152535455565758 + +dq 0x41424344BF800000 +dq 0x5152535455565758 + +dq 0x41424344C0000000 +dq 0x5152535455565758 + +dq 0x41424344C0800000 +dq 0x5152535455565758