From d1ab636df1f476fd5ee0a6bbf5938b5937c306a4 Mon Sep 17 00:00:00 2001 From: lioncash Date: Wed, 7 Dec 2022 21:18:33 +0000 Subject: [PATCH 1/4] OpcodeDispatcher: Handle VUCOMISS --- .../Interface/Core/OpcodeDispatcher.cpp | 2 + .../Interface/Core/X86Tables/VEXTables.cpp | 6 +- unittests/ASM/VEX/vucomiss.asm | 61 +++++++++++++++++++ 3 files changed, 66 insertions(+), 3 deletions(-) create mode 100644 unittests/ASM/VEX/vucomiss.asm diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 09be8acc2..acbc68a6d 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5821,6 +5821,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b00, 0x2B), 1, &OpDispatchBuilder::VMOVVectorNTOp}, {OPD(1, 0b01, 0x2B), 1, &OpDispatchBuilder::VMOVVectorNTOp}, + {OPD(1, 0b00, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<4>}, + {OPD(1, 0b00, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 9326400b4..5edede43c 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -130,11 +130,11 @@ void InitializeVEXTables() { {OPD(1, 0b10, 0x2D), 1, X86InstInfo{"VCVTSS2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b11, 0x2D), 1, X86InstInfo{"VCVTSD2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(1, 0b00, 0x2E), 1, X86InstInfo{"VUCOMISS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b00, 0x2E), 1, X86InstInfo{"VUCOMISS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0x2E), 1, X86InstInfo{"VUCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(1, 0b00, 0x2F), 1, X86InstInfo{"VUCOMISS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, - {OPD(1, 0b01, 0x2F), 1, X86InstInfo{"VUCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b00, 0x2F), 1, X86InstInfo{"VCOMISS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b01, 0x2F), 1, X86InstInfo{"VCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b00, 0x58), 1, X86InstInfo{"VADDPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0x58), 1, X86InstInfo{"VADDPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vucomiss.asm b/unittests/ASM/VEX/vucomiss.asm new file mode 100644 index 000000000..43acc43ab --- /dev/null +++ b/unittests/ASM/VEX/vucomiss.asm @@ -0,0 +1,61 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "RAX": "0x4700", + "RBX": "0x0300" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovaps xmm0, [rdx + 16 * 0] +vucomiss xmm0, [rdx + 16 * 1] +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000000 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 00000000 +; 7: SF - 00000000 <- 0 +; ================ +; 00000011 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf +mov rbx, rax + +vucomiss xmm0, [rdx + 16 * 2] +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000100 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 01000000 +; 7: SF - 00000000 <- 0 +; ================ +; 01000111 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf + +hlt + +align 16 +.data: +dq 0x515253543F800000 +dq 0x5152535440000000 + +dq 0x5152535440800000 +dq 0x5152535440800000 + +dq 0x515253547FC00000 +dq 0x5152535440800000 From 83bccc00329a5f9b22273e1a92dc755caad65b69 Mon Sep 17 00:00:00 2001 From: lioncash Date: Wed, 7 Dec 2022 21:23:05 +0000 Subject: [PATCH 2/4] OpcodeDispatcher: Handle VUCOMISD --- .../Interface/Core/OpcodeDispatcher.cpp | 1 + .../Interface/Core/X86Tables/VEXTables.cpp | 2 +- unittests/ASM/VEX/vucomisd.asm | 61 +++++++++++++++++++ 3 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 unittests/ASM/VEX/vucomisd.asm diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index acbc68a6d..be3c75175 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5822,6 +5822,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b01, 0x2B), 1, &OpDispatchBuilder::VMOVVectorNTOp}, {OPD(1, 0b00, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<4>}, + {OPD(1, 0b01, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<8>}, {OPD(1, 0b00, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 5edede43c..3f4bb7aac 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -131,7 +131,7 @@ void InitializeVEXTables() { {OPD(1, 0b11, 0x2D), 1, X86InstInfo{"VCVTSD2SI", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b00, 0x2E), 1, X86InstInfo{"VUCOMISS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(1, 0b01, 0x2E), 1, X86InstInfo{"VUCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b01, 0x2E), 1, X86InstInfo{"VUCOMISD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b00, 0x2F), 1, X86InstInfo{"VCOMISS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b01, 0x2F), 1, X86InstInfo{"VCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vucomisd.asm b/unittests/ASM/VEX/vucomisd.asm new file mode 100644 index 000000000..013190b1d --- /dev/null +++ b/unittests/ASM/VEX/vucomisd.asm @@ -0,0 +1,61 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "RAX": "0x4700", + "RBX": "0x0300" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovaps xmm0, [rdx + 16 * 0] +vucomisd xmm0, [rdx + 16 * 1] ; 1.0 4.0 +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000000 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 00000000 +; 7: SF - 00000000 <- 0 +; ================ +; 00000011 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf +mov rbx, rax + +vucomisd xmm0, [rdx + 16 * 2] ; 1.0 NaN +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000100 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 01000000 +; 7: SF - 00000000 <- 0 +; ================ +; 01000111 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf + +hlt + +align 16 +.data: +dq 0x3FF0000000000000 +dq 0x4000000000000000 + +dq 0x4010000000000000 +dq 0x4010000000000000 + +dq 0x7FF8000000000000 +dq 0x4010000000000000 From 740c983f65ed9ba488f17b410734902785d2540a Mon Sep 17 00:00:00 2001 From: lioncash Date: Wed, 7 Dec 2022 21:58:35 +0000 Subject: [PATCH 3/4] OpcodeDispatcher: Handle VCOMISS --- .../Interface/Core/OpcodeDispatcher.cpp | 1 + .../Interface/Core/X86Tables/VEXTables.cpp | 2 +- unittests/ASM/VEX/vcomiss.asm | 61 +++++++++++++++++++ 3 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 unittests/ASM/VEX/vcomiss.asm diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index be3c75175..af6319f96 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5823,6 +5823,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b00, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<4>}, {OPD(1, 0b01, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<8>}, + {OPD(1, 0b00, 0x2F), 1, &OpDispatchBuilder::UCOMISxOp<4>}, {OPD(1, 0b00, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 3f4bb7aac..7d7de7eae 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -133,7 +133,7 @@ void InitializeVEXTables() { {OPD(1, 0b00, 0x2E), 1, X86InstInfo{"VUCOMISS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0x2E), 1, X86InstInfo{"VUCOMISD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(1, 0b00, 0x2F), 1, X86InstInfo{"VCOMISS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b00, 0x2F), 1, X86InstInfo{"VCOMISS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0x2F), 1, X86InstInfo{"VCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(1, 0b00, 0x58), 1, X86InstInfo{"VADDPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vcomiss.asm b/unittests/ASM/VEX/vcomiss.asm new file mode 100644 index 000000000..b22457c2b --- /dev/null +++ b/unittests/ASM/VEX/vcomiss.asm @@ -0,0 +1,61 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "RAX": "0x4700", + "RBX": "0x0300" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovaps xmm0, [rdx + 16 * 0] +vcomiss xmm0, [rdx + 16 * 1] +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000000 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 00000000 +; 7: SF - 00000000 <- 0 +; ================ +; 00000011 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf +mov rbx, rax + +vcomiss xmm0, [rdx + 16 * 2] +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000100 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 01000000 +; 7: SF - 00000000 <- 0 +; ================ +; 01000111 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf + +hlt + +align 16 +.data: +dq 0x515253543F800000 +dq 0x5152535440000000 + +dq 0x5152535440800000 +dq 0x5152535440800000 + +dq 0x515253547FC00000 +dq 0x5152535440800000 From 4aa0f3d0a45025943e112b3f154e2ff7f1571354 Mon Sep 17 00:00:00 2001 From: lioncash Date: Wed, 7 Dec 2022 22:02:23 +0000 Subject: [PATCH 4/4] OpcodeDispatcher: Handle VCOMISD --- .../Interface/Core/OpcodeDispatcher.cpp | 1 + .../Interface/Core/X86Tables/VEXTables.cpp | 2 +- unittests/ASM/VEX/vcomisd.asm | 61 +++++++++++++++++++ 3 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 unittests/ASM/VEX/vcomisd.asm diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index af6319f96..92d063a0f 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5824,6 +5824,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b00, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<4>}, {OPD(1, 0b01, 0x2E), 1, &OpDispatchBuilder::UCOMISxOp<8>}, {OPD(1, 0b00, 0x2F), 1, &OpDispatchBuilder::UCOMISxOp<4>}, + {OPD(1, 0b01, 0x2F), 1, &OpDispatchBuilder::UCOMISxOp<8>}, {OPD(1, 0b00, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp}, diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 7d7de7eae..24eef45cf 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -134,7 +134,7 @@ void InitializeVEXTables() { {OPD(1, 0b01, 0x2E), 1, X86InstInfo{"VUCOMISD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b00, 0x2F), 1, X86InstInfo{"VCOMISS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(1, 0b01, 0x2F), 1, X86InstInfo{"VCOMISD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b01, 0x2F), 1, X86InstInfo{"VCOMISD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b00, 0x58), 1, X86InstInfo{"VADDPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0x58), 1, X86InstInfo{"VADDPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vcomisd.asm b/unittests/ASM/VEX/vcomisd.asm new file mode 100644 index 000000000..605151ffd --- /dev/null +++ b/unittests/ASM/VEX/vcomisd.asm @@ -0,0 +1,61 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "RAX": "0x4700", + "RBX": "0x0300" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovaps xmm0, [rdx + 16 * 0] +vcomisd xmm0, [rdx + 16 * 1] ; 1.0 4.0 +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000100 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 00000000 +; 7: SF - 00000000 <- 0 +; ================ +; 00000111 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf +mov rbx, rax + +vcomisd xmm0, [rdx + 16 * 2] ; 1.0 NaN +; 0: CF - 00000001 +; 1: - 00000010 +; 2: PF - 00000100 +; 3: 0 - 00000000 +; 4: AF - 00000000 <- 0 +; 5: 0 - 00000000 +; 6: ZF - 01000000 +; 7: SF - 00000000 <- 0 +; ================ +; 01000111 +; OF: LAHF doesn't load - 0 + +mov rax, 0 +lahf + +hlt + +align 16 +.data: +dq 0x3FF0000000000000 +dq 0x4000000000000000 + +dq 0x4010000000000000 +dq 0x4010000000000000 + +dq 0x7FF8000000000000 +dq 0x4010000000000000