diff --git a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterClass.h b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterClass.h
index 2ab48688d..c8e6ca606 100644
--- a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterClass.h
+++ b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterClass.h
@@ -42,16 +42,10 @@ private:
   bool HandleGuestSignal(int Signal, void *info, void *ucontext, SignalDelegator::GuestSigAction *GuestAction, stack_t *GuestStack);
 
   template<typename Res>
-  Res GetDest(IR::OrderedNodeWrapper Op);
+  Res GetDest(void* SSAData, IR::OrderedNodeWrapper Op);
 
   template<typename Res>
-  Res GetSrc(IR::OrderedNodeWrapper Src);
-
-  std::vector<uint8_t> TmpSpace;
-  DestMapType DestMap;
-  size_t TmpOffset{};
-
-  FEXCore::IR::IRListView<true> *CurrentIR;
+  Res GetSrc(void* SSAData, IR::OrderedNodeWrapper Src);
 
   DispatchGenerator *Generator{};
 };
diff --git a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp
index 945541c2c..9ff93c517 100644
--- a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp
+++ b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp
@@ -44,10 +44,6 @@ InterpreterCore::InterpreterCore(FEXCore::Context::Context *ctx, FEXCore::Core::
   : CTX {ctx}
   , State {Thread} {
   // Grab our space for temporary data
-  TmpSpace.resize(4096 * 32);
-#if !DESTMAP_AS_MAP
-  DestMap.resize(4096);
-#endif
 
   CreateAsmDispatch(ctx, Thread);
   CTX->SignalDelegation.RegisterHostSignalHandler(SignalDelegator::SIGNAL_FOR_PAUSE, [](FEXCore::Core::InternalThreadState *Thread, int Signal, void *info, void *ucontext) -> bool {
@@ -69,43 +65,15 @@ InterpreterCore::~InterpreterCore() {
   DeleteAsmDispatch();
 }
 
-uint32_t InterpreterCore::AllocateTmpSpace(size_t Size) {
-  // XXX: IR generation has a bug where the size can periodically end up being zero
-  // LogMan::Throw::A(Size !=0, "Dest Op had zero destination size");
-
-  // Some IR ops rely on the upper bits of registers being allocaed and zeroed
-  // to do an implicit zero extend
-  Size = Size < 16 ? 16 : Size;
-
-  // Force alignment by size
-  size_t NewBase = AlignUp(TmpOffset, Size);
-  size_t NewEnd = NewBase + Size;
-
-  if (NewEnd >= TmpSpace.size()) {
-    // If we are going to overrun the end of our temporary space then double the size of it
-    TmpSpace.resize(TmpSpace.size() * 2);
-  }
-
-  // Make sure to set the new offset
-  TmpOffset = NewEnd;
-
-  return NewBase;
-}
-
 template<typename Res>
-Res InterpreterCore::GetDest(IR::OrderedNodeWrapper Op) {
-  auto DstPtr = &TmpSpace.at(DestMap[Op.ID()]);
+Res InterpreterCore::GetDest(void* SSAData, IR::OrderedNodeWrapper Op) {
+  auto DstPtr = &reinterpret_cast<__uint128_t*>(SSAData)[Op.ID()];
   return reinterpret_cast<Res>(DstPtr);
 }
 
 template<typename Res>
-Res InterpreterCore::GetSrc(IR::OrderedNodeWrapper Src) {
-#if DESTMAP_AS_MAP
-  LogMan::Throw::A(DestMap.find(Src.ID()) != DestMap.end(), "Op had source but it wasn't in the destination map");
-#endif
-
-  auto DstPtr = &TmpSpace.at(DestMap[Src.ID()]);
-  LogMan::Throw::A(DstPtr != nullptr, "Destmap had slot but didn't get allocated memory");
+Res InterpreterCore::GetSrc(void* SSAData, IR::OrderedNodeWrapper Src) {
+  auto DstPtr = &reinterpret_cast<__uint128_t*>(SSAData)[Src.ID()];
   return reinterpret_cast<Res>(DstPtr);
 }
 
@@ -115,22 +83,13 @@ void *InterpreterCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView<true
 
 void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
   auto IR = Thread->IRLists.find(Thread->State.State.rip);
-  CurrentIR = IR->second.get();
+  auto CurrentIR = IR->second.get();
 
-  TmpOffset = 0; // Reset where we are in the temp data range
+  uintptr_t ListSize = CurrentIR->GetSSACount();
 
   uintptr_t ListBegin = CurrentIR->GetListData();
   uintptr_t DataBegin = CurrentIR->GetData();
 
-#if DESTMAP_AS_MAP
-  DestMap.clear();
-#else
-  uintptr_t ListSize = CurrentIR->GetSSACount();
-  if (ListSize > DestMap.size()) {
-    DestMap.resize(std::max(DestMap.size() * 2, ListSize));
-  }
-#endif
-
   static_assert(sizeof(FEXCore::IR::IROp_Header) == 4);
   static_assert(sizeof(FEXCore::IR::OrderedNode) == 16);
 
@@ -142,8 +101,14 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
   IR::OrderedNode const *BlockNode = HeaderOp->Blocks.GetNode(ListBegin);
 
-#define GD *GetDest<uint64_t*>(*WrapperOp)
-#define GDP GetDest<void*>(*WrapperOp)
+  // Allocate 16 bytes per SSA
+  void *SSAData = alloca(ListSize * 16);
+
+  // Clear them all to zero. Required for Zero-extend semantics
+  memset(SSAData, 0, ListSize * 16);
+
+#define GD *GetDest<uint64_t*>(SSAData, WrapperOp)
+#define GDP GetDest<void*>(SSAData, WrapperOp)
   auto GetOpSize = [&](IR::OrderedNodeWrapper Node) {
     FEXCore::IR::OrderedNode const *RealNode = Node.GetNode(ListBegin);
     FEXCore::IR::IROp_Header const *IROp = RealNode->Op(DataBegin);
@@ -165,17 +130,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
     auto HandleBlock = [&]() {
       while (1) {
-        OrderedNodeWrapper *WrapperOp = CodeBegin();
-        OrderedNode *RealNode = WrapperOp->GetNode(ListBegin);
+        OrderedNodeWrapper WrapperOp = *CodeBegin();
+        OrderedNode *RealNode = WrapperOp.GetNode(ListBegin);
         FEXCore::IR::IROp_Header *IROp = RealNode->Op(DataBegin);
         uint8_t OpSize = IROp->Size;
-        uint32_t Node = WrapperOp->ID();
-
-        if (IROp->HasDest) {
-          DestMap[Node] = AllocateTmpSpace(OpSize);
-          // Clear any previous results
-          memset(GDP, 0, 16);
-        }
+        uint32_t Node = WrapperOp.ID();
 
         switch (IROp->Op) {
           case IR::OP_DUMMY:
@@ -208,7 +167,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             break;
           case IR::OP_CONDJUMP: {
             auto Op = IROp->C<IR::IROp_CondJump>();
-            uint64_t Arg = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t Arg = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
             if (!!Arg) {
               BlockNode = Op->Header.Args[1].GetNode(ListBegin);
             }
@@ -246,7 +205,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             FEXCore::HLE::SyscallArguments Args;
             for (size_t j = 0; j < FEXCore::HLE::SyscallArguments::MAX_ARGS; ++j) {
               if (Op->Header.Args[j].IsInvalid()) break;
-              Args.Argument[j] = *GetSrc<uint64_t*>(Op->Header.Args[j]);
+              Args.Argument[j] = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[j]);
             }
 
             uint64_t Res = FEXCore::HandleSyscall(CTX->SyscallHandler.get(), Thread, &Args);
@@ -258,14 +217,14 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
             //LogMan::Msg::D("Thunk function: %s, %p, %p\n", Op->ThunkName, Op->ThunkFnPtr, *GetSrc<void**>(Op->Header.Args[0]));
 
-            reinterpret_cast<ThunkedFunction*>(Op->ThunkFnPtr)(CTX, *GetSrc<void**>(Op->Header.Args[0]));
+            reinterpret_cast<ThunkedFunction*>(Op->ThunkFnPtr)(CTX, *GetSrc<void**>(SSAData, Op->Header.Args[0]));
 
             break;
           }
           case IR::OP_CPUID: {
             auto Op = IROp->C<IR::IROp_CPUID>();
-            uint64_t *DstPtr = GetDest<uint64_t*>(*WrapperOp);
-            uint64_t Arg = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t *DstPtr = GetDest<uint64_t*>(SSAData, WrapperOp);
+            uint64_t Arg = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
 
             auto Results = CTX->CPUID.RunFunction(Arg);
             memcpy(DstPtr, &Results, sizeof(uint32_t) * 4);
@@ -275,11 +234,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             auto Op = IROp->C<IR::IROp_Print>();
 
             if (OpSize <= 8) {
-              uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+              uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
               LogMan::Msg::I(">>>> Value in Arg: 0x%lx, %ld", Src, Src);
             }
             else if (OpSize == 16) {
-              __uint128_t Src = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+              __uint128_t Src = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
               uint64_t Src0 = Src;
               uint64_t Src1 = Src >> 64;
               LogMan::Msg::I(">>>> Value[0] in Arg: 0x%lx, %ld", Src0, Src0);
@@ -301,17 +260,17 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_MOV: {
             auto Op = IROp->C<IR::IROp_Mov>();
-            memcpy(GDP, GetSrc<void*>(Op->Header.Args[0]), OpSize);
+            memcpy(GDP, GetSrc<void*>(SSAData, Op->Header.Args[0]), OpSize);
             break;
           }
           case IR::OP_VBITCAST: {
             auto Op = IROp->C<IR::IROp_VBitcast>();
-            memcpy(GDP, GetSrc<void*>(Op->Header.Args[0]), 16);
+            memcpy(GDP, GetSrc<void*>(SSAData, Op->Header.Args[0]), 16);
             break;
           }
           case IR::OP_VCASTFROMGPR: {
             auto Op = IROp->C<IR::IROp_VCastFromGPR>();
-            memcpy(GDP, GetSrc<void*>(Op->Header.Args[0]), Op->Header.ElementSize);
+            memcpy(GDP, GetSrc<void*>(SSAData, Op->Header.Args[0]), Op->Header.ElementSize);
             break;
           }
           case IR::OP_VEXTRACTTOGPR: {
@@ -326,7 +285,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               if (Op->Header.ElementSize == 8)
                 SourceMask = ~0ULL;
 
-              __uint128_t Src = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+              __uint128_t Src = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
               Src >>= Shift;
               Src &= SourceMask;
               memcpy(GDP, &Src, Op->Header.ElementSize);
@@ -337,7 +296,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               if (Op->Header.ElementSize == 8)
                 SourceMask = ~0ULL;
 
-              uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+              uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
               Src >>= Shift;
               Src &= SourceMask;
               GD = Src;
@@ -353,7 +312,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               if (Op->Header.ElementSize == 8)
                 SourceMask = ~0ULL;
 
-              __uint128_t Src = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+              __uint128_t Src = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
               Src >>= Shift;
               Src &= SourceMask;
               memcpy(GDP, &Src, Op->Header.ElementSize);
@@ -364,7 +323,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               if (Op->Header.ElementSize == 8)
                 SourceMask = ~0ULL;
 
-              uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+              uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
               Src >>= Shift;
               Src &= SourceMask;
               GD = Src;
@@ -404,7 +363,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_LOADCONTEXTINDEXED: {
             auto Op = IROp->C<IR::IROp_LoadContextIndexed>();
-            uint64_t Index = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t Index = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
 
             uintptr_t ContextPtr = reinterpret_cast<uintptr_t>(&Thread->State.State);
             ContextPtr += Op->BaseOffset;
@@ -438,20 +397,20 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             ContextPtr += Op->Offset;
 
             void *Data = reinterpret_cast<void*>(ContextPtr);
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             memcpy(Data, Src, OpSize);
             break;
           }
           case IR::OP_STORECONTEXTINDEXED: {
             auto Op = IROp->C<IR::IROp_StoreContextIndexed>();
-            uint64_t Index = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Index = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             uintptr_t ContextPtr = reinterpret_cast<uintptr_t>(&Thread->State.State);
             ContextPtr += Op->BaseOffset;
             ContextPtr += Index * Op->Stride;
 
             void *Data = reinterpret_cast<void*>(ContextPtr);
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             memcpy(Data, Src, Op->Size);
             break;
           }
@@ -472,14 +431,14 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             ContextPtr += Op->Offset;
 
             void *Data = reinterpret_cast<void*>(ContextPtr);
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             memcpy(Data, Src, Op->Size * 2);
             break;
           }
           case IR::OP_CREATEELEMENTPAIR: {
             auto Op = IROp->C<IR::IROp_CreateElementPair>();
-            void *Src_Lower = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src_Upper = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src_Lower = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src_Upper = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             memcpy(GDP, Src_Lower, Op->Header.Size);
             memcpy(reinterpret_cast<void*>(reinterpret_cast<uint64_t>(GDP) + Op->Header.Size),
@@ -488,7 +447,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_EXTRACTELEMENTPAIR: {
             auto Op = IROp->C<IR::IROp_ExtractElementPair>();
-            uintptr_t Src = GetSrc<uintptr_t>(Op->Header.Args[0]);
+            uintptr_t Src = GetSrc<uintptr_t>(SSAData, Op->Header.Args[0]);
             memcpy(GDP,
               reinterpret_cast<void*>(Src + Op->Header.Size * Op->Element), Op->Header.Size);
             break;
@@ -501,15 +460,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = GetSrc<std::atomic<uint64_t> *>(Op->Header.Args[2]);
+                  Data = GetSrc<std::atomic<uint64_t> *>(SSAData, Op->Header.Args[2]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[2]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[2]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
                 }
 
-                uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-                uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+                uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
                 uint64_t Expected = Src1;
                 bool Result = Data->compare_exchange_strong(Expected, Src2);
@@ -519,15 +478,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<__uint128_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = GetSrc<std::atomic<__uint128_t> *>(Op->Header.Args[2]);
+                  Data = GetSrc<std::atomic<__uint128_t> *>(SSAData, Op->Header.Args[2]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<__uint128_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[2]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[2]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<__uint128_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
                 }
 
-                __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-                __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+                __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+                __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
 
                 __uint128_t Expected = Src1;
                 bool Result = Data->compare_exchange_strong(Expected, Src2);
@@ -543,7 +502,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
             switch (Op->Size) {
               case 4: {
-                uint64_t *Src = GetSrc<uint64_t*>(Op->Header.Args[0]);
+                uint64_t *Src = GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
                 uint64_t Result{};
                 Result = Src[0] & ~0U;
                 Result |= Src[1] << 32;
@@ -566,7 +525,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_STOREFLAG: {
             auto Op = IROp->C<IR::IROp_StoreFlag>();
-            uint8_t Arg = *GetSrc<uint8_t*>(Op->Header.Args[0]) & 1;
+            uint8_t Arg = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[0]) & 1;
 
             uintptr_t ContextPtr = reinterpret_cast<uintptr_t>(&Thread->State.State);
             ContextPtr += offsetof(FEXCore::Core::CPUState, flags[0]);
@@ -580,11 +539,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             auto Op = IROp->C<IR::IROp_LoadMem>();
             void const *Data{};
             if (Thread->CTX->Config.UnifiedMemory) {
-              Data = *GetSrc<void const**>(Op->Header.Args[0]);
+              Data = *GetSrc<void const**>(SSAData, Op->Header.Args[0]);
             }
             else {
-              Data = Thread->CTX->MemoryMapper.GetPointer<void const*>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-              LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+              Data = Thread->CTX->MemoryMapper.GetPointer<void const*>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+              LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
             }
             memcpy(GDP, Data, OpSize);
             break;
@@ -593,14 +552,14 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             auto Op = IROp->C<IR::IROp_VLoadMemElement>();
             void const *Data{};
             if (Thread->CTX->Config.UnifiedMemory) {
-              Data = *GetSrc<void const**>(Op->Header.Args[0]);
+              Data = *GetSrc<void const**>(SSAData, Op->Header.Args[0]);
             }
             else {
-              Data = Thread->CTX->MemoryMapper.GetPointer<void const*>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-              LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+              Data = Thread->CTX->MemoryMapper.GetPointer<void const*>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+              LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
             }
 
-            memcpy(GDP, GetSrc<void*>(Op->Header.Args[1]), 16);
+            memcpy(GDP, GetSrc<void*>(SSAData, Op->Header.Args[1]), 16);
             memcpy(reinterpret_cast<void*>(reinterpret_cast<uintptr_t>(GDP) + (Op->Header.ElementSize * Op->Index)),
               Data, Op->Header.ElementSize);
             break;
@@ -611,13 +570,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case x: { \
                 y *Data{}; \
                 if (Thread->CTX->Config.UnifiedMemory) { \
-                  Data = *GetSrc<y**>(Op->Header.Args[0]); \
+                  Data = *GetSrc<y**>(SSAData, Op->Header.Args[0]); \
                 } \
                 else { \
-                  Data = Thread->CTX->MemoryMapper.GetPointer<y*>(*GetSrc<uint64_t*>(Op->Header.Args[0])); \
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0])); \
+                  Data = Thread->CTX->MemoryMapper.GetPointer<y*>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0])); \
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0])); \
                 } \
-                memcpy(Data, GetSrc<y*>(Op->Header.Args[1]), sizeof(y)); \
+                memcpy(Data, GetSrc<y*>(SSAData, Op->Header.Args[1]), sizeof(y)); \
                 break; \
               }
 
@@ -631,14 +590,14 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 16: {
                 void *Data{};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<void**>(Op->Header.Args[0]);
+                  Data = *GetSrc<void**>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<void*>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<void*>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
 
-                void *Src = GetSrc<void*>(Op->Header.Args[1]);
+                void *Src = GetSrc<void*>(SSAData, Op->Header.Args[1]);
                 memcpy(Data, Src, 16);
                 break;
               }
@@ -652,13 +611,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case x: { \
                 y *Data{}; \
                 if (Thread->CTX->Config.UnifiedMemory) { \
-                  Data = *GetSrc<y**>(Op->Header.Args[0]); \
+                  Data = *GetSrc<y**>(SSAData, Op->Header.Args[0]); \
                 } \
                 else { \
-                  Data = Thread->CTX->MemoryMapper.GetPointer<y*>(*GetSrc<uint64_t*>(Op->Header.Args[0])); \
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0])); \
+                  Data = Thread->CTX->MemoryMapper.GetPointer<y*>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0])); \
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0])); \
                 } \
-                memcpy(Data, &GetSrc<y*>(Op->Header.Args[1])[Op->Index], sizeof(y)); \
+                memcpy(Data, &GetSrc<y*>(SSAData, Op->Header.Args[1])[Op->Index], sizeof(y)); \
                 break; \
               }
 
@@ -685,8 +644,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_ADD: {
             auto Op = IROp->C<IR::IROp_Add>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             auto Func = [](auto a, auto b) { return a + b; };
 
             switch (OpSize) {
@@ -698,8 +657,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_SUB: {
             auto Op = IROp->C<IR::IROp_Sub>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             auto Func = [](auto a, auto b) { return a - b; };
 
             switch (OpSize) {
@@ -711,7 +670,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_NEG: {
             auto Op = IROp->C<IR::IROp_Neg>();
-            uint64_t Src = *GetSrc<int64_t*>(Op->Header.Args[0]);
+            uint64_t Src = *GetSrc<int64_t*>(SSAData, Op->Header.Args[0]);
             switch (OpSize) {
               case 4:
                 GD = -static_cast<int32_t>(Src);
@@ -725,8 +684,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_OR: {
             auto Op = IROp->C<IR::IROp_Or>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             auto Func = [](auto a, auto b) { return a | b; };
 
             switch (OpSize) {
@@ -741,8 +700,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_AND: {
             auto Op = IROp->C<IR::IROp_And>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             auto Func = [](auto a, auto b) { return a & b; };
 
             switch (OpSize) {
@@ -756,8 +715,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_XOR: {
             auto Op = IROp->C<IR::IROp_Xor>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             auto Func = [](auto a, auto b) { return a ^ b; };
 
             switch (OpSize) {
@@ -771,8 +730,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_LSHL: {
             auto Op = IROp->C<IR::IROp_Lshl>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             uint8_t Mask = OpSize * 8 - 1;
             switch (OpSize) {
               case 4:
@@ -787,16 +746,16 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_LSHR: {
             auto Op = IROp->C<IR::IROp_Lshr>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             uint8_t Mask = OpSize * 8 - 1;
             GD = Src1 >> (Src2 & Mask);
             break;
           }
           case IR::OP_ASHR: {
             auto Op = IROp->C<IR::IROp_Ashr>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             uint8_t Mask = OpSize * 8 - 1;
             switch (OpSize) {
               case 1:
@@ -817,8 +776,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_ROR: {
             auto Op = IROp->C<IR::IROp_Ror>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             auto Ror = [] (auto In, auto R) {
             auto RotateMask = sizeof(In) * 8 - 1;
               R &= RotateMask;
@@ -845,8 +804,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_ROL: {
             auto Op = IROp->C<IR::IROp_Rol>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             auto Rol = [] (auto In, auto R) {
             auto RotateMask = sizeof(In) * 8 - 1;
               R &= RotateMask;
@@ -873,7 +832,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_NOT: {
             auto Op = IROp->C<IR::IROp_Not>();
-            uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
             const uint64_t mask[9]= { 0, 0xFF, 0xFFFF, 0, 0xFFFFFFFF, 0, 0, 0, 0xFFFFFFFFFFFFFFFFULL };
             uint64_t Mask = mask[OpSize];
             GD = (~Src) & Mask;
@@ -884,16 +843,16 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             LogMan::Throw::A(Op->SrcSize <= 64, "Can't support Zext of size: %ld", Op->SrcSize);
             switch (Op->SrcSize / 8) {
               case 1:
-                GD = *GetSrc<int8_t*>(Op->Header.Args[0]);
+                GD = *GetSrc<int8_t*>(SSAData, Op->Header.Args[0]);
                 break;
               case 2:
-                GD = *GetSrc<int16_t*>(Op->Header.Args[0]);
+                GD = *GetSrc<int16_t*>(SSAData, Op->Header.Args[0]);
                 break;
               case 4:
-                GD = *GetSrc<int32_t*>(Op->Header.Args[0]);
+                GD = *GetSrc<int32_t*>(SSAData, Op->Header.Args[0]);
                 break;
               case 8:
-                GD = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+                GD = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
                 break;
               default: LogMan::Msg::A("Unknown Sext size: %d", Op->SrcSize / 8);
             }
@@ -901,8 +860,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_MUL: {
             auto Op = IROp->C<IR::IROp_Mul>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1:
@@ -928,8 +887,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_MULH: {
             auto Op = IROp->C<IR::IROp_MulH>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1: {
@@ -958,8 +917,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_UMUL: {
             auto Op = IROp->C<IR::IROp_UMul>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1:
@@ -985,8 +944,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_UMULH: {
             auto Op = IROp->C<IR::IROp_UMulH>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             switch (OpSize) {
               case 1:
                 GD = static_cast<uint16_t>(Src1) * static_cast<uint16_t>(Src2);
@@ -1017,8 +976,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_DIV: {
             auto Op = IROp->C<IR::IROp_Div>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1:
@@ -1034,7 +993,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 GD = static_cast<int64_t>(Src1) / static_cast<int64_t>(Src2);
                 break;
               case 16: {
-                __int128_t Tmp = *GetSrc<__int128_t*>(Op->Header.Args[0]) / *GetSrc<__int128_t*>(Op->Header.Args[1]);
+                __int128_t Tmp = *GetSrc<__int128_t*>(SSAData, Op->Header.Args[0]) / *GetSrc<__int128_t*>(SSAData, Op->Header.Args[1]);
                 memcpy(GDP, &Tmp, 16);
                 break;
               }
@@ -1044,8 +1003,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_UDIV: {
             auto Op = IROp->C<IR::IROp_UDiv>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1:
@@ -1061,7 +1020,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 GD = static_cast<uint64_t>(Src1) / static_cast<uint64_t>(Src2);
                 break;
               case 16: {
-                __uint128_t Tmp = *GetSrc<__uint128_t*>(Op->Header.Args[0]) / *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+                __uint128_t Tmp = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]) / *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
                 memcpy(GDP, &Tmp, 16);
                 break;
               }
@@ -1071,8 +1030,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_REM: {
             auto Op = IROp->C<IR::IROp_Rem>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1:
@@ -1088,7 +1047,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 GD = static_cast<int64_t>(Src1) % static_cast<int64_t>(Src2);
                 break;
               case 16: {
-                __int128_t Tmp = *GetSrc<__int128_t*>(Op->Header.Args[0]) % *GetSrc<__int128_t*>(Op->Header.Args[1]);
+                __int128_t Tmp = *GetSrc<__int128_t*>(SSAData, Op->Header.Args[0]) % *GetSrc<__int128_t*>(SSAData, Op->Header.Args[1]);
                 memcpy(GDP, &Tmp, 16);
                 break;
               }
@@ -1098,8 +1057,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_UREM: {
             auto Op = IROp->C<IR::IROp_URem>();
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
             switch (OpSize) {
               case 1:
@@ -1115,7 +1074,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 GD = static_cast<uint64_t>(Src1) % static_cast<uint64_t>(Src2);
                 break;
               case 16: {
-                __uint128_t Tmp = *GetSrc<__uint128_t*>(Op->Header.Args[0]) % *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+                __uint128_t Tmp = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]) % *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
                 memcpy(GDP, &Tmp, 16);
                 break;
               }
@@ -1125,13 +1084,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_POPCOUNT: {
             auto Op = IROp->C<IR::IROp_Popcount>();
-            uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
             GD = __builtin_popcountl(Src);
             break;
           }
           case IR::OP_FINDLSB: {
             auto Op = IROp->C<IR::IROp_FindLSB>();
-            uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
             uint64_t Result = __builtin_ffsll(Src);
             GD = Result - 1;
             break;
@@ -1139,10 +1098,10 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_FINDMSB: {
             auto Op = IROp->C<IR::IROp_FindMSB>();
             switch (OpSize) {
-              case 1: GD = ((24 + OpSize * 8) - __builtin_clz(*GetSrc<uint8_t*>(Op->Header.Args[0]))) - 1; break;
-              case 2: GD = ((16 + OpSize * 8) - __builtin_clz(*GetSrc<uint16_t*>(Op->Header.Args[0]))) - 1; break;
-              case 4: GD = (OpSize * 8 - __builtin_clz(*GetSrc<uint32_t*>(Op->Header.Args[0]))) - 1; break;
-              case 8: GD = (OpSize * 8 - __builtin_clzll(*GetSrc<uint64_t*>(Op->Header.Args[0]))) - 1; break;
+              case 1: GD = ((24 + OpSize * 8) - __builtin_clz(*GetSrc<uint8_t*>(SSAData, Op->Header.Args[0]))) - 1; break;
+              case 2: GD = ((16 + OpSize * 8) - __builtin_clz(*GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]))) - 1; break;
+              case 4: GD = (OpSize * 8 - __builtin_clz(*GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]))) - 1; break;
+              case 8: GD = (OpSize * 8 - __builtin_clzll(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]))) - 1; break;
               default: LogMan::Msg::A("Unknown REV size: %d", OpSize); break;
             }
             break;
@@ -1150,9 +1109,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_REV: {
             auto Op = IROp->C<IR::IROp_Rev>();
             switch (OpSize) {
-              case 2: GD = __builtin_bswap16(*GetSrc<uint16_t*>(Op->Header.Args[0])); break;
-              case 4: GD = __builtin_bswap32(*GetSrc<uint32_t*>(Op->Header.Args[0])); break;
-              case 8: GD = __builtin_bswap64(*GetSrc<uint64_t*>(Op->Header.Args[0])); break;
+              case 2: GD = __builtin_bswap16(*GetSrc<uint16_t*>(SSAData, Op->Header.Args[0])); break;
+              case 4: GD = __builtin_bswap32(*GetSrc<uint32_t*>(SSAData, Op->Header.Args[0])); break;
+              case 8: GD = __builtin_bswap64(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0])); break;
               default: LogMan::Msg::A("Unknown REV size: %d", OpSize); break;
             }
             break;
@@ -1161,7 +1120,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             auto Op = IROp->C<IR::IROp_FindTrailingZeros>();
             switch (OpSize) {
               case 1: {
-                auto Src = *GetSrc<uint8_t*>(Op->Header.Args[0]);
+                auto Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[0]);
                 if (Src)
                   GD = __builtin_ctz(Src);
                 else
@@ -1169,7 +1128,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 2: {
-                auto Src = *GetSrc<uint16_t*>(Op->Header.Args[0]);
+                auto Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]);
                 if (Src)
                   GD = __builtin_ctz(Src);
                 else
@@ -1177,7 +1136,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 4: {
-                auto Src = *GetSrc<uint32_t*>(Op->Header.Args[0]);
+                auto Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
                 if (Src)
                   GD = __builtin_ctz(Src);
                 else
@@ -1185,7 +1144,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 8: {
-                auto Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+                auto Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
                 if (Src)
                   GD = __builtin_ctzll(Src);
                 else
@@ -1202,8 +1161,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             if (Op->Width == 64)
               SourceMask = ~0ULL;
             uint64_t DestMask = ~(SourceMask << Op->lsb);
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
             uint64_t Res = (Src1 & DestMask) | ((Src2 & SourceMask) << Op->lsb);
             GD = Res;
             break;
@@ -1211,7 +1170,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_SBFE: {
             auto Op = IROp->C<IR::IROp_Sbfe>();
             LogMan::Throw::A(OpSize < 16, "OpSize is too large for BFE: %d", OpSize);
-            int64_t Src = *GetSrc<int64_t*>(Op->Header.Args[0]);
+            int64_t Src = *GetSrc<int64_t*>(SSAData, Op->Header.Args[0]);
             uint64_t ShiftLeftAmount = (64 - (Op->Width + Op->lsb));
             uint64_t ShiftRightAmount = ShiftLeftAmount + Op->lsb;
             Src <<= ShiftLeftAmount;
@@ -1226,18 +1185,18 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             if (Op->Width == 64)
               SourceMask = ~0ULL;
             SourceMask <<= Op->lsb;
-            uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[0]);
+            uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
             GD = (Src & SourceMask) >> Op->lsb;
             break;
           }
           case IR::OP_SELECT: {
             auto Op = IROp->C<IR::IROp_Select>();
             bool CompResult = false;
-            uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-            uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+            uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+            uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
-            uint64_t ArgTrue = *GetSrc<uint64_t*>(Op->Header.Args[2]);
-            uint64_t ArgFalse = *GetSrc<uint64_t*>(Op->Header.Args[3]);
+            uint64_t ArgTrue = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]);
+            uint64_t ArgFalse = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[3]);
 
             switch (Op->Cond.Val) {
               case FEXCore::IR::COND_EQ:
@@ -1288,15 +1247,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[2]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[2]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[2]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[2]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
                 }
 
-                uint8_t Src1 = *GetSrc<uint8_t*>(Op->Header.Args[0]);
-                uint8_t Src2 = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src1 = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[0]);
+                uint8_t Src2 = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
 
                 uint8_t Expected = Src1;
                 bool Result = Data->compare_exchange_strong(Expected, Src2);
@@ -1306,15 +1265,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[2]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[2]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[2]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[2]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
                 }
 
-                uint16_t Src1 = *GetSrc<uint16_t*>(Op->Header.Args[0]);
-                uint16_t Src2 = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src1 = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]);
+                uint16_t Src2 = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
 
                 uint16_t Expected = Src1;
                 bool Result = Data->compare_exchange_strong(Expected, Src2);
@@ -1324,15 +1283,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[2]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[2]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[2]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[2]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
                 }
 
-                uint32_t Src1 = *GetSrc<uint32_t*>(Op->Header.Args[0]);
-                uint32_t Src2 = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src1 = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
+                uint32_t Src2 = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
 
                 uint32_t Expected = Src1;
                 bool Result = Data->compare_exchange_strong(Expected, Src2);
@@ -1342,15 +1301,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[2]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[2]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[2]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[2]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]));
                 }
 
-                uint64_t Src1 = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-                uint64_t Src2 = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src1 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+                uint64_t Src2 = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
 
                 uint64_t Expected = Src1;
                 bool Result = Data->compare_exchange_strong(Expected, Src2);
@@ -1367,54 +1326,54 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
 
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 *Data += Src;
                 break;
               }
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint16_t*>(Op->Header.Args[0]));
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]));
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 *Data += Src;
                 break;
               }
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 *Data += Src;
                 break;
               }
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 *Data += Src;
                 break;
               }
@@ -1428,52 +1387,52 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 *Data -= Src;
                 break;
               }
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 *Data -= Src;
                 break;
               }
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 *Data -= Src;
                 break;
               }
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 *Data -= Src;
                 break;
               }
@@ -1487,52 +1446,52 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 *Data &= Src;
                 break;
               }
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 *Data &= Src;
                 break;
               }
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 *Data &= Src;
                 break;
               }
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 *Data &= Src;
                 break;
               }
@@ -1546,54 +1505,54 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint8_t*>(Op->Header.Args[0]));
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint8_t*>(SSAData, Op->Header.Args[0]));
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 *Data |= Src;
                 break;
               }
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint16_t*>(Op->Header.Args[0]));
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]));
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 *Data |= Src;
                 break;
               }
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 *Data |= Src;
                 break;
               }
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 *Data |= Src;
                 break;
               }
@@ -1607,53 +1566,53 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 *Data ^= Src;
                 break;
               }
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint16_t*>(Op->Header.Args[0]));
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]));
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 *Data ^= Src;
                 break;
               }
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 *Data ^= Src;
                 break;
               }
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 *Data ^= Src;
                 break;
               }
@@ -1667,13 +1626,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 uint8_t Previous = Data->exchange(Src);
                 GD = Previous;
                 break;
@@ -1681,13 +1640,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 uint16_t Previous = Data->exchange(Src);
                 GD = Previous;
                 break;
@@ -1695,13 +1654,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 uint32_t Previous = Data->exchange(Src);
                 GD = Previous;
                 break;
@@ -1709,13 +1668,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 uint64_t Previous = Data->exchange(Src);
                 GD = Previous;
                 break;
@@ -1730,13 +1689,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 uint8_t Previous = Data->fetch_add(Src);
                 GD = Previous;
                 break;
@@ -1744,13 +1703,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 uint16_t Previous = Data->fetch_add(Src);
                 GD = Previous;
                 break;
@@ -1758,13 +1717,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 uint32_t Previous = Data->fetch_add(Src);
                 GD = Previous;
                 break;
@@ -1772,13 +1731,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 uint64_t Previous = Data->fetch_add(Src);
                 GD = Previous;
                 break;
@@ -1793,13 +1752,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 uint8_t Previous = Data->fetch_sub(Src);
                 GD = Previous;
                 break;
@@ -1807,13 +1766,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 uint16_t Previous = Data->fetch_sub(Src);
                 GD = Previous;
                 break;
@@ -1821,13 +1780,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 uint32_t Previous = Data->fetch_sub(Src);
                 GD = Previous;
                 break;
@@ -1835,13 +1794,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 uint64_t Previous = Data->fetch_sub(Src);
                 GD = Previous;
                 break;
@@ -1856,13 +1815,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 uint8_t Previous = Data->fetch_and(Src);
                 GD = Previous;
                 break;
@@ -1870,13 +1829,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 uint16_t Previous = Data->fetch_and(Src);
                 GD = Previous;
                 break;
@@ -1884,13 +1843,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 uint32_t Previous = Data->fetch_and(Src);
                 GD = Previous;
                 break;
@@ -1898,13 +1857,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 uint64_t Previous = Data->fetch_and(Src);
                 GD = Previous;
                 break;
@@ -1919,13 +1878,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 uint8_t Previous = Data->fetch_or(Src);
                 GD = Previous;
                 break;
@@ -1933,13 +1892,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 uint16_t Previous = Data->fetch_or(Src);
                 GD = Previous;
                 break;
@@ -1947,13 +1906,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 uint32_t Previous = Data->fetch_or(Src);
                 GD = Previous;
                 break;
@@ -1961,13 +1920,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 uint64_t Previous = Data->fetch_or(Src);
                 GD = Previous;
                 break;
@@ -1982,13 +1941,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 1: {
                 std::atomic<uint8_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint8_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint8_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint8_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint8_t Src = *GetSrc<uint8_t*>(Op->Header.Args[1]);
+                uint8_t Src = *GetSrc<uint8_t*>(SSAData, Op->Header.Args[1]);
                 uint8_t Previous = Data->fetch_xor(Src);
                 GD = Previous;
                 break;
@@ -1996,13 +1955,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 2: {
                 std::atomic<uint16_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint16_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint16_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint16_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint16_t Src = *GetSrc<uint16_t*>(Op->Header.Args[1]);
+                uint16_t Src = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
                 uint16_t Previous = Data->fetch_xor(Src);
                 GD = Previous;
                 break;
@@ -2010,13 +1969,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 4: {
                 std::atomic<uint32_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint32_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint32_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint32_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint32_t Src = *GetSrc<uint32_t*>(Op->Header.Args[1]);
+                uint32_t Src = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
                 uint32_t Previous = Data->fetch_xor(Src);
                 GD = Previous;
                 break;
@@ -2024,13 +1983,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               case 8: {
                 std::atomic<uint64_t> *Data = {};
                 if (Thread->CTX->Config.UnifiedMemory) {
-                  Data = *GetSrc<std::atomic<uint64_t> **>(Op->Header.Args[0]);
+                  Data = *GetSrc<std::atomic<uint64_t> **>(SSAData, Op->Header.Args[0]);
                 }
                 else {
-                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(Op->Header.Args[0]));
-                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(Op->Header.Args[0]));
+                  Data = Thread->CTX->MemoryMapper.GetPointer<std::atomic<uint64_t> *>(*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
+                  LogMan::Throw::A(Data != nullptr, "Couldn't Map pointer to 0x%lx\n", *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]));
                 }
-                uint64_t Src = *GetSrc<uint64_t*>(Op->Header.Args[1]);
+                uint64_t Src = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
                 uint64_t Previous = Data->fetch_xor(Src);
                 GD = Previous;
                 break;
@@ -2043,8 +2002,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_CREATEVECTOR2: {
             auto Op = IROp->C<IR::IROp_CreateVector2>();
             LogMan::Throw::A(OpSize <= 16, "Can't handle a vector of size: %d", OpSize);
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
             uint8_t ElementSize = OpSize / 2;
             #define CREATE_VECTOR(elementsize, type) \
@@ -2072,7 +2031,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_SPLATVECTOR2: {
             auto Op = IROp->C<IR::IROp_SplatVector2>();
             LogMan::Throw::A(OpSize <= 16, "Can't handle a vector of size: %d", OpSize);
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
             uint8_t Elements = 0;
 
@@ -2105,15 +2064,15 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VMOV: {
             auto Op = IROp->C<IR::IROp_VMov>();
-            __uint128_t Src = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+            __uint128_t Src = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
 
             memcpy(GDP, &Src, OpSize);
             break;
           }
           case IR::OP_VOR: {
             auto Op = IROp->C<IR::IROp_VOr>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-            __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+            __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
 
             __uint128_t Dst = Src1 | Src2;
             memcpy(GDP, &Dst, 16);
@@ -2121,8 +2080,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VAND: {
             auto Op = IROp->C<IR::IROp_VAnd>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-            __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+            __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
 
             __uint128_t Dst = Src1 & Src2;
             memcpy(GDP, &Dst, 16);
@@ -2130,8 +2089,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VXOR: {
             auto Op = IROp->C<IR::IROp_VXor>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-            __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+            __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
 
             __uint128_t Dst = Src1 ^ Src2;
             memcpy(GDP, &Dst, 16);
@@ -2139,7 +2098,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSLI: {
             auto Op = IROp->C<IR::IROp_VSLI>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
             __uint128_t Src2 = Op->ByteShift * 8;
 
             __uint128_t Dst = Op->ByteShift >= sizeof(__uint128_t) ? 0 : Src1 << Src2;
@@ -2148,7 +2107,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSRI: {
             auto Op = IROp->C<IR::IROp_VSRI>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
             __uint128_t Src2 = Op->ByteShift * 8;
 
             __uint128_t Dst = Op->ByteShift >= sizeof(__uint128_t) ? 0 : Src1 >> Src2;
@@ -2157,7 +2116,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VNOT: {
             auto Op = IROp->C<IR::IROp_VNot>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
 
             __uint128_t Dst = ~Src1;
             memcpy(GDP, &Dst, 16);
@@ -2226,7 +2185,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             }
           case IR::OP_VFNEG: {
             auto Op = IROp->C<IR::IROp_VFNeg>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2242,7 +2201,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUSHRI: {
             auto Op = IROp->C<IR::IROp_VUShrI>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t BitShift = Op->BitShift;
             uint8_t Tmp[16];
 
@@ -2261,7 +2220,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSSHRI: {
             auto Op = IROp->C<IR::IROp_VSShrI>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t BitShift = Op->BitShift;
             uint8_t Tmp[16];
 
@@ -2280,7 +2239,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSHLI: {
             auto Op = IROp->C<IR::IROp_VShlI>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t BitShift = Op->BitShift;
             uint8_t Tmp[16];
 
@@ -2300,8 +2259,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_VADD: {
             auto Op = IROp->C<IR::IROp_VAdd>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2319,8 +2278,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSUB: {
             auto Op = IROp->C<IR::IROp_VSub>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2338,8 +2297,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUQADD: {
             auto Op = IROp->C<IR::IROp_VUQAdd>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2360,8 +2319,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUQSUB: {
             auto Op = IROp->C<IR::IROp_VUQSub>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2382,8 +2341,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSQADD: {
             auto Op = IROp->C<IR::IROp_VSQAdd>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2414,8 +2373,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSQSUB: {
             auto Op = IROp->C<IR::IROp_VSQSub>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2443,8 +2402,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_VFADD: {
             auto Op = IROp->C<IR::IROp_VFAdd>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2460,8 +2419,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFADDP: {
             auto Op = IROp->C<IR::IROp_VFAddP>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = (OpSize / Op->Header.ElementSize) / 2;
@@ -2477,8 +2436,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFSUB: {
             auto Op = IROp->C<IR::IROp_VFSub>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2494,8 +2453,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VADDP: {
             auto Op = IROp->C<IR::IROp_VAddP>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = (OpSize / Op->Header.ElementSize) / 2;
@@ -2513,7 +2472,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VADDV: {
             auto Op = IROp->C<IR::IROp_VAddV>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2531,8 +2490,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VURAVG: {
             auto Op = IROp->C<IR::IROp_VURAvg>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2548,7 +2507,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VABS: {
             auto Op = IROp->C<IR::IROp_VAbs>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2566,8 +2525,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFMUL: {
             auto Op = IROp->C<IR::IROp_VFMul>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2583,8 +2542,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFDIV: {
             auto Op = IROp->C<IR::IROp_VFDiv>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2600,8 +2559,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFMIN: {
             auto Op = IROp->C<IR::IROp_VFMin>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2617,8 +2576,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFMAX: {
             auto Op = IROp->C<IR::IROp_VFMax>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2634,7 +2593,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFRECP: {
             auto Op = IROp->C<IR::IROp_VFRecp>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2650,7 +2609,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFSQRT: {
             auto Op = IROp->C<IR::IROp_VFSqrt>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2666,7 +2625,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFRSQRT: {
             auto Op = IROp->C<IR::IROp_VFRSqrt>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2732,7 +2691,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_VUSHRNI: {
             auto Op = IROp->C<IR::IROp_VUShrNI>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t BitShift = Op->BitShift;
             uint8_t Tmp[16]{};
 
@@ -2750,8 +2709,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUSHRNI2: {
             auto Op = IROp->C<IR::IROp_VUShrNI2>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t BitShift = Op->BitShift;
             uint8_t Tmp[16];
 
@@ -2769,7 +2728,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSQXTN: {
             auto Op = IROp->C<IR::IROp_VSQXTN>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16]{};
 
             uint8_t Elements = OpSize / (Op->Header.ElementSize << 1);
@@ -2785,8 +2744,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSQXTN2: {
             auto Op = IROp->C<IR::IROp_VSQXTN2>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16]{};
 
             uint8_t Elements = OpSize / (Op->Header.ElementSize << 1);
@@ -2802,7 +2761,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSQXTUN: {
             auto Op = IROp->C<IR::IROp_VSQXTUN>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16]{};
 
             uint8_t Elements = OpSize / (Op->Header.ElementSize << 1);
@@ -2818,8 +2777,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSQXTUN2: {
             auto Op = IROp->C<IR::IROp_VSQXTUN2>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16]{};
 
             uint8_t Elements = OpSize / (Op->Header.ElementSize << 1);
@@ -2835,7 +2794,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VECTOR_UTOF: {
             auto Op = IROp->C<IR::IROp_Vector_UToF>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2851,7 +2810,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VECTOR_STOF: {
             auto Op = IROp->C<IR::IROp_Vector_SToF>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2867,7 +2826,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VECTOR_FTOZU: {
             auto Op = IROp->C<IR::IROp_Vector_FToZU>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2883,7 +2842,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VECTOR_FTOZS: {
             auto Op = IROp->C<IR::IROp_Vector_FToZS>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2899,8 +2858,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUMUL: {
             auto Op = IROp->C<IR::IROp_VUMul>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2918,8 +2877,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSMUL: {
             auto Op = IROp->C<IR::IROp_VSMul>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -2937,8 +2896,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUMULL: {
             auto Op = IROp->C<IR::IROp_VUMull>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             uint8_t Tmp[16];
 
@@ -2956,8 +2915,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSMULL: {
             auto Op = IROp->C<IR::IROp_VSMull>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             uint8_t Tmp[16];
 
@@ -2975,8 +2934,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUMULL2: {
             auto Op = IROp->C<IR::IROp_VUMull2>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             uint8_t Tmp[16];
 
@@ -2994,8 +2953,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSMULL2: {
             auto Op = IROp->C<IR::IROp_VSMull2>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             uint8_t Tmp[16];
 
@@ -3013,7 +2972,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSXTL: {
             auto Op = IROp->C<IR::IROp_VSXTL>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16]{};
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3030,7 +2989,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSXTL2: {
             auto Op = IROp->C<IR::IROp_VSXTL2>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3047,7 +3006,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUXTL: {
             auto Op = IROp->C<IR::IROp_VUXTL>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16]{};
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3064,7 +3023,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUXTL2: {
             auto Op = IROp->C<IR::IROp_VUXTL2>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
 
             uint8_t Tmp[16];
 
@@ -3082,8 +3041,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUMIN: {
             auto Op = IROp->C<IR::IROp_VUMin>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3101,8 +3060,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSMIN: {
             auto Op = IROp->C<IR::IROp_VSMin>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3120,8 +3079,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUMAX: {
             auto Op = IROp->C<IR::IROp_VUMax>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3139,8 +3098,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSMAX: {
             auto Op = IROp->C<IR::IROp_VSMax>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3158,8 +3117,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUSHL: {
             auto Op = IROp->C<IR::IROp_VUShl>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3177,8 +3136,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSSHR: {
             auto Op = IROp->C<IR::IROp_VSShr>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3197,8 +3156,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_VUSHLS: {
             auto Op = IROp->C<IR::IROp_VUShlS>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3217,8 +3176,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUSHRS: {
             auto Op = IROp->C<IR::IROp_VUShrS>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3237,8 +3196,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VSSHRS: {
             auto Op = IROp->C<IR::IROp_VSShrS>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3257,8 +3216,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VUSHR: {
             auto Op = IROp->C<IR::IROp_VUShr>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3277,8 +3236,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_VZIP2:
           case IR::OP_VZIP: {
             auto Op = IROp->C<IR::IROp_VZip>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
             uint8_t Elements = OpSize / Op->Header.ElementSize;
             uint8_t BaseOffset = IROp->Op == IR::OP_VZIP2 ? (Elements / 2) : 0;
@@ -3333,8 +3292,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VINSELEMENT: {
             auto Op = IROp->C<IR::IROp_VInsElement>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             // Copy src1 in to dest
@@ -3371,8 +3330,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VINSSCALARELEMENT: {
             auto Op = IROp->C<IR::IROp_VInsScalarElement>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             // Copy src1 in to dest
@@ -3410,9 +3369,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_VBSL: {
             auto Op = IROp->C<IR::IROp_VBSL>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-            __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
-            __uint128_t Src3 = *GetSrc<__uint128_t*>(Op->Header.Args[2]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+            __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
+            __uint128_t Src3 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[2]);
 
             __uint128_t Tmp{};
             Tmp = Src2 & Src1;
@@ -3423,8 +3382,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VCMPEQ: {
             auto Op = IROp->C<IR::IROp_VCMPEQ>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3443,8 +3402,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VCMPGT: {
             auto Op = IROp->C<IR::IROp_VCMPGT>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
             uint8_t Tmp[16];
 
             uint8_t Elements = OpSize / Op->Header.ElementSize;
@@ -3467,9 +3426,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             // So you can have up to a 128bit divide from x86-64
             switch (OpSize) {
               case 2: {
-                uint16_t SrcLow = *GetSrc<uint16_t*>(Op->Header.Args[0]);
-                uint16_t SrcHigh = *GetSrc<uint16_t*>(Op->Header.Args[1]);
-                uint16_t Divisor = *GetSrc<uint16_t*>(Op->Header.Args[2]);
+                uint16_t SrcLow = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]);
+                uint16_t SrcHigh = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
+                uint16_t Divisor = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[2]);
                 uint32_t Source = (static_cast<uint32_t>(SrcHigh) << 16) | SrcLow;
                 uint32_t Res = Source / Divisor;
 
@@ -3478,9 +3437,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 4: {
-                uint32_t SrcLow = *GetSrc<uint32_t*>(Op->Header.Args[0]);
-                uint32_t SrcHigh = *GetSrc<uint32_t*>(Op->Header.Args[1]);
-                uint32_t Divisor = *GetSrc<uint32_t*>(Op->Header.Args[2]);
+                uint32_t SrcLow = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
+                uint32_t SrcHigh = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
+                uint32_t Divisor = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[2]);
                 uint64_t Source = (static_cast<uint64_t>(SrcHigh) << 32) | SrcLow;
                 uint64_t Res = Source / Divisor;
 
@@ -3489,9 +3448,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 8: {
-                uint64_t SrcLow = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-                uint64_t SrcHigh = *GetSrc<uint64_t*>(Op->Header.Args[1]);
-                uint64_t Divisor = *GetSrc<uint64_t*>(Op->Header.Args[2]);
+                uint64_t SrcLow = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+                uint64_t SrcHigh = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
+                uint64_t Divisor = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]);
                 __uint128_t Source = (static_cast<__uint128_t>(SrcHigh) << 64) | SrcLow;
                 __uint128_t Res = Source / Divisor;
 
@@ -3509,9 +3468,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             // So you can have up to a 128bit divide from x86-64
             switch (OpSize) {
               case 2: {
-                uint16_t SrcLow = *GetSrc<uint16_t*>(Op->Header.Args[0]);
-                uint16_t SrcHigh = *GetSrc<uint16_t*>(Op->Header.Args[1]);
-                int16_t Divisor = *GetSrc<uint16_t*>(Op->Header.Args[2]);
+                uint16_t SrcLow = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]);
+                uint16_t SrcHigh = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
+                int16_t Divisor = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[2]);
                 int32_t Source = (static_cast<uint32_t>(SrcHigh) << 16) | SrcLow;
                 int32_t Res = Source / Divisor;
 
@@ -3520,9 +3479,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 4: {
-                uint32_t SrcLow = *GetSrc<uint32_t*>(Op->Header.Args[0]);
-                uint32_t SrcHigh = *GetSrc<uint32_t*>(Op->Header.Args[1]);
-                int32_t Divisor = *GetSrc<uint32_t*>(Op->Header.Args[2]);
+                uint32_t SrcLow = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
+                uint32_t SrcHigh = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
+                int32_t Divisor = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[2]);
                 int64_t Source = (static_cast<uint64_t>(SrcHigh) << 32) | SrcLow;
                 int64_t Res = Source / Divisor;
 
@@ -3531,9 +3490,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 8: {
-                uint64_t SrcLow = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-                uint64_t SrcHigh = *GetSrc<uint64_t*>(Op->Header.Args[1]);
-                int64_t Divisor = *GetSrc<int64_t*>(Op->Header.Args[2]);
+                uint64_t SrcLow = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+                uint64_t SrcHigh = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
+                int64_t Divisor = *GetSrc<int64_t*>(SSAData, Op->Header.Args[2]);
                 __int128_t Source = (static_cast<__int128_t>(SrcHigh) << 64) | SrcLow;
                 __int128_t Res = Source / Divisor;
 
@@ -3551,9 +3510,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             // So you can have up to a 128bit Remainder from x86-64
             switch (OpSize) {
               case 2: {
-                uint16_t SrcLow = *GetSrc<uint16_t*>(Op->Header.Args[0]);
-                uint16_t SrcHigh = *GetSrc<uint16_t*>(Op->Header.Args[1]);
-                uint16_t Divisor = *GetSrc<uint16_t*>(Op->Header.Args[2]);
+                uint16_t SrcLow = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]);
+                uint16_t SrcHigh = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
+                uint16_t Divisor = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[2]);
                 uint32_t Source = (static_cast<uint32_t>(SrcHigh) << 16) | SrcLow;
                 uint32_t Res = Source % Divisor;
 
@@ -3563,9 +3522,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               }
 
               case 4: {
-                uint32_t SrcLow = *GetSrc<uint32_t*>(Op->Header.Args[0]);
-                uint32_t SrcHigh = *GetSrc<uint32_t*>(Op->Header.Args[1]);
-                uint32_t Divisor = *GetSrc<uint32_t*>(Op->Header.Args[2]);
+                uint32_t SrcLow = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
+                uint32_t SrcHigh = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
+                uint32_t Divisor = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[2]);
                 uint64_t Source = (static_cast<uint64_t>(SrcHigh) << 32) | SrcLow;
                 uint64_t Res = Source % Divisor;
 
@@ -3574,9 +3533,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 8: {
-                uint64_t SrcLow = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-                uint64_t SrcHigh = *GetSrc<uint64_t*>(Op->Header.Args[1]);
-                uint64_t Divisor = *GetSrc<uint64_t*>(Op->Header.Args[2]);
+                uint64_t SrcLow = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+                uint64_t SrcHigh = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
+                uint64_t Divisor = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[2]);
                 __uint128_t Source = (static_cast<__uint128_t>(SrcHigh) << 64) | SrcLow;
                 __uint128_t Res = Source % Divisor;
                 // We only store the lower bits of the result
@@ -3593,9 +3552,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             // So you can have up to a 128bit Remainder from x86-64
             switch (OpSize) {
               case 2: {
-                uint16_t SrcLow = *GetSrc<uint16_t*>(Op->Header.Args[0]);
-                uint16_t SrcHigh = *GetSrc<uint16_t*>(Op->Header.Args[1]);
-                int16_t Divisor = *GetSrc<uint16_t*>(Op->Header.Args[2]);
+                uint16_t SrcLow = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[0]);
+                uint16_t SrcHigh = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[1]);
+                int16_t Divisor = *GetSrc<uint16_t*>(SSAData, Op->Header.Args[2]);
                 int32_t Source = (static_cast<uint32_t>(SrcHigh) << 16) | SrcLow;
                 int32_t Res = Source % Divisor;
 
@@ -3604,9 +3563,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 4: {
-                uint32_t SrcLow = *GetSrc<uint32_t*>(Op->Header.Args[0]);
-                uint32_t SrcHigh = *GetSrc<uint32_t*>(Op->Header.Args[1]);
-                int32_t Divisor = *GetSrc<uint32_t*>(Op->Header.Args[2]);
+                uint32_t SrcLow = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
+                uint32_t SrcHigh = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[1]);
+                int32_t Divisor = *GetSrc<uint32_t*>(SSAData, Op->Header.Args[2]);
                 int64_t Source = (static_cast<uint64_t>(SrcHigh) << 32) | SrcLow;
                 int64_t Res = Source % Divisor;
 
@@ -3615,9 +3574,9 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
                 break;
               }
               case 8: {
-                uint64_t SrcLow = *GetSrc<uint64_t*>(Op->Header.Args[0]);
-                uint64_t SrcHigh = *GetSrc<uint64_t*>(Op->Header.Args[1]);
-                int64_t Divisor = *GetSrc<int64_t*>(Op->Header.Args[2]);
+                uint64_t SrcLow = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
+                uint64_t SrcHigh = *GetSrc<uint64_t*>(SSAData, Op->Header.Args[1]);
+                int64_t Divisor = *GetSrc<int64_t*>(SSAData, Op->Header.Args[2]);
                 __int128_t Source = (static_cast<__int128_t>(SrcHigh) << 64) | SrcLow;
                 __int128_t Res = Source % Divisor;
                 // We only store the lower bits of the result
@@ -3630,8 +3589,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VEXTR: {
             auto Op = IROp->C<IR::IROp_VExtr>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-            __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+            __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
 
             uint64_t Offset = Op->Index * Op->Header.ElementSize * 8;
             __uint128_t Dst = (Src1 << (sizeof(__uint128_t) * 8 - Offset)) | (Src2 >> Offset);
@@ -3641,8 +3600,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VINSGPR: {
             auto Op = IROp->C<IR::IROp_VInsGPR>();
-            __uint128_t Src1 = *GetSrc<__uint128_t*>(Op->Header.Args[0]);
-            __uint128_t Src2 = *GetSrc<__uint128_t*>(Op->Header.Args[1]);
+            __uint128_t Src1 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[0]);
+            __uint128_t Src2 = *GetSrc<__uint128_t*>(SSAData, Op->Header.Args[1]);
 
             uint64_t Offset = Op->Index * Op->Header.ElementSize * 8;
             __uint128_t Mask = (1ULL << (Op->Header.ElementSize * 8)) - 1;
@@ -3657,11 +3616,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_FLOAT_FROMGPR_S: {
             auto Op = IROp->C<IR::IROp_Float_FromGPR_S>();
             if (Op->Header.ElementSize == 8) {
-              double Dst = (double)*GetSrc<int64_t*>(Op->Header.Args[0]);
+              double Dst = (double)*GetSrc<int64_t*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             else {
-              float Dst = (float)*GetSrc<int32_t*>(Op->Header.Args[0]);
+              float Dst = (float)*GetSrc<int32_t*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             break;
@@ -3669,11 +3628,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_FLOAT_FROMGPR_U: {
             auto Op = IROp->C<IR::IROp_Float_FromGPR_U>();
             if (Op->Header.ElementSize == 8) {
-              double Dst = (double)*GetSrc<uint64_t*>(Op->Header.Args[0]);
+              double Dst = (double)*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             else {
-              float Dst = (float)*GetSrc<uint32_t*>(Op->Header.Args[0]);
+              float Dst = (float)*GetSrc<uint32_t*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             break;
@@ -3681,11 +3640,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_FLOAT_TOGPR_ZS: {
             auto Op = IROp->C<IR::IROp_Float_ToGPR_ZS>();
             if (Op->Header.ElementSize == 8) {
-              int64_t Dst = (int64_t)*GetSrc<double*>(Op->Header.Args[0]);
+              int64_t Dst = (int64_t)*GetSrc<double*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             else {
-              int32_t Dst = (int32_t)*GetSrc<float*>(Op->Header.Args[0]);
+              int32_t Dst = (int32_t)*GetSrc<float*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             break;
@@ -3693,11 +3652,11 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_FLOAT_TOGPR_ZU: {
             auto Op = IROp->C<IR::IROp_Float_ToGPR_ZU>();
             if (Op->Header.ElementSize == 8) {
-              uint64_t Dst = (uint64_t)*GetSrc<double*>(Op->Header.Args[0]);
+              uint64_t Dst = (uint64_t)*GetSrc<double*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             else {
-              uint32_t Dst = (uint32_t)*GetSrc<float*>(Op->Header.Args[0]);
+              uint32_t Dst = (uint32_t)*GetSrc<float*>(SSAData, Op->Header.Args[0]);
               memcpy(GDP, &Dst, Op->Header.ElementSize);
             }
             break;
@@ -3707,12 +3666,12 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
             switch (Conv) {
               case 0x0804: { // Double <- Float
-                double Dst = (double)*GetSrc<float*>(Op->Header.Args[0]);
+                double Dst = (double)*GetSrc<float*>(SSAData, Op->Header.Args[0]);
                 memcpy(GDP, &Dst, 8);
                 break;
               }
               case 0x0408: { // Float <- Double
-                float Dst = (float)*GetSrc<double*>(Op->Header.Args[0]);
+                float Dst = (float)*GetSrc<double*>(SSAData, Op->Header.Args[0]);
                 memcpy(GDP, &Dst, 4);
                 break;
               }
@@ -3722,7 +3681,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VECTOR_FTOF: {
             auto Op = IROp->C<IR::IROp_Vector_FToF>();
-            void *Src = GetSrc<void*>(Op->Header.Args[0]);
+            void *Src = GetSrc<void*>(SSAData, Op->Header.Args[0]);
             uint8_t Tmp[16]{};
 
             uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
@@ -3754,8 +3713,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
             auto Op = IROp->C<IR::IROp_FCmp>();
             uint32_t ResultFlags{};
             if (Op->ElementSize == 4) {
-              float Src1 = *GetSrc<float*>(Op->Header.Args[0]);
-              float Src2 = *GetSrc<float*>(Op->Header.Args[1]);
+              float Src1 = *GetSrc<float*>(SSAData, Op->Header.Args[0]);
+              float Src2 = *GetSrc<float*>(SSAData, Op->Header.Args[1]);
               if (Op->Flags & (1 << FCMP_FLAG_LT)) {
                 if (Src1 < Src2) {
                   ResultFlags |= (1 << FCMP_FLAG_LT);
@@ -3773,8 +3732,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
               }
             }
             else {
-              double Src1 = *GetSrc<double*>(Op->Header.Args[0]);
-              double Src2 = *GetSrc<double*>(Op->Header.Args[1]);
+              double Src1 = *GetSrc<double*>(SSAData, Op->Header.Args[0]);
+              double Src2 = *GetSrc<double*>(SSAData, Op->Header.Args[1]);
               if (Op->Flags & (1 << FCMP_FLAG_LT)) {
                 if (Src1 < Src2) {
                   ResultFlags |= (1 << FCMP_FLAG_LT);
@@ -3797,7 +3756,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_GETHOSTFLAG: {
             auto Op = IROp->C<IR::IROp_GetHostFlag>();
-            GD = (*GetSrc<uint64_t*>(Op->Header.Args[0]) >> Op->Flag) & 1;
+            GD = (*GetSrc<uint64_t*>(SSAData, Op->Header.Args[0]) >> Op->Flag) & 1;
             break;
           }
           #define DO_SCALAR_COMPARE_OP(size, type, type2, func)              \
@@ -3822,8 +3781,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
           case IR::OP_VFCMPEQ: {
             auto Op = IROp->C<IR::IROp_VFCMPEQ>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             auto Func = [](auto a, auto b) { return a == b ? ~0ULL : 0; };
 
@@ -3850,8 +3809,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFCMPNEQ: {
             auto Op = IROp->C<IR::IROp_VFCMPNEQ>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             auto Func = [](auto a, auto b) { return a != b ? ~0ULL : 0; };
 
@@ -3878,8 +3837,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFCMPLT: {
             auto Op = IROp->C<IR::IROp_VFCMPLT>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             auto Func = [](auto a, auto b) { return a < b ? ~0ULL : 0; };
 
@@ -3906,8 +3865,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFCMPLE: {
             auto Op = IROp->C<IR::IROp_VFCMPLE>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             auto Func = [](auto a, auto b) { return a <= b ? ~0ULL : 0; };
 
@@ -3934,8 +3893,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFCMPUNO: {
             auto Op = IROp->C<IR::IROp_VFCMPUNO>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             auto Func = [](auto a, auto b) { return (std::isnan(a) || std::isnan(b)) ? ~0ULL : 0; };
 
@@ -3962,8 +3921,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_VFCMPORD: {
             auto Op = IROp->C<IR::IROp_VFCMPORD>();
-            void *Src1 = GetSrc<void*>(Op->Header.Args[0]);
-            void *Src2 = GetSrc<void*>(Op->Header.Args[1]);
+            void *Src1 = GetSrc<void*>(SSAData, Op->Header.Args[0]);
+            void *Src2 = GetSrc<void*>(SSAData, Op->Header.Args[1]);
 
             auto Func = [](auto a, auto b) { return (!std::isnan(a) && !std::isnan(b)) ? ~0ULL : 0; };
 
@@ -3990,8 +3949,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80ADD: {
             auto Op = IROp->C<IR::IROp_F80Add>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FADD(Src1, Src2);
 
@@ -4000,8 +3959,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80SUB: {
             auto Op = IROp->C<IR::IROp_F80Sub>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FSUB(Src1, Src2);
 
@@ -4010,8 +3969,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80MUL: {
             auto Op = IROp->C<IR::IROp_F80Mul>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FMUL(Src1, Src2);
 
@@ -4020,8 +3979,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80DIV: {
             auto Op = IROp->C<IR::IROp_F80Div>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FDIV(Src1, Src2);
 
@@ -4030,8 +3989,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80FYL2X: {
             auto Op = IROp->C<IR::IROp_F80FYL2X>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FYL2X(Src1, Src2);
 
@@ -4040,8 +3999,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80ATAN: {
             auto Op = IROp->C<IR::IROp_F80ATAN>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FATAN(Src1, Src2);
 
@@ -4050,8 +4009,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80FPREM1: {
             auto Op = IROp->C<IR::IROp_F80FPREM1>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FREM1(Src1, Src2);
 
@@ -4060,8 +4019,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80FPREM: {
             auto Op = IROp->C<IR::IROp_F80FPREM>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FREM(Src1, Src2);
 
@@ -4070,8 +4029,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80SCALE: {
             auto Op = IROp->C<IR::IROp_F80SCALE>();
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FSCALE(Src1, Src2);
 
@@ -4080,7 +4039,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80CVT: {
             auto Op = IROp->C<IR::IROp_F80CVT>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
 
             switch (OpSize) {
               case 4: {
@@ -4099,7 +4058,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80CVTINT: {
             auto Op = IROp->C<IR::IROp_F80CVTInt>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
 
             switch (OpSize) {
               case 2: {
@@ -4126,13 +4085,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
             switch (Op->Size) {
               case 4: {
-                float Src = *GetSrc<float *>(Op->Header.Args[0]);
+                float Src = *GetSrc<float *>(SSAData, Op->Header.Args[0]);
                 X80SoftFloat Tmp = Src;
                 memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
                 break;
               }
               case 8: {
-                double Src = *GetSrc<double *>(Op->Header.Args[0]);
+                double Src = *GetSrc<double *>(SSAData, Op->Header.Args[0]);
                 X80SoftFloat Tmp = Src;
                 memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
                 break;
@@ -4146,13 +4105,13 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
 
             switch (Op->Size) {
               case 2: {
-                int16_t Src = *GetSrc<int16_t*>(Op->Header.Args[0]);
+                int16_t Src = *GetSrc<int16_t*>(SSAData, Op->Header.Args[0]);
                 X80SoftFloat Tmp = Src;
                 memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
                 break;
               }
               case 4: {
-                int32_t Src = *GetSrc<int32_t*>(Op->Header.Args[0]);
+                int32_t Src = *GetSrc<int32_t*>(SSAData, Op->Header.Args[0]);
                 X80SoftFloat Tmp = Src;
                 memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
                 break;
@@ -4163,7 +4122,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80ROUND: {
             auto Op = IROp->C<IR::IROp_F80Round>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FRNDINT(Src);
 
@@ -4172,7 +4131,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80F2XM1: {
             auto Op = IROp->C<IR::IROp_F80F2XM1>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::F2XM1(Src);
 
@@ -4181,7 +4140,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80TAN: {
             auto Op = IROp->C<IR::IROp_F80TAN>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FTAN(Src);
 
@@ -4190,7 +4149,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80SQRT: {
             auto Op = IROp->C<IR::IROp_F80SQRT>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FSQRT(Src);
 
@@ -4199,7 +4158,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80SIN: {
             auto Op = IROp->C<IR::IROp_F80SIN>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FSIN(Src);
             memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
@@ -4207,7 +4166,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80COS: {
             auto Op = IROp->C<IR::IROp_F80COS>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FCOS(Src);
             memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
@@ -4215,7 +4174,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80XTRACT_EXP: {
             auto Op = IROp->C<IR::IROp_F80XTRACT_EXP>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FXTRACT_EXP(Src);
             memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
@@ -4223,7 +4182,7 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           }
           case IR::OP_F80XTRACT_SIG: {
             auto Op = IROp->C<IR::IROp_F80XTRACT_SIG>();
-            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
+            X80SoftFloat Src = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
             X80SoftFloat Tmp;
             Tmp = X80SoftFloat::FXTRACT_SIG(Src);
             memcpy(GDP, &Tmp, sizeof(X80SoftFloat));
@@ -4232,8 +4191,8 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
           case IR::OP_F80CMP: {
             auto Op = IROp->C<IR::IROp_F80Cmp>();
             uint32_t ResultFlags{};
-            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(Op->Header.Args[0]);
-            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(Op->Header.Args[1]);
+            X80SoftFloat Src1 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[0]);
+            X80SoftFloat Src2 = *GetSrc<X80SoftFloat*>(SSAData, Op->Header.Args[1]);
             bool eq, lt, nan;
             X80SoftFloat::FCMP(Src1, Src2, &eq, &lt, &nan);
             if (Op->Flags & (1 << FCMP_FLAG_LT) &&