diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 915446a37..920fb20f2 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -5916,6 +5916,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(1, 0b01, 0xD2), 1, &OpDispatchBuilder::VPSRLDOp<4>}, {OPD(1, 0b01, 0xD3), 1, &OpDispatchBuilder::VPSRLDOp<8>}, {OPD(1, 0b01, 0xD4), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(1, 0b01, 0xD5), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(1, 0b01, 0xD6), 1, &OpDispatchBuilder::MOVQOp}, {OPD(1, 0b01, 0xD7), 1, &OpDispatchBuilder::UnimplementedOp}, @@ -5995,6 +5996,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() { {OPD(2, 0b01, 0x3E), 1, &OpDispatchBuilder::AVXVectorALUOp}, {OPD(2, 0b01, 0x3F), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(2, 0b01, 0x40), 1, &OpDispatchBuilder::AVXVectorALUOp}, + {OPD(2, 0b01, 0x58), 1, &OpDispatchBuilder::VBROADCASTOp<4>}, {OPD(2, 0b01, 0x59), 1, &OpDispatchBuilder::VBROADCASTOp<8>}, {OPD(2, 0b01, 0x5A), 1, &OpDispatchBuilder::VBROADCASTOp<16>}, diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index 555b0139f..102647183 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -533,6 +533,11 @@ void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); template void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); +template +void OpDispatchBuilder::AVXVectorALUOp(OpcodeArgs); + void OpDispatchBuilder::VectorALUROpImpl(OpcodeArgs, IROps IROp, size_t ElementSize) { const auto Size = GetSrcSize(Op); OrderedNode *Src = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags, -1); diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 6940eb1bb..615ea25bb 100644 --- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -206,7 +206,7 @@ void InitializeVEXTables() { {OPD(1, 0b01, 0xD2), 1, X86InstInfo{"VPSRLD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xD3), 1, X86InstInfo{"VPSRLQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xD4), 1, X86InstInfo{"VPADDQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(1, 0b01, 0xD5), 1, X86InstInfo{"VPMULLW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(1, 0b01, 0xD5), 1, X86InstInfo{"VPMULLW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xD6), 1, X86InstInfo{"VMOVQ", TYPE_INST, GenFlagsSameSize(SIZE_64BIT) | FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(1, 0b01, 0xD7), 1, X86InstInfo{"VPMOVMSKB", TYPE_UNDEC, FLAGS_MODRM | FLAGS_XMM_FLAGS | FLAGS_SF_DST_GPR | FLAGS_SF_MOD_REG_ONLY, 0, nullptr}}, @@ -323,7 +323,7 @@ void InitializeVEXTables() { {OPD(2, 0b01, 0x3E), 1, X86InstInfo{"VPMAXUW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(2, 0b01, 0x3F), 1, X86InstInfo{"VPMAXUD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, - {OPD(2, 0b01, 0x40), 1, X86InstInfo{"VPMULLD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, + {OPD(2, 0b01, 0x40), 1, X86InstInfo{"VPMULLD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}}, {OPD(2, 0b01, 0x41), 1, X86InstInfo{"VPHMINPOSUW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(2, 0b01, 0x45), 1, X86InstInfo{"VPSRLV", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, {OPD(2, 0b01, 0x46), 1, X86InstInfo{"VPSRAVD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}}, diff --git a/unittests/ASM/VEX/vpmulld.asm b/unittests/ASM/VEX/vpmulld.asm new file mode 100644 index 000000000..7c8ea9874 --- /dev/null +++ b/unittests/ASM/VEX/vpmulld.asm @@ -0,0 +1,110 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM1": ["0x7A84D3FA541EF1BE", "0x5F0D7667E4D8E24A", "0x0000000000000000", "0x0000000000000000"], + "XMM2": ["0x44683C4CE9AC9780", "0x9DA95E9A6F25EF94", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0x4BC94EA0CCB0A64C", "0x3CF36EE04F371510", "0x0000000000000000", "0x0000000000000000"], + "XMM4": ["0x1AC415407B8BA3DB", "0x92CDC300DAB0773C", "0x0000000000000000", "0x0000000000000000"], + "XMM5": ["0x6796B1563F8D578C", "0x4C64F16199291FE4", "0x0000000000000000", "0x0000000000000000"], + "XMM6": ["0x01A14EF664207DC6", "0x1D3220DA400E1027", "0x0000000000000000", "0x0000000000000000"], + "XMM7": ["0x75DDBA582C3DD348", "0xA5141C506D8C60D7", "0x0000000000000000", "0x0000000000000000"], + "XMM8": ["0x7873FF38FB240E0D", "0x6C154F1ADB67CD17", "0x0000000000000000", "0x0000000000000000"], + "XMM9": ["0x7A84D3FA541EF1BE", "0x5F0D7667E4D8E24A", "0x7A84D3FA541EF1BE", "0x5F0D7667E4D8E24A"], + "XMM10": ["0x44683C4CE9AC9780", "0x9DA95E9A6F25EF94", "0x44683C4CE9AC9780", "0x9DA95E9A6F25EF94"], + "XMM11": ["0x4BC94EA0CCB0A64C", "0x3CF36EE04F371510", "0x4BC94EA0CCB0A64C", "0x3CF36EE04F371510"], + "XMM12": ["0x1AC415407B8BA3DB", "0x92CDC300DAB0773C", "0x1AC415407B8BA3DB", "0x92CDC300DAB0773C"], + "XMM13": ["0x6796B1563F8D578C", "0x4C64F16199291FE4", "0x6796B1563F8D578C", "0x4C64F16199291FE4"], + "XMM14": ["0x01A14EF664207DC6", "0x1D3220DA400E1027", "0x01A14EF664207DC6", "0x1D3220DA400E1027"], + "XMM15": ["0x75DDBA582C3DD348", "0xA5141C506D8C60D7", "0x75DDBA582C3DD348", "0xA5141C506D8C60D7"] + } +} +%endif + +lea rdx, [rel .data] + +vmovaps ymm1, [rdx + 32 * 0] +vmovaps ymm2, [rdx + 32 * 1] +vmovaps ymm3, [rdx + 32 * 2] +vmovaps ymm4, [rdx + 32 * 3] +vmovaps ymm5, [rdx + 32 * 4] +vmovaps ymm6, [rdx + 32 * 5] +vmovaps ymm7, [rdx + 32 * 6] +vmovaps ymm8, [rdx + 32 * 7] + +vmovaps ymm9, [rdx + 32 * 0] +vmovaps ymm10, [rdx + 32 * 1] +vmovaps ymm11, [rdx + 32 * 2] +vmovaps ymm12, [rdx + 32 * 3] +vmovaps ymm13, [rdx + 32 * 4] +vmovaps ymm14, [rdx + 32 * 5] +vmovaps ymm15, [rdx + 32 * 6] + +vpmulld xmm1, xmm1, [rdx + 32 * 8] +vpmulld xmm2, xmm2, [rdx + 32 * 9] +vpmulld xmm3, xmm3, [rdx + 32 * 10] +vpmulld xmm4, xmm4, [rdx + 32 * 11] +vpmulld xmm5, xmm5, [rdx + 32 * 12] +vpmulld xmm6, xmm6, [rdx + 32 * 13] +vpmulld xmm7, xmm7, [rdx + 32 * 14] +vpmulld xmm8, xmm8, [rdx + 32 * 15] + +vpmulld ymm9, ymm9, [rdx + 32 * 8] +vpmulld ymm10, ymm10, [rdx + 32 * 9] +vpmulld ymm11, ymm11, [rdx + 32 * 10] +vpmulld ymm12, ymm12, [rdx + 32 * 11] +vpmulld ymm13, ymm13, [rdx + 32 * 12] +vpmulld ymm14, ymm14, [rdx + 32 * 13] +vpmulld ymm15, ymm15, [rdx + 32 * 14] + +hlt + +align 32 +.data: +dd 655.9708, 532.2244, 108.0451, 512.4019 +dd 655.9708, 532.2244, 108.0451, 512.4019 + +dd 754.227 , 586.0859, 127.7574, 114.8167 +dd 754.227 , 586.0859, 127.7574, 114.8167 + +dd 764.4266, 226.6145, 337.864 , 320.3296 +dd 764.4266, 226.6145, 337.864 , 320.3296 + +dd 296.5247, 480.0057, 28.4267 , 565.9418 +dd 296.5247, 480.0057, 28.4267 , 565.9418 + +dd 265.8255, 536.4473, 754.3489, 460.681 +dd 265.8255, 536.4473, 754.3489, 460.681 + +dd 818.7269, 43.7204 , 464.592 , 847.9381 +dd 818.7269, 43.7204 , 464.592 , 847.9381 + +dd 306.0592, 702.7584, 887.6473, 551.5908 +dd 306.0592, 702.7584, 887.6473, 551.5908 + +dd 620.9001, 520.9829, 232.9532, 510.3388 +dd 620.9001, 520.9829, 232.9532, 510.3388 + +dd 204.8474, 225.626 , 564.973 , 790.5175 +dd 204.8474, 225.626 , 564.973 , 790.5175 + +dd 836.1953, 844.5266, 633.5626, 501.7409 +dd 836.1953, 844.5266, 633.5626, 501.7409 + +dd 393.2616, 674.4415, 244.3265, 971.1598 +dd 393.2616, 674.4415, 244.3265, 971.1598 + +dd 770.8029, 746.1836, 255.9902, 567.7578 +dd 770.8029, 746.1836, 255.9902, 567.7578 + +dd 187.7175, 924.181 , 466.4362, 169.8267 +dd 187.7175, 924.181 , 466.4362, 169.8267 + +dd 651.7481, 462.4206, 396.6924, 355.8538 +dd 651.7481, 462.4206, 396.6924, 355.8538 + +dd 6.148 , 523.1443, 989.7004, 713.6646 +dd 6.148 , 523.1443, 989.7004, 713.6646 + +dd 497.5427, 657.6965, 651.0534, 778.5236 +dd 497.5427, 657.6965, 651.0534, 778.5236 diff --git a/unittests/ASM/VEX/vpmullw.asm b/unittests/ASM/VEX/vpmullw.asm new file mode 100644 index 000000000..4cabd315c --- /dev/null +++ b/unittests/ASM/VEX/vpmullw.asm @@ -0,0 +1,39 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX"], + "RegData": { + "XMM2": ["0xFD44929037E4ED40", "0x68847E10A3A4D940", "0x0000000000000000", "0x0000000000000000"], + "XMM3": ["0xFD44929037E4ED40", "0x68847E10A3A4D940", "0x0000000000000000", "0x0000000000000000"], + "XMM4": ["0xFD44929037E4ED40", "0x68847E10A3A4D940", "0xFD44929037E4ED40", "0x68847E10A3A4D940"], + "XMM5": ["0xFD44929037E4ED40", "0x68847E10A3A4D940", "0xFD44929037E4ED40", "0x68847E10A3A4D940"] + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +lea rdx, [rel .data] + +vmovapd ymm0, [rdx] +vmovapd ymm1, [rdx + 32] + +vpmullw xmm2, xmm0, xmm1 +vpmullw xmm3, xmm0, [rdx + 32] + +vpmullw ymm4, ymm0, ymm1 +vpmullw ymm5, ymm0, [rdx + 32] + +hlt + +align 32 +.data: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x4142434445464748 +dq 0x5152535455565758 + +dq 0x6162636465666768 +dq 0x7172737475767778 +dq 0x6162636465666768 +dq 0x7172737475767778