From 042a71be96a7a8a76364ca76bc3418fe83160a6b Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Mon, 22 Mar 2021 08:03:23 -0700 Subject: [PATCH 1/5] Get the runner's label for testing disabled tests later --- .github/workflows/ccpp.yml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.github/workflows/ccpp.yml b/.github/workflows/ccpp.yml index fc87251ec..f443674c9 100644 --- a/.github/workflows/ccpp.yml +++ b/.github/workflows/ccpp.yml @@ -25,6 +25,9 @@ jobs: steps: - uses: actions/checkout@v2 + - name: Set runner label + run: echo "runner_label=${{ matrix.arch[1] }}" >> $GITHUB_ENV + - name : submodule checkout # Need to update submodules run: git submodule update --init --depth 1 From de890e73870d935dae3359e564724fe6556df800 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Mon, 22 Mar 2021 08:16:52 -0700 Subject: [PATCH 2/5] Have unit tests check for runner label --- Scripts/testharness_runner.py | 16 +++++++++++----- unittests/32Bit_ASM/CMakeLists.txt | 6 ++++++ unittests/ASM/CMakeLists.txt | 6 ++++++ unittests/IR/CMakeLists.txt | 6 ++++++ 4 files changed, 29 insertions(+), 5 deletions(-) diff --git a/Scripts/testharness_runner.py b/Scripts/testharness_runner.py index dd7e40c5f..6db976a67 100644 --- a/Scripts/testharness_runner.py +++ b/Scripts/testharness_runner.py @@ -4,9 +4,9 @@ import subprocess import os.path from os import path -# Args: ... +# Args: ... -if (len(sys.argv) < 6): +if (len(sys.argv) < 7): sys.exit() known_failures = {} @@ -14,10 +14,11 @@ disabled_tests = {} known_failures_file = sys.argv[1] disabled_tests_file = sys.argv[2] disabled_tests_type_file = sys.argv[3] +disabled_tests_runner_file = sys.argv[4] -current_test = sys.argv[4] -runner = sys.argv[5] -args_start_index = 6 +current_test = sys.argv[5] +runner = sys.argv[6] +args_start_index = 7 # Open the known failures file and add it to a dictionary with open(known_failures_file) as kff: @@ -33,6 +34,11 @@ if path.exists(disabled_tests_type_file): for line in dtf: disabled_tests[line.strip()] = 1 +if path.exists(disabled_tests_runner_file): + with open(disabled_tests_runner_file) as dtf: + for line in dtf: + disabled_tests[line.strip()] = 1 + RunnerArgs = ["catchsegv", runner] # Add the rest of the arguments for i in range(len(sys.argv) - args_start_index): diff --git a/unittests/32Bit_ASM/CMakeLists.txt b/unittests/32Bit_ASM/CMakeLists.txt index 262cfaeab..50dc0c371 100644 --- a/unittests/32Bit_ASM/CMakeLists.txt +++ b/unittests/32Bit_ASM/CMakeLists.txt @@ -55,6 +55,11 @@ foreach(ASM_SRC ${ASM_SOURCES}) "-c irjit -n 500 --multiblock" "jit_500_m" "jit" ) + set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests") + if (DEFINED ENV{runner_label}) + set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests_$ENV{runner_label}") + endif() + list(LENGTH TEST_ARGS ARG_COUNT) math(EXPR ARG_COUNT "${ARG_COUNT}-1") foreach(Index RANGE 0 ${ARG_COUNT} 3) @@ -72,6 +77,7 @@ foreach(ASM_SRC ${ASM_SOURCES}) "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Known_Failures" "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Disabled_Tests" "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Disabled_Tests_${TEST_TYPE}" + "${RUNNER_DISABLED}" "Test_32Bit_${REL_TEST_ASM}" "${CMAKE_BINARY_DIR}/Bin/TestHarnessRunner" ${ARGS_LIST} "${OUTPUT_NAME}" "${OUTPUT_CONFIG_NAME}") diff --git a/unittests/ASM/CMakeLists.txt b/unittests/ASM/CMakeLists.txt index 3d2e0478a..3b7ad0a0c 100644 --- a/unittests/ASM/CMakeLists.txt +++ b/unittests/ASM/CMakeLists.txt @@ -60,6 +60,11 @@ foreach(ASM_SRC ${ASM_SOURCES}) ) endif() + set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests") + if (DEFINED ENV{runner_label}) + set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests_$ENV{runner_label}") + endif() + list(LENGTH TEST_ARGS ARG_COUNT) math(EXPR ARG_COUNT "${ARG_COUNT}-1") foreach(Index RANGE 0 ${ARG_COUNT} 3) @@ -82,6 +87,7 @@ foreach(ASM_SRC ${ASM_SOURCES}) "${CMAKE_SOURCE_DIR}/unittests/ASM/Known_Failures" "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests" "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests_${TEST_TYPE}" + "${RUNNER_DISABLED}" "Test_${REL_TEST_ASM}" "${CMAKE_BINARY_DIR}/Bin/TestHarnessRunner" ${ARGS_LIST} "${OUTPUT_NAME}" "${OUTPUT_CONFIG_NAME}") diff --git a/unittests/IR/CMakeLists.txt b/unittests/IR/CMakeLists.txt index afb81b277..f56f87559 100644 --- a/unittests/IR/CMakeLists.txt +++ b/unittests/IR/CMakeLists.txt @@ -26,6 +26,11 @@ foreach(IR_SRC ${IR_SOURCES}) "-c irjit -n 500" "ir_jit" "jit" ) + set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests") + if (DEFINED ENV{runner_label}) + set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests_$ENV{runner_label}") + endif() + list(LENGTH TEST_ARGS ARG_COUNT) math(EXPR ARG_COUNT "${ARG_COUNT}-1") foreach(Index RANGE 0 ${ARG_COUNT} 3) @@ -46,6 +51,7 @@ foreach(IR_SRC ${IR_SOURCES}) "${CMAKE_SOURCE_DIR}/unittests/IR/Known_Failures" "${CMAKE_SOURCE_DIR}/unittests/IR/Disabled_Tests" "${CMAKE_SOURCE_DIR}/unittests/IR/Disabled_Tests_${TEST_TYPE}" + "${RUNNER_DISABLED}" "Test_${IR_NAME}" "${CMAKE_BINARY_DIR}/Bin/IRLoader" ${ARGS_LIST} "${IR_SRC}" "${OUTPUT_CONFIG_NAME}") From 998e53aa70274c1b47d51897d6a07c59d0298acb Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Mon, 22 Mar 2021 08:17:10 -0700 Subject: [PATCH 3/5] Only disabled unaligned atomics test on ARMv8.0 --- unittests/ASM/Disabled_Tests | 40 ---------------------------- unittests/ASM/Disabled_Tests_ARMv8.0 | 39 +++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 40 deletions(-) create mode 100644 unittests/ASM/Disabled_Tests_ARMv8.0 diff --git a/unittests/ASM/Disabled_Tests b/unittests/ASM/Disabled_Tests index ba0376f78..38d8597da 100644 --- a/unittests/ASM/Disabled_Tests +++ b/unittests/ASM/Disabled_Tests @@ -23,43 +23,3 @@ Test_Primary/Primary_E9.asm Test_X87/D9_F9.asm Test_X87/D9_F2.asm - -# Doesn't support unaligned on armv8.0 -Test_TwoByte/0F_B0_2.asm -Test_TwoByte/0F_B0_3.asm -Test_TwoByte/0F_B0_4.asm -Test_TwoByte/0F_B0_5.asm -Test_TwoByte/0F_B0_6.asm -Test_TwoByte/0F_B0_7.asm -Test_Secondary/09_XX_01_7.asm -Test_Secondary/09_XX_01_8.asm -Test_Secondary/09_XX_01_9.asm - -# Doesn't support unaligned atomic memory ops on armv8.0 -Test_Primary/Primary_01_Atomic16.asm -Test_Primary/Primary_01_Atomic32.asm -Test_Primary/Primary_01_Atomic64.asm -Test_Primary/Primary_09_Atomic16.asm -Test_Primary/Primary_09_Atomic32.asm -Test_Primary/Primary_09_Atomic64.asm -Test_Primary/Primary_23_Atomic16.asm -Test_Primary/Primary_23_Atomic32.asm -Test_Primary/Primary_23_Atomic64.asm -Test_Primary/Primary_29_Atomic16.asm -Test_Primary/Primary_29_Atomic32.asm -Test_Primary/Primary_29_Atomic64.asm -Test_Primary/Primary_31_Atomic16.asm -Test_Primary/Primary_31_Atomic32.asm -Test_Primary/Primary_31_Atomic64.asm -Test_Primary/Primary_87_Atomic16.asm -Test_Primary/Primary_87_Atomic32.asm -Test_Primary/Primary_87_Atomic64.asm -Test_Primary/Primary_FF_0_Atomic16.asm -Test_Primary/Primary_FF_0_Atomic32.asm -Test_Primary/Primary_FF_0_Atomic64.asm -Test_Primary/Primary_FF_1_Atomic16.asm -Test_Primary/Primary_FF_1_Atomic32.asm -Test_Primary/Primary_FF_1_Atomic64.asm -Test_TwoByte/0F_C0_Atomic16.asm -Test_TwoByte/0F_C0_Atomic32.asm -Test_TwoByte/0F_C0_Atomic64.asm diff --git a/unittests/ASM/Disabled_Tests_ARMv8.0 b/unittests/ASM/Disabled_Tests_ARMv8.0 new file mode 100644 index 000000000..63fbc2dc0 --- /dev/null +++ b/unittests/ASM/Disabled_Tests_ARMv8.0 @@ -0,0 +1,39 @@ +# Doesn't support unaligned on armv8.0 +Test_TwoByte/0F_B0_2.asm +Test_TwoByte/0F_B0_3.asm +Test_TwoByte/0F_B0_4.asm +Test_TwoByte/0F_B0_5.asm +Test_TwoByte/0F_B0_6.asm +Test_TwoByte/0F_B0_7.asm +Test_Secondary/09_XX_01_7.asm +Test_Secondary/09_XX_01_8.asm +Test_Secondary/09_XX_01_9.asm + +# Doesn't support unaligned atomic memory ops on armv8.0 +Test_Primary/Primary_01_Atomic16.asm +Test_Primary/Primary_01_Atomic32.asm +Test_Primary/Primary_01_Atomic64.asm +Test_Primary/Primary_09_Atomic16.asm +Test_Primary/Primary_09_Atomic32.asm +Test_Primary/Primary_09_Atomic64.asm +Test_Primary/Primary_23_Atomic16.asm +Test_Primary/Primary_23_Atomic32.asm +Test_Primary/Primary_23_Atomic64.asm +Test_Primary/Primary_29_Atomic16.asm +Test_Primary/Primary_29_Atomic32.asm +Test_Primary/Primary_29_Atomic64.asm +Test_Primary/Primary_31_Atomic16.asm +Test_Primary/Primary_31_Atomic32.asm +Test_Primary/Primary_31_Atomic64.asm +Test_Primary/Primary_87_Atomic16.asm +Test_Primary/Primary_87_Atomic32.asm +Test_Primary/Primary_87_Atomic64.asm +Test_Primary/Primary_FF_0_Atomic16.asm +Test_Primary/Primary_FF_0_Atomic32.asm +Test_Primary/Primary_FF_0_Atomic64.asm +Test_Primary/Primary_FF_1_Atomic16.asm +Test_Primary/Primary_FF_1_Atomic32.asm +Test_Primary/Primary_FF_1_Atomic64.asm +Test_TwoByte/0F_C0_Atomic16.asm +Test_TwoByte/0F_C0_Atomic32.asm +Test_TwoByte/0F_C0_Atomic64.asm From ca24ea1d366cddda5dd48678568ddcb6f93eb47a Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Mon, 22 Mar 2021 09:01:37 -0700 Subject: [PATCH 4/5] Fixes missing HandledLock on XCHG --- External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index d27b77fd5..d53121896 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -1350,6 +1350,7 @@ void OpDispatchBuilder::XCHGOp(OpcodeArgs) { OrderedNode *Src = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, -1); if (DestIsMem(Op)) { + HandledLock = Op->Flags & FEXCore::X86Tables::DecodeFlags::FLAG_LOCK; OrderedNode *Dest = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, -1, false); Dest = AppendSegmentOffset(Dest, Op->Flags); From e5a9bd4d3ebdf1f9310e938577a3d674b5b53ab3 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Mon, 22 Mar 2021 09:02:19 -0700 Subject: [PATCH 5/5] Fixes incorrect result on cmpxchg reg, reg failure when regsize = 32bit --- External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index d53121896..de9cdff62 100644 --- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -4376,7 +4376,7 @@ void OpDispatchBuilder::CMPXCHGOp(OpcodeArgs) { // This allows us to only hit the ZEXT case on failure OrderedNode *RAXResult = _Select(FEXCore::IR::COND_EQ, CASResult, Src3Lower, - Src3, Src3Lower); + Src3, Src1Lower); // When the size is 4 we need to make sure not zext the GPR when the comparison fails _StoreContext(GPRClass, GPRSize, offsetof(FEXCore::Core::CPUState, gregs[FEXCore::X86State::REG_RAX]), RAXResult);