From a1378f94ce8e7843d5a3cd27bc72847973f8e7ec Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Fri, 28 Jun 2024 15:42:13 +0200 Subject: [PATCH 1/3] X87 Code Refactoring and Optimization Pass --- FEXCore/Source/CMakeLists.txt | 1 + .../Interface/Core/OpcodeDispatcher.cpp | 131 +- .../Source/Interface/Core/OpcodeDispatcher.h | 67 +- .../Core/OpcodeDispatcher/Vector.cpp | 4 +- .../Interface/Core/OpcodeDispatcher/X87.cpp | 1185 ++++++----------- .../Core/OpcodeDispatcher/X87F64.cpp | 795 ++++------- FEXCore/Source/Interface/IR/PassManager.cpp | 1 + FEXCore/Source/Interface/IR/Passes.h | 1 + .../IR/Passes/x87StackOptimizationPass.cpp | 1069 +++++++++++++++ docs/SourceOutline.md | 3 +- unittests/gcc-target-tests-32/Known_Failures | 1 - unittests/gcc-target-tests-64/Known_Failures | 9 - 12 files changed, 1858 insertions(+), 1409 deletions(-) create mode 100644 FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp diff --git a/FEXCore/Source/CMakeLists.txt b/FEXCore/Source/CMakeLists.txt index 46dbde877..4dafa6c0d 100644 --- a/FEXCore/Source/CMakeLists.txt +++ b/FEXCore/Source/CMakeLists.txt @@ -143,6 +143,7 @@ set (SRCS Interface/IR/Passes/RedundantFlagCalculationElimination.cpp Interface/IR/Passes/DeadStoreElimination.cpp Interface/IR/Passes/RegisterAllocationPass.cpp + Interface/IR/Passes/x87StackOptimizationPass.cpp Utils/Telemetry.cpp Utils/Threads.cpp Utils/Profiler.cpp diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 16a32ed5e..3eb6ea40b 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -10,6 +10,7 @@ $end_info$ #include "Interface/Context/Context.h" #include "Interface/Core/OpcodeDispatcher.h" #include "Interface/Core/X86Tables/X86Tables.h" +#include "Interface/IR/IR.h" #include "Interface/IR/IREmitter.h" #include @@ -6236,9 +6237,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 1 = Invalid - {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 32>}, + {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 32>}, - {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 32>}, + {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 32>}, {OPDReg(0xD9, 4) | 0x00, 8, &OpDispatchBuilder::X87LDENVF64}, @@ -6248,16 +6249,16 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xD9, 7) | 0x00, 8, &OpDispatchBuilder::X87FSTCW}, - {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64, 80>}, + {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDFromStack>}, {OPD(0xD9, 0xC8), 8, &OpDispatchBuilder::FXCH}, {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::NOPOp}, // FNOP // D1 = Invalid // D8 = Invalid - {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::FCHSF64}, - {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::FABSF64}, + {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKCHANGESIGN, false>}, + {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKABS, false>}, // E2 = Invalid {OPD(0xD9, 0xE4), 1, &OpDispatchBuilder::FTSTF64}, - {OPD(0xD9, 0xE5), 1, &OpDispatchBuilder::X87FXAMF64}, + {OPD(0xD9, 0xE5), 1, &OpDispatchBuilder::X87FXAM}, // E6 = Invalid {OPD(0xD9, 0xE8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64_Const, 0x3FF0000000000000>}, // 1.0 {OPD(0xD9, 0xE9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64_Const, 0x400A934F0979A372>}, // log2l(10) @@ -6268,22 +6269,22 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xD9, 0xEE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64_Const, 0>}, // 0.0 // EF = Invalid - {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOpF64, IR::OP_F64F2XM1>}, - {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::X87FYL2XF64}, - {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::X87TANF64}, - {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::X87ATANF64}, - {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::FXTRACTF64}, - {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOpF64, IR::OP_F64FPREM1>}, + {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80F2XM1STACK, false>}, + {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, false>}, + {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80PTANSTACK, true>}, + {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ATANSTACK, false>}, + {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80XTRACTSTACK, false>}, + {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREM1STACK, true>}, {OPD(0xD9, 0xF6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, false>}, {OPD(0xD9, 0xF7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, true>}, - {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOpF64, IR::OP_F64FPREM>}, - {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::X87FYL2XF64}, - {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::FSQRTF64}, - {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::X87SinCosF64}, - {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::FRNDINTF64}, - {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOpF64, IR::OP_F64SCALE>}, - {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOpF64, IR::OP_F64SIN>}, - {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOpF64, IR::OP_F64COS>}, + {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREMSTACK, true>}, + {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, true>}, + {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SQRTSTACK, false>}, + {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINCOSSTACK, true>}, + {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ROUNDSTACK, false>}, + {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SCALESTACK, false>}, + {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINSTACK, true>}, + {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80COSSTACK, true>}, {OPDReg(0xDA, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADDF64, 32, true, OpDispatchBuilder::OpResult::RES_ST0>}, @@ -6326,7 +6327,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 6 = Invalid - {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 80>}, + {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 80>}, {OPD(0xDB, 0xC0), 8, &OpDispatchBuilder::X87FCMOV}, @@ -6360,18 +6361,18 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDC, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADDF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDC, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMULF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDD, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64, 64>}, {OPDReg(0xDD, 1) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FISTF64, true>}, - {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 64>}, + {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 64>}, - {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 64>}, + {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 64>}, {OPDReg(0xDD, 4) | 0x00, 8, &OpDispatchBuilder::X87FRSTORF64}, @@ -6381,8 +6382,8 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xDD, 7) | 0x00, 8, &OpDispatchBuilder::X87FNSTSW}, {OPD(0xDD, 0xC0), 8, &OpDispatchBuilder::X87FFREE}, - {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::FST}, // register-register from regular X87 - {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::FST}, //^ + {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, // register-register from regular X87 + {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, //^ {OPD(0xDD, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMIF64, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, {OPD(0xDD, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMIF64, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, @@ -6406,10 +6407,10 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDE, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADDF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMULF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xD9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMIF64, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, true>}, - {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDF, 0) | 0x00, 8, &OpDispatchBuilder::FILDF64}, @@ -6466,9 +6467,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 1 = Invalid - {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 32>}, + {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 32>}, - {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 32>}, + {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 32>}, {OPDReg(0xD9, 4) | 0x00, 8, &OpDispatchBuilder::X87LDENV}, @@ -6478,13 +6479,13 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xD9, 7) | 0x00, 8, &OpDispatchBuilder::X87FSTCW}, - {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLD, 80>}, + {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDFromStack>}, {OPD(0xD9, 0xC8), 8, &OpDispatchBuilder::FXCH}, {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::NOPOp}, // FNOP // D1 = Invalid // D8 = Invalid - {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::FCHS}, - {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::FABS}, + {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKCHANGESIGN, false>}, + {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKABS, false>}, // E2 = Invalid {OPD(0xD9, 0xE4), 1, &OpDispatchBuilder::FTST}, {OPD(0xD9, 0xE5), 1, &OpDispatchBuilder::X87FXAM}, @@ -6498,22 +6499,22 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xD9, 0xEE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLD_Const, NamedVectorConstant::NAMED_VECTOR_ZERO>}, // 0.0 // EF = Invalid - {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80F2XM1>}, - {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::X87FYL2X}, - {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::X87TAN}, - {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::X87ATAN}, - {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::FXTRACT}, - {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOp, IR::OP_F80FPREM1>}, + {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80F2XM1STACK, false>}, + {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, false>}, + {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80PTANSTACK, true>}, + {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ATANSTACK, false>}, + {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80XTRACTSTACK, false>}, + {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREM1STACK, true>}, {OPD(0xD9, 0xF6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, false>}, {OPD(0xD9, 0xF7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, true>}, - {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOp, IR::OP_F80FPREM>}, - {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::X87FYL2X}, - {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80SQRT>}, - {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::X87SinCos}, - {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::FRNDINT}, - {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOp, IR::OP_F80SCALE>}, - {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80SIN>}, - {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80COS>}, + {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREMSTACK, true>}, + {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, true>}, + {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SQRTSTACK, false>}, + {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINCOSSTACK, true>}, + {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ROUNDSTACK, false>}, + {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SCALESTACK, false>}, + {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINSTACK, true>}, + {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80COSSTACK, true>}, {OPDReg(0xDA, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADD, 32, true, OpDispatchBuilder::OpResult::RES_ST0>}, @@ -6556,7 +6557,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 6 = Invalid - {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 80>}, + {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 80>}, {OPD(0xDB, 0xC0), 8, &OpDispatchBuilder::X87FCMOV}, @@ -6590,18 +6591,18 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDC, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADD, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDC, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMUL, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDD, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLD, 64>}, {OPDReg(0xDD, 1) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FIST, true>}, - {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 64>}, + {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 64>}, - {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 64>}, + {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 64>}, {OPDReg(0xDD, 4) | 0x00, 8, &OpDispatchBuilder::X87FRSTOR}, @@ -6611,8 +6612,8 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xDD, 7) | 0x00, 8, &OpDispatchBuilder::X87FNSTSW}, {OPD(0xDD, 0xC0), 8, &OpDispatchBuilder::X87FFREE}, - {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::FST}, - {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::FST}, + {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, + {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, {OPD(0xDD, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMI, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, {OPD(0xDD, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMI, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, @@ -6636,10 +6637,10 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDE, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADD, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMUL, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xD9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMI, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, true>}, - {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDF, 0) | 0x00, 8, &OpDispatchBuilder::FILD}, diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 248d7c577..1fc628e3e 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -731,45 +731,42 @@ public: void VZEROOp(OpcodeArgs); // X87 Ops - Ref ReconstructFSW(); + Ref ReconstructFSW_Helper(Ref T = nullptr); // Returns new x87 stack top from FSW. - Ref ReconstructX87StateFromFSW(Ref FSW); - void FLD(OpcodeArgs, size_t width); - void FLD_Const(OpcodeArgs, NamedVectorConstant constant); + Ref ReconstructX87StateFromFSW_Helper(Ref FSW); + void FLD(OpcodeArgs, size_t Width); + void FLDFromStack(OpcodeArgs); + void FLD_Const(OpcodeArgs, NamedVectorConstant Constant); void FBLD(OpcodeArgs); void FBSTP(OpcodeArgs); void FILD(OpcodeArgs); - void FSTWithWidth(OpcodeArgs, size_t width); - - void FST(OpcodeArgs); + void FST(OpcodeArgs, size_t Width); + void FSTToStack(OpcodeArgs); void FIST(OpcodeArgs, bool Truncate); + // OpResult is used for Stack operations, + // describes if the result of the operation is stored in ST(0) or ST(i), + // where ST(i) is one of the arguments to the operation. enum class OpResult { RES_ST0, RES_STI, }; - void FADD(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FMUL(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FDIV(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); - void FSUB(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); - void FCHS(OpcodeArgs); - void FABS(OpcodeArgs); + + void X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool ZeroC2); + void FADD(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FMUL(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FDIV(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); + void FSUB(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); void FTST(OpcodeArgs); - void FRNDINT(OpcodeArgs); - void FXTRACT(OpcodeArgs); void FNINIT(OpcodeArgs); - void X87UnaryOp(OpcodeArgs, FEXCore::IR::IROps IROp); - void X87BinaryOp(OpcodeArgs, FEXCore::IR::IROps IROp); void X87ModifySTP(OpcodeArgs, bool Inc); void X87SinCos(OpcodeArgs); - void X87FYL2X(OpcodeArgs); - void X87TAN(OpcodeArgs); - void X87ATAN(OpcodeArgs); + void X87FYL2X(OpcodeArgs, bool IsFYL2XP1); void X87LDENV(OpcodeArgs); void X87FLDCW(OpcodeArgs); void X87FNSTENV(OpcodeArgs); @@ -789,27 +786,25 @@ public: FLAGS_X87, FLAGS_RFLAGS, }; - void FCOMI(OpcodeArgs, size_t width, bool Integer, FCOMIFlags whichflags, bool poptwice); + void FCOMI(OpcodeArgs, size_t Width, bool Integer, FCOMIFlags WhichFlags, bool PopTwice); // F64 X87 Ops - void FLDF64(OpcodeArgs, size_t width); - void FLDF64_Const(OpcodeArgs, uint64_t num); + void FLDF64(OpcodeArgs, size_t Width); + void FLDF64_Const(OpcodeArgs, uint64_t Num); void FBLDF64(OpcodeArgs); void FBSTPF64(OpcodeArgs); void FILDF64(OpcodeArgs); - void FSTF64WithWidth(OpcodeArgs, size_t width); - - void FSTF64(OpcodeArgs); + void FSTF64(OpcodeArgs, size_t Width); void FISTF64(OpcodeArgs, bool Truncate); - void FADDF64(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FMULF64(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FDIVF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); - void FSUBF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); + void FADDF64(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FMULF64(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FDIVF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); + void FSUBF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); void FCHSF64(OpcodeArgs); void FABSF64(OpcodeArgs); void FTSTF64(OpcodeArgs); @@ -821,7 +816,6 @@ public: void X87BinaryOpF64(OpcodeArgs, FEXCore::IR::IROps IROp); void X87SinCosF64(OpcodeArgs); void X87FLDCWF64(OpcodeArgs); - void X87FYL2XF64(OpcodeArgs); void X87TANF64(OpcodeArgs); void X87ATANF64(OpcodeArgs); void X87FNSAVEF64(OpcodeArgs); @@ -1323,6 +1317,8 @@ protected: } private: + FEX_CONFIG_OPT(ReducedPrecisionMode, X87REDUCEDPRECISION); + struct JumpTargetInfo { Ref BlockEntry; bool HaveEmitted; @@ -1962,7 +1958,11 @@ private: // First, set flags according to Arm FCMP. HandleNZCVWrite(); _FCmp(ElementSize, Src1, Src2); + ComissFlags(InvalidateAF); + } + // Sets flags for a COMISS instruction + void ComissFlags(bool InvalidateAF = false) { // Now set COMISS flags by converts NZCV from the Arm representation to an // eXternal representation that's totally not a euphemism for x86, nuh-uh. if (CTX->HostFeatures.SupportsFlagM2) { @@ -2262,12 +2262,9 @@ private: /** @} */ Ref GetX87Top(); - void SetX87ValidTag(Ref Value, bool Valid); - Ref GetX87ValidTag(Ref Value); Ref GetX87Tag(Ref Value, Ref AbridgedFTW); - Ref GetX87Tag(Ref Value); void SetX87FTW(Ref FTW); - Ref GetX87FTW(); + Ref GetX87FTW_Helper(); void SetX87Top(Ref Value); bool DestIsLockedMem(FEXCore::X86Tables::DecodedOp Op) const { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index 89c18c10a..e2e0256f4 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -2688,7 +2688,7 @@ void OpDispatchBuilder::SaveX87State(OpcodeArgs, Ref MemBase) { _StoreMem(GPRClass, 2, MemBase, FCW, 2); } - { _StoreMem(GPRClass, 2, ReconstructFSW(), MemBase, _Constant(2), 2, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, 2, ReconstructFSW_Helper(), MemBase, _Constant(2), 2, MEM_OFFSET_SXTX, 1); } { // Abridged FTW @@ -2863,7 +2863,7 @@ void OpDispatchBuilder::RestoreX87State(Ref MemBase) { { auto NewFSW = _LoadMem(GPRClass, 2, MemBase, _Constant(2), 2, MEM_OFFSET_SXTX, 1); - ReconstructX87StateFromFSW(NewFSW); + ReconstructX87StateFromFSW_Helper(NewFSW); } { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp index 4158ee6f0..c2b56f236 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp @@ -8,6 +8,7 @@ $end_info$ #include "Interface/Core/OpcodeDispatcher.h" #include "Interface/Core/X86Tables/X86Tables.h" +#include "Interface/IR/IR.h" #include #include @@ -20,7 +21,6 @@ $end_info$ namespace FEXCore::IR { class OrderedNode; - #define OpcodeArgs [[maybe_unused]] FEXCore::X86Tables::DecodedOp Op Ref OpDispatchBuilder::GetX87Top() { @@ -29,19 +29,6 @@ Ref OpDispatchBuilder::GetX87Top() { return _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); } -void OpDispatchBuilder::SetX87ValidTag(Ref Value, bool Valid) { - // if we are popping then we must first mark this location as empty - Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); - Ref RegMask = _Lshl(OpSize::i32Bit, _Constant(1), Value); - Ref NewAbridgedFTW = Valid ? _Or(OpSize::i32Bit, AbridgedFTW, RegMask) : _Andn(OpSize::i32Bit, AbridgedFTW, RegMask); - StoreContext(AbridgedFTWIndex, NewAbridgedFTW); -} - -Ref OpDispatchBuilder::GetX87ValidTag(Ref Value) { - Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); - return _And(OpSize::i32Bit, _Lshr(OpSize::i32Bit, AbridgedFTW, Value), _Constant(1)); -} - Ref OpDispatchBuilder::GetX87Tag(Ref Value, Ref AbridgedFTW) { Ref RegValid = _And(OpSize::i32Bit, _Lshr(OpSize::i32Bit, AbridgedFTW, Value), _Constant(1)); Ref X87Empty = _Constant(static_cast(FPState::X87Tag::Empty)); @@ -50,10 +37,6 @@ Ref OpDispatchBuilder::GetX87Tag(Ref Value, Ref AbridgedFTW) { return _Select(FEXCore::IR::COND_EQ, RegValid, _Constant(0), X87Empty, X87Valid); } -Ref OpDispatchBuilder::GetX87Tag(Ref Value) { - return GetX87Tag(Value, LoadContext(AbridgedFTWIndex)); -} - void OpDispatchBuilder::SetX87FTW(Ref FTW) { Ref X87Empty = _Constant(static_cast(FPState::X87Tag::Empty)); Ref NewAbridgedFTW; @@ -72,156 +55,67 @@ void OpDispatchBuilder::SetX87FTW(Ref FTW) { StoreContext(AbridgedFTWIndex, NewAbridgedFTW); } -Ref OpDispatchBuilder::GetX87FTW() { - Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); - Ref FTW = _Constant(0); - - for (int i = 0; i < 8; i++) { - const auto RegTag = GetX87Tag(_Constant(i), AbridgedFTW); - FTW = _Orlshl(OpSize::i32Bit, FTW, RegTag, i * 2); - } - - return FTW; -} - void OpDispatchBuilder::SetX87Top(Ref Value) { _StoreContext(1, GPRClass, Value, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); } -Ref OpDispatchBuilder::ReconstructFSW() { - // We must construct the FSW from our various bits - auto C0 = GetRFLAG(FEXCore::X86State::X87FLAG_C0_LOC); - auto C1 = GetRFLAG(FEXCore::X86State::X87FLAG_C1_LOC); - auto C2 = GetRFLAG(FEXCore::X86State::X87FLAG_C2_LOC); - auto C3 = GetRFLAG(FEXCore::X86State::X87FLAG_C3_LOC); - - Ref FSW = _Lshl(OpSize::i64Bit, C0, _Constant(8)); - FSW = _Orlshl(OpSize::i64Bit, FSW, C1, 9); - FSW = _Orlshl(OpSize::i64Bit, FSW, C2, 10); - FSW = _Orlshl(OpSize::i64Bit, FSW, C3, 14); - - auto Top = GetX87Top(); - FSW = _Bfi(OpSize::i64Bit, 3, 11, FSW, Top); - return FSW; -} - -Ref OpDispatchBuilder::ReconstructX87StateFromFSW(Ref FSW) { - auto Top = _Bfe(OpSize::i32Bit, 3, 11, FSW); - SetX87Top(Top); - - auto C0 = _Bfe(OpSize::i32Bit, 1, 8, FSW); - auto C1 = _Bfe(OpSize::i32Bit, 1, 9, FSW); - auto C2 = _Bfe(OpSize::i32Bit, 1, 10, FSW); - auto C3 = _Bfe(OpSize::i32Bit, 1, 14, FSW); - - SetRFLAG(C0); - SetRFLAG(C1); - SetRFLAG(C2); - SetRFLAG(C3); - return Top; -} - -void OpDispatchBuilder::FLD(OpcodeArgs, size_t width) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - - size_t read_width = (width == 80) ? 16 : width / 8; - - Ref data {}; - - if (!Op->Src[0].IsNone()) { - // Read from memory - data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], read_width, Op->Flags); - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - data = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, offset), mask); - data = _LoadContextIndexed(data, 16, MMBaseOffset(), 16, FPRClass); - } - Ref converted = data; +// Float LoaD operation with memory operand +void OpDispatchBuilder::FLD(OpcodeArgs, size_t Width) { + size_t ReadWidth = (Width == 80) ? 16 : Width / 8; + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); + Ref ConvertedData = Data; // Convert to 80bit float - if (width == 32 || width == 64) { - converted = _F80CVTTo(data, width / 8); + if (Width == 32 || Width == 64) { + ConvertedData = _F80CVTTo(Data, ReadWidth); } + _PushStack(ConvertedData, Data, ReadWidth, true); +} - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); +// Float LoaD operation with memory operand +void OpDispatchBuilder::FLDFromStack(OpcodeArgs) { + _CopyPushStack(Op->OP & 7); } void OpDispatchBuilder::FBLD(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Read from memory - Ref data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); - Ref converted = _F80BCDLoad(data); - _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); + Ref ConvertedData = _F80BCDLoad(Data); + _PushStack(ConvertedData, Data, 16, true); } void OpDispatchBuilder::FBSTP(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - - Ref converted = _F80BCDStore(data); - + Ref converted = _F80BCDStore(_ReadStackValue(0)); StoreResult_WithOpSize(FPRClass, Op, Op->Dest, converted, 10, 1); - - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } -void OpDispatchBuilder::FLD_Const(OpcodeArgs, NamedVectorConstant constant) { +void OpDispatchBuilder::FLD_Const(OpcodeArgs, NamedVectorConstant Constant) { // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - Ref data = LoadAndCacheNamedVectorConstant(16, constant); - - // Write to ST[TOP] - _StoreContextIndexed(data, top, 16, MMBaseOffset(), 16, FPRClass); + Ref Data = LoadAndCacheNamedVectorConstant(16, Constant); + _PushStack(Data, Data, 16, true); } void OpDispatchBuilder::FILD(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - size_t read_width = GetSrcSize(Op); - + size_t ReadWidth = GetSrcSize(Op); // Read from memory - auto data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], read_width, Op->Flags); - - auto zero = _Constant(0); + auto* Data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); // Sign extend to 64bits - if (read_width != 8) { - data = _Sbfe(OpSize::i64Bit, read_width * 8, 0, data); + if (ReadWidth != 8) { + Data = _Sbfe(OpSize::i64Bit, ReadWidth * 8, 0, Data); } // We're about to clobber flags to grab the sign, so save NZCV. SaveNZCV(); - // Extract sign and make interger absolute - _SubNZCV(OpSize::i64Bit, data, zero); + // Extract sign and make integer absolute + auto zero = _Constant(0); + _SubNZCV(OpSize::i64Bit, Data, zero); auto sign = _NZCVSelect(OpSize::i64Bit, CondClassType {COND_SLT}, _Constant(0x8000), zero); - auto absolute = _Neg(OpSize::i64Bit, data, CondClassType {COND_MI}); + auto absolute = _Neg(OpSize::i64Bit, Data, CondClassType {COND_MI}); - // left justify the absolute interger + // left justify the absolute integer auto shift = _Sub(OpSize::i64Bit, _Constant(63), _FindMSB(IR::OpSize::i64Bit, absolute)); auto shifted = _Lshl(OpSize::i64Bit, absolute, shift); @@ -229,597 +123,209 @@ void OpDispatchBuilder::FILD(OpcodeArgs) { auto zeroed_exponent = _Select(COND_EQ, absolute, zero, zero, adjusted_exponent); auto upper = _Or(OpSize::i64Bit, sign, zeroed_exponent); - - Ref converted = _VCastFromGPR(16, 8, shifted); - converted = _VInsElement(16, 8, 1, 0, converted, _VCastFromGPR(16, 8, upper)); - - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); + Ref ConvertedData = _VCastFromGPR(16, 8, shifted); + ConvertedData = _VInsElement(16, 8, 1, 0, ConvertedData, _VCastFromGPR(16, 8, upper)); + _PushStack(ConvertedData, Data, ReadWidth, false); } -void OpDispatchBuilder::FSTWithWidth(OpcodeArgs, size_t width) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - if (width == 80) { - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, data, 10, 1); - } else if (width == 32 || width == 64) { - auto result = _F80CVT(width / 8, data); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, result, width / 8, 1); - } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); +void OpDispatchBuilder::FST(OpcodeArgs, size_t Width) { + Ref Mem = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.LoadData = false}); + _StoreStackMemory(Mem, OpSize::i128Bit, true, Width / 8); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } } +void OpDispatchBuilder::FSTToStack(OpcodeArgs) { + const uint8_t Offset = Op->OP & 7; + if (Offset != 0) { + _StoreStackToStack(Offset); + } + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } +} + +// Store integer to memory (possibly with truncation) void OpDispatchBuilder::FIST(OpcodeArgs, bool Truncate) { auto Size = GetSrcSize(Op); + // FIXME(pmatos): is there any advantage of using STORESTACKMEMORY here? + // Do we need STORESTACKMEMORY at all? + Ref Data = _ReadStackValue(0); + Data = _F80CVTInt(Size, Data, Truncate); - auto orig_top = GetX87Top(); - Ref data = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - data = _F80CVTInt(Size, data, Truncate); - - StoreResult_WithOpSize(GPRClass, Op, Op->Dest, data, Size, 1); + StoreResult_WithOpSize(GPRClass, Op, Op->Dest, Data, Size, 1); if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } } -void OpDispatchBuilder::FADD(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); +void OpDispatchBuilder::FADD(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto Offset = Op->OP & 7; + auto St0 = 0; if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; + _F80AddStack(Offset, St0); + } else { + _F80AddStack(St0, Offset); } - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; } - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - auto result = _F80Add(a, b); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + // We have one memory argument + Ref Arg {}; + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + Arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTToInt(Arg, Width / 8); + } else { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTTo(Arg, Width / 8); + } } - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); + // top of stack is at offset zero + _F80AddValue(0, Arg); } -void OpDispatchBuilder::FMUL(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); +void OpDispatchBuilder::FMUL(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto offset = Op->OP & 7; + auto st0 = 0; if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; + _F80MulStack(offset, st0); + } else { + _F80MulStack(st0, offset); } - - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; } - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto result = _F80Mul(a, b); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FDIV(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; + // We have one memory argument Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTToInt(arg, Width / 8); + } else { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTTo(arg, Width / 8); } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); } - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); + // top of stack is at offset zero + _F80MulValue(0, arg); - Ref result {}; - if (reverse) { - result = _F80Div(b, a); - } else { - result = _F80Div(a, b); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); } -void OpDispatchBuilder::FSUB(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; +void OpDispatchBuilder::FDIV(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto Offset = Op->OP & 7; + const auto St0 = 0; + const auto Result = (ResInST0 == OpResult::RES_STI) ? Offset : St0; + + if (Reverse ^ (ResInST0 == OpResult::RES_STI)) { + _F80DivStack(Result, Offset, St0); + } else { + _F80DivStack(Result, St0, Offset); + } + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } + + // We have one memory argument Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTToInt(arg, Width / 8); + } else { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTTo(arg, Width / 8); } + } + + // top of stack is at offset zero + if (Reverse) { + _F80DivRValue(arg, 0); } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; + _F80DivValue(0, arg); + } + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } +} + +void OpDispatchBuilder::FSUB(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto Offset = Op->OP & 7; + const auto St0 = 0; + const auto Result = (ResInST0 == OpResult::RES_STI) ? Offset : St0; + + if (Reverse ^ (ResInST0 == OpResult::RES_STI)) { + _F80SubStack(Result, Offset, St0); + } else { + _F80SubStack(Result, St0, Offset); } - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - } - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - Ref result {}; - if (reverse) { - result = _F80Sub(b, a); - } else { - result = _F80Sub(a, b); - } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FCHS(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(0); - auto high = _Constant(0b1'000'0000'0000'0000ULL); - Ref data = _VCastFromGPR(16, 8, low); - data = _VInsGPR(16, 8, 1, data, high); - - auto result = _VXor(16, 1, a, data); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FABS(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(~0ULL); - auto high = _Constant(0b0'111'1111'1111'1111ULL); - Ref data = _VCastFromGPR(16, 8, low); - data = _VInsGPR(16, 8, 1, data, high); - - auto result = _VAnd(16, 1, a, data); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FTST(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(0); - Ref data = _VCastFromGPR(16, 8, low); - Ref Res = _F80Cmp(a, data); - - Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); - Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); - Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); - HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); - HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); - - SetRFLAG(HostFlag_CF); - SetRFLAG(_Constant(0)); - SetRFLAG(HostFlag_Unordered); - SetRFLAG(HostFlag_ZF); -} - -void OpDispatchBuilder::FRNDINT(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto result = _F80Round(a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FXTRACT(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - - auto exp = _F80XTRACT_EXP(a); - auto sig = _F80XTRACT_SIG(a); - - // Write to ST[TOP] - _StoreContextIndexed(exp, orig_top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(sig, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FNINIT(OpcodeArgs) { - auto Zero = _Constant(0); - // Init FCW to 0x037F - auto NewFCW = _Constant(16, 0x037F); - _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); - - // Init FSW to 0 - SetX87Top(Zero); - - SetRFLAG(Zero); - SetRFLAG(Zero); - SetRFLAG(Zero); - SetRFLAG(Zero); - - // Tags all get marked as invalid - StoreContext(AbridgedFTWIndex, Zero); -} - -void OpDispatchBuilder::FCOMI(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::FCOMIFlags whichflags, bool poptwice) { - auto top = GetX87Top(); - auto mask = _Constant(7); - - Ref arg {}; - Ref b {}; - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } + return; + } + + // We have one memory argument + Ref Arg {}; + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + Arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTToInt(Arg, Width / 8); + } else { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTTo(Arg, Width / 8); + } + } + + // top of stack is at offset zero + if (Reverse) { + _F80SubRValue(Arg, 0); } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); + _F80SubValue(0, Arg); } - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - Ref Res = _F80Cmp(a, b); - - Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); - Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); - Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); - HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); - HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); - - if (whichflags == FCOMIFlags::FLAGS_X87) { - SetRFLAG(HostFlag_CF); - SetRFLAG(_Constant(0)); - SetRFLAG(HostFlag_Unordered); - SetRFLAG(HostFlag_ZF); - } else { - // Invalidate deferred flags early - // OF, SF, AF, PF all undefined - InvalidateDeferredFlags(); - - SetRFLAG(HostFlag_CF); - SetRFLAG(HostFlag_ZF); - - // PF is stored inverted, so invert from the host flag. - // TODO: This could perhaps be optimized? - auto PF = _Xor(OpSize::i32Bit, HostFlag_Unordered, _Constant(1)); - SetRFLAG(PF); - } - - if (poptwice) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } } -void OpDispatchBuilder::FXCH(OpcodeArgs) { - auto top = GetX87Top(); - Ref arg; +Ref OpDispatchBuilder::GetX87FTW_Helper() { + Ref FTW = _Constant(0); - auto mask = _Constant(7); - - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - auto b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - - // Set C1 to Zero - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(b, top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(a, arg, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FST(OpcodeArgs) { - auto top = GetX87Top(); - auto mask = _Constant(7); - - // Implicit arg - auto offset = _Constant(Op->OP & 7); - Ref arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - // Write to ST[i] - _StoreContextIndexed(a, arg, 16, MMBaseOffset(), 16, FPRClass); - - // Set Tag for ST[i] - SetX87ValidTag(arg, true); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), _Constant(7)); - SetX87Top(top); - } -} - -void OpDispatchBuilder::X87UnaryOp(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F80Round(a)); - - if (IROp == IR::OP_F80SIN || IROp == IR::OP_F80COS) { - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); + for (int i = 0; i < 8; i++) { + auto* const RegTag = GetX87Tag(_Constant(i), LoadContext(AbridgedFTWIndex)); + FTW = _Orlshl(OpSize::i32Bit, FTW, RegTag, i * 2); } - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87BinaryOp(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - - auto mask = _Constant(7); - Ref st1 = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - st1 = _LoadContextIndexed(st1, 16, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F80Add(a, st1)); - - if (IROp == IR::OP_F80FPREM || IROp == IR::OP_F80FPREM1) { - // TODO: Set C0 to Q2, C3 to Q1, C1 to Q0 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87ModifySTP(OpcodeArgs, bool Inc) { - auto orig_top = GetX87Top(); - if (Inc) { - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - } else { - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - } -} - -void OpDispatchBuilder::X87SinCos(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - - auto sin = _F80SIN(a); - auto cos = _F80COS(a); - - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(sin, orig_top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(cos, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87FYL2X(OpcodeArgs) { - bool Plus1 = Op->OP == 0x01F9; // FYL2XP - - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - Ref st0 = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - if (Plus1) { - Ref data = LoadAndCacheNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); - st0 = _F80Add(st0, data); - } - - auto result = _F80FYL2X(st0, st1); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87TAN(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - - auto result = _F80TAN(a); - - Ref data = LoadAndCacheNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); - - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(result, orig_top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(data, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87ATAN(OpcodeArgs) { - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto result = _F80ATAN(st1, a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87LDENV(OpcodeArgs) { - const auto Size = GetSrcSize(Op); - Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); - - auto NewFCW = _LoadMem(GPRClass, 2, Mem, 2); - _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); - - auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - ReconstructX87StateFromFSW(NewFSW); - - { - // FTW - SetX87FTW(_LoadMem(GPRClass, Size, Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1)); - } + return FTW; } void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { + + // 14 bytes for 16bit // 2 Bytes : FCW // 2 Bytes : FSW @@ -834,26 +340,30 @@ void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { // 4 bytes : FSW // 4 bytes : FTW // 4 bytes : Instruction pointer - // 2 bytes : instruction pointer selector + // 2 bytes : Instruction pointer selector // 2 bytes : Opcode // 4 bytes : data pointer offset // 4 bytes : data pointer selector - const auto Size = GetDstSize(Op); - Ref Mem = MakeSegmentAddress(Op, Op->Dest); + // Before we store anything we need to sync our stack to the registers. + _SyncStackToSlow(); + + auto Size = GetDstSize(Op); + Ref Mem = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.LoadData = false}); + Mem = AppendSegmentOffset(Mem, Op->Flags); { auto FCW = _LoadContext(2, GPRClass, offsetof(FEXCore::Core::CPUState, FCW)); _StoreMem(GPRClass, Size, Mem, FCW, Size); } - { _StoreMem(GPRClass, Size, ReconstructFSW(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, Size, ReconstructFSW_Helper(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } auto ZeroConst = _Constant(0); { // FTW - _StoreMem(GPRClass, Size, GetX87FTW(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, Size, GetX87FTW_Helper(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); } { @@ -877,27 +387,45 @@ void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { } } -void OpDispatchBuilder::X87FLDCW(OpcodeArgs) { - Ref NewFCW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); +Ref OpDispatchBuilder::ReconstructX87StateFromFSW_Helper(Ref FSW) { + auto Top = _Bfe(OpSize::i32Bit, 3, 11, FSW); + SetX87Top(Top); + + auto C0 = _Bfe(OpSize::i32Bit, 1, 8, FSW); + auto C1 = _Bfe(OpSize::i32Bit, 1, 9, FSW); + auto C2 = _Bfe(OpSize::i32Bit, 1, 10, FSW); + auto C3 = _Bfe(OpSize::i32Bit, 1, 14, FSW); + + SetRFLAG(C0); + SetRFLAG(C1); + SetRFLAG(C2); + SetRFLAG(C3); + return Top; +} + +void OpDispatchBuilder::X87LDENV(OpcodeArgs) { + _StackForceSlow(); + + auto Size = GetSrcSize(Op); + Ref Mem = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.LoadData = false}); + Mem = AppendSegmentOffset(Mem, Op->Flags); + + auto NewFCW = _LoadMem(GPRClass, 2, Mem, 2); _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); -} -void OpDispatchBuilder::X87FSTCW(OpcodeArgs) { - auto FCW = _LoadContext(2, GPRClass, offsetof(FEXCore::Core::CPUState, FCW)); + Ref MemLocation = _Add(OpSize::i64Bit, Mem, _Constant(Size * 1)); + auto NewFSW = _LoadMem(GPRClass, Size, MemLocation, Size); + ReconstructX87StateFromFSW_Helper(NewFSW); - StoreResult(GPRClass, Op, FCW, -1); -} - -void OpDispatchBuilder::X87LDSW(OpcodeArgs) { - Ref NewFSW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - ReconstructX87StateFromFSW(NewFSW); -} - -void OpDispatchBuilder::X87FNSTSW(OpcodeArgs) { - StoreResult(GPRClass, Op, ReconstructFSW(), -1); + { + // FTW + Ref MemLocation = _Add(OpSize::i64Bit, Mem, _Constant(Size * 2)); + SetX87FTW(_LoadMem(GPRClass, Size, MemLocation, Size)); + } } void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { + _SyncStackToSlow(); // 14 bytes for 16bit // 2 Bytes : FCW // 2 Bytes : FSW @@ -925,13 +453,13 @@ void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { _StoreMem(GPRClass, Size, Mem, FCW, Size); } - { _StoreMem(GPRClass, Size, ReconstructFSW(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, Size, ReconstructFSW_Helper(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } auto ZeroConst = _Constant(0); { // FTW - _StoreMem(GPRClass, Size, GetX87FTW(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, Size, GetX87FTW_Helper(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); } { @@ -976,6 +504,7 @@ void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { } void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { + _StackForceSlow(); const auto Size = GetSrcSize(Op); Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); @@ -983,7 +512,7 @@ void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - auto Top = ReconstructX87StateFromFSW(NewFSW); + Ref Top = ReconstructX87StateFromFSW_Helper(NewFSW); { // FTW SetX87FTW(_LoadMem(GPRClass, Size, Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1)); @@ -1011,36 +540,202 @@ void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { // ST7 broken in to two parts // Lower 64bits [63:0] // upper 16 bits [79:64] - - Ref Reg = _LoadMem(FPRClass, 8, Mem, _Constant((Size * 7) + (10 * 7)), 1, MEM_OFFSET_SXTX, 1); - Ref RegHigh = _LoadMem(FPRClass, 2, Mem, _Constant((Size * 7) + (10 * 7) + 8), 1, MEM_OFFSET_SXTX, 1); + OrderedNode* Reg = _LoadMem(FPRClass, 8, Mem, _Constant((Size * 7) + (10 * 7)), 1, MEM_OFFSET_SXTX, 1); + OrderedNode* RegHigh = _LoadMem(FPRClass, 2, Mem, _Constant((Size * 7) + (10 * 7) + 8), 1, MEM_OFFSET_SXTX, 1); Reg = _VInsElement(16, 2, 4, 0, Reg, RegHigh); _StoreContextIndexed(Reg, Top, 16, MMBaseOffset(), 16, FPRClass); } -void OpDispatchBuilder::X87FXAM(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - Ref Result = _VExtractToGPR(16, 8, a, 1); +// Load / Store Control Word +void OpDispatchBuilder::X87FSTCW(OpcodeArgs) { + auto FCW = _LoadContext(2, GPRClass, offsetof(FEXCore::Core::CPUState, FCW)); + StoreResult(GPRClass, Op, FCW, -1); +} - // Extract the sign bit - Result = _Bfe(OpSize::i64Bit, 1, 15, Result); - SetRFLAG(Result); - // Claim this is a normal number - // We don't support anything else - auto TopValid = GetX87ValidTag(top); - auto ZeroConst = _Constant(0); - auto OneConst = _Constant(1); +void OpDispatchBuilder::X87FLDCW(OpcodeArgs) { + // FIXME: Because loading control flags will affect several instructions in fast path, we might have + // to switch for now to slow mode whenever these are manually changed. + // Remove the next line and try DF_04.asm in fast path. + _StackForceSlow(); + Ref NewFCW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); +} - // In the case of top being invalid then C3:C2:C0 is 0b101 - auto C3 = _Select(FEXCore::IR::COND_NEQ, TopValid, OneConst, OneConst, ZeroConst); - auto C2 = TopValid; - auto C0 = C3; // Mirror C3 until something other than zero is supported - SetRFLAG(C0); - SetRFLAG(C2); - SetRFLAG(C3); +void OpDispatchBuilder::FXCH(OpcodeArgs) { + uint8_t Offset = Op->OP & 7; + // fxch st0, st0 is for us essentially a nop + if (Offset != 0) { + _F80StackXchange(Offset); + } + SetRFLAG(_Constant(0)); +} + +void OpDispatchBuilder::X87FYL2X(OpcodeArgs, bool IsFYL2XP1) { + if (IsFYL2XP1) { + // create an add between top of stack and 1. + Ref One = ReducedPrecisionMode ? _VCastFromGPR(8, 8, _Constant(0x3FF0000000000000)) : + LoadAndCacheNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); + _F80AddValue(0, One); + } + + _F80FYL2XStack(); +} + +void OpDispatchBuilder::FCOMI(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::FCOMIFlags WhichFlags, bool PopTwice) { + Ref arg {}; + Ref b {}; + + Ref Res = nullptr; + if (Op->Src[0].IsNone()) { + // Implicit arg + uint8_t Offset = Op->OP & 7; + Res = _F80CmpStack(Offset); + } else { + // Memory arg + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + b = _F80CVTToInt(arg, Width / 8); + } else { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + b = _F80CVTTo(arg, Width / 8); + } + } + Res = _F80CmpValue(b); + } + + Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); + Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); + Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); + HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); + HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); + + if (WhichFlags == FCOMIFlags::FLAGS_X87) { + SetRFLAG(HostFlag_CF); + SetRFLAG(_Constant(0)); + SetRFLAG(HostFlag_Unordered); + SetRFLAG(HostFlag_ZF); + } else { + // Invalidate deferred flags early + // OF, SF, AF, PF all undefined + InvalidateDeferredFlags(); + + SetRFLAG(HostFlag_CF); + SetRFLAG(HostFlag_ZF); + + // PF is stored inverted, so invert from the host flag. + // TODO: This could perhaps be optimized? + auto PF = _Xor(OpSize::i32Bit, HostFlag_Unordered, _Constant(1)); + SetRFLAG(PF); + } + + if (PopTwice) { + _PopStackDestroy(); + _PopStackDestroy(); + } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { + _PopStackDestroy(); + } +} + +void OpDispatchBuilder::FTST(OpcodeArgs) { + Ref Res = _F80StackTest(0); + + Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); + Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); + Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); + HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); + HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); + + SetRFLAG(HostFlag_CF); + SetRFLAG(_Constant(0)); + SetRFLAG(HostFlag_Unordered); + SetRFLAG(HostFlag_ZF); +} + +void OpDispatchBuilder::X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool ZeroC2) { + DeriveOp(Result, IROp, _F80SCALEStack()); + if (ZeroC2) { + SetRFLAG(_Constant(0)); + } +} + +void OpDispatchBuilder::X87ModifySTP(OpcodeArgs, bool Inc) { + if (Inc) { + _IncStackTop(); + } else { + _DecStackTop(); + } +} + +// Operations dealing with loading and storing environment pieces + +// Reconstruct as a constant the Status Word of the FPU. +// We only track stack top and each of the code conditions (C flags) +// Top is 3 bits at bit 11. +// C0 is 1 bit at bit 8. +// C1 is 1 bit at bit 9. +// C2 is 1 bit at bit 10. +// C3 is 1 bit at bit 14. +// Optionally we can pass a pre calculated value for Top, otherwise we calculate it +// during the function runtime. +Ref OpDispatchBuilder::ReconstructFSW_Helper(Ref T) { + // We must construct the FSW from our various bits + auto C0 = GetRFLAG(FEXCore::X86State::X87FLAG_C0_LOC); + auto C1 = GetRFLAG(FEXCore::X86State::X87FLAG_C1_LOC); + auto C2 = GetRFLAG(FEXCore::X86State::X87FLAG_C2_LOC); + auto C3 = GetRFLAG(FEXCore::X86State::X87FLAG_C3_LOC); + + Ref FSW = _Lshl(OpSize::i64Bit, C0, _Constant(8)); + FSW = _Orlshl(OpSize::i64Bit, FSW, C1, 9); + FSW = _Orlshl(OpSize::i64Bit, FSW, C2, 10); + FSW = _Orlshl(OpSize::i64Bit, FSW, C3, 14); + + auto Top = GetX87Top(); + FSW = _Bfi(OpSize::i64Bit, 3, 11, FSW, Top); + return FSW; +} + +// Store Status Word +// There's no load Status Word instruction +void OpDispatchBuilder::X87FNSTSW(OpcodeArgs) { + + Ref TopValue = _SyncStackToSlow(); + Ref StatusWord = ReconstructFSW_Helper(TopValue); + StoreResult(GPRClass, Op, StatusWord, -1); +} + +void OpDispatchBuilder::FNINIT(OpcodeArgs) { + auto Zero = _Constant(0); + + // Init FCW to 0x037F + auto NewFCW = _Constant(16, 0x037F); + _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); + + // Set top to zero + SetX87Top(Zero); + // Tags all get marked as invalid + StoreContext(AbridgedFTWIndex, Zero); + + // Reinits the simulated stack + _InitStack(); + + SetRFLAG(Zero); + SetRFLAG(Zero); + SetRFLAG(Zero); + SetRFLAG(Zero); +} + +void OpDispatchBuilder::X87FFREE(OpcodeArgs) { + + _InvalidateStack(Op->OP & 7); +} + +void OpDispatchBuilder::X87EMMS(OpcodeArgs) { + // Tags all get set to 0b11 + + _InvalidateStack(0xff); } void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { @@ -1082,39 +777,31 @@ void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { Ref SrcCond = SelectCC(CC, OpSize::i64Bit, AllOneConst, ZeroConst); Ref VecCond = _VDupFromGPR(16, 8, SrcCond); - - auto top = GetX87Top(); - Ref arg; - - auto mask = _Constant(7); - - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - auto b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - auto Result = _VBSL(16, VecCond, b, a); - - // Write to ST[TOP] - _StoreContextIndexed(Result, top, 16, MMBaseOffset(), 16, FPRClass); + _F80VBSLStack(16, VecCond, Op->OP & 7, 0); } -void OpDispatchBuilder::X87EMMS(OpcodeArgs) { - // Tags all get set to 0b11 - StoreContext(AbridgedFTWIndex, _Constant(0)); -} +void OpDispatchBuilder::X87FXAM(OpcodeArgs) { + auto a = _ReadStackValue(0); + Ref Result = ReducedPrecisionMode ? _VExtractToGPR(8, 8, a, 0) : _VExtractToGPR(16, 8, a, 1); -void OpDispatchBuilder::X87FFREE(OpcodeArgs) { - // Only sets the selected stack register's tag bits to EMPTY - Ref top = GetX87Top(); + // Extract the sign bit + Result = ReducedPrecisionMode ? _Bfe(OpSize::i64Bit, 1, 63, Result) : _Bfe(OpSize::i64Bit, 1, 15, Result); + SetRFLAG(Result); - // Implicit arg - auto offset = _Constant(Op->OP & 7); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), _Constant(7)); + // Claim this is a normal number + // We don't support anything else + auto TopValid = _StackValidTag(0); + auto ZeroConst = _Constant(0); + auto OneConst = _Constant(1); - // Set this argument's tag as empty now - SetX87ValidTag(top, false); + // In the case of top being invalid then C3:C2:C0 is 0b101 + auto C3 = _Select(FEXCore::IR::COND_NEQ, TopValid, OneConst, OneConst, ZeroConst); + + auto C2 = TopValid; + auto C0 = C3; // Mirror C3 until something other than zero is supported + SetRFLAG(C0); + SetRFLAG(C2); + SetRFLAG(C3); } } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp index 8993b3ccd..db739f6d9 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp @@ -40,10 +40,13 @@ class OrderedNode; // FXCH // FCMOV // FST(register to register) +// FCHS // State loading duplicated from X87.cpp, setting host rounding mode // See issue void OpDispatchBuilder::FNINITF64(OpcodeArgs) { + // FIXME: almost a duplicate of x87 version. + // Init FCW to 0x037F auto NewFCW = _Constant(16, 0x037F); // Init host rounding mode to zero @@ -53,17 +56,20 @@ void OpDispatchBuilder::FNINITF64(OpcodeArgs) { // Init FSW to 0 SetX87Top(Zero); + // Tags all get marked as invalid + StoreContext(AbridgedFTWIndex, Zero); + + _InitStack(); SetRFLAG(Zero); SetRFLAG(Zero); SetRFLAG(Zero); SetRFLAG(Zero); - - // Tags all get marked as invalid - StoreContext(AbridgedFTWIndex, Zero); } void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { + _StackForceSlow(); + const auto Size = GetSrcSize(Op); Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); @@ -75,7 +81,7 @@ void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - ReconstructX87StateFromFSW(NewFSW); + ReconstructX87StateFromFSW_Helper(NewFSW); { // FTW @@ -85,6 +91,8 @@ void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { void OpDispatchBuilder::X87FLDCWF64(OpcodeArgs) { + _StackForceSlow(); + Ref NewFCW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); // ignore the rounding precision, we're always 64-bit in F64. // extract rounding mode @@ -94,132 +102,65 @@ void OpDispatchBuilder::X87FLDCWF64(OpcodeArgs) { } // F64 ops - -void OpDispatchBuilder::FLDF64(OpcodeArgs, size_t width) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - - size_t read_width = (width == 80) ? 16 : width / 8; - - Ref data {}; - Ref converted {}; - - if (!Op->Src[0].IsNone()) { - // Read from memory - data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], read_width, Op->Flags); - // Convert to 64bit float - if (width == 32) { - converted = _Float_FToF(8, 4, data); - } else if (width == 80) { - converted = _F80CVT(8, data); - } else { - converted = data; - } - } else { - // Implicit arg (does this need to change with width?) - auto offset = _Constant(Op->OP & 7); - data = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, offset), mask); - data = _LoadContextIndexed(data, 8, MMBaseOffset(), 16, FPRClass); - converted = data; +// Float load op with memory operand +void OpDispatchBuilder::FLDF64(OpcodeArgs, size_t Width) { + size_t ReadWidth = (Width == 80) ? 16 : Width / 8; + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); + // Convert to 64bit float + Ref ConvertedData = Data; + if (Width == 32) { + ConvertedData = _Float_FToF(8, 4, Data); + } else if (Width == 80) { + ConvertedData = _F80CVT(8, Data); } - - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 8, MMBaseOffset(), 16, FPRClass); + _PushStack(ConvertedData, Data, ReadWidth, true); } void OpDispatchBuilder::FBLDF64(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Read from memory - Ref data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); - Ref converted = _F80BCDLoad(data); - converted = _F80CVT(8, converted); - _StoreContextIndexed(converted, top, 8, MMBaseOffset(), 16, FPRClass); + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); + Ref ConvertedData = _F80BCDLoad(Data); + ConvertedData = _F80CVT(8, ConvertedData); + _PushStack(ConvertedData, Data, 8, true); } void OpDispatchBuilder::FBSTPF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - - Ref converted = _F80CVTTo(data, 8); + Ref converted = _F80CVTTo(_ReadStackValue(0), 8); converted = _F80BCDStore(converted); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, converted, 10, 1); - - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } -void OpDispatchBuilder::FLDF64_Const(OpcodeArgs, uint64_t num) { - // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - auto data = _VCastFromGPR(8, 8, _Constant(num)); - // Write to ST[TOP] - _StoreContextIndexed(data, top, 8, MMBaseOffset(), 16, FPRClass); +void OpDispatchBuilder::FLDF64_Const(OpcodeArgs, uint64_t Num) { + auto Data = _VCastFromGPR(8, 8, _Constant(Num)); + _PushStack(Data, Data, 8, true); } void OpDispatchBuilder::FILDF64(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); + size_t ReadWidth = GetSrcSize(Op); - size_t read_width = GetSrcSize(Op); // Read from memory - auto data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], read_width, Op->Flags); - if (read_width == 2) { - data = _Sbfe(OpSize::i64Bit, read_width * 8, 0, data); + Ref Data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); + if (ReadWidth == 2) { + Data = _Sbfe(OpSize::i64Bit, ReadWidth * 8, 0, Data); } - auto converted = _Float_FromGPR_S(8, read_width == 4 ? 4 : 8, data); - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 8, MMBaseOffset(), 16, FPRClass); + auto ConvertedData = _Float_FromGPR_S(8, ReadWidth == 4 ? 4 : 8, Data); + _PushStack(ConvertedData, Data, ReadWidth, false); } -void OpDispatchBuilder::FSTF64WithWidth(OpcodeArgs, size_t width) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - if (width == 64) { - // Store 64-bit float directly - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, data, 8, 1); - } else if (width == 32) { - // Convert to 32-bit float and store - auto result = _Float_FToF(4, 8, data); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, result, 4, 1); - } else if (width == 80) { - // Convert to 80-bit float - auto result = _F80CVTTo(data, 8); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, result, 10, 1); - } +void OpDispatchBuilder::FSTF64(OpcodeArgs, size_t Width) { + Ref Mem = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.LoadData = false}); + _StoreStackMemory(Mem, OpSize::i64Bit, true, Width / 8); - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } } void OpDispatchBuilder::FISTF64(OpcodeArgs, bool Truncate) { auto Size = GetSrcSize(Op); - auto orig_top = GetX87Top(); - Ref data = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); + Ref data = _ReadStackValue(0); if (Truncate) { data = _Float_ToGPR_ZS(Size == 4 ? 4 : 8, 8, data); } else { @@ -228,468 +169,255 @@ void OpDispatchBuilder::FISTF64(OpcodeArgs, bool Truncate) { StoreResult_WithOpSize(GPRClass, Op, Op->Dest, data, Size, 1); if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } } -void OpDispatchBuilder::FADDF64(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; +void OpDispatchBuilder::FADDF64(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto Offset = Op->OP & 7; + auto St0 = 0; + if (ResInST0 == OpResult::RES_STI) { + _F80AddStack(Offset, St0); + } else { + _F80AddStack(St0, Offset); + } + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } + // We have one memory argument Ref arg {}; - Ref b {}; - auto mask = _Constant(7); + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + } + arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _Float_FToF(8, 4, arg); + } else if (Width == 64) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + } - if (!Op->Src[0].IsNone()) { - // Memory arg + // top of stack is at offset zero + _F80AddValue(0, arg); +} + +// FIXME: following is very similar to FADDF64 +void OpDispatchBuilder::FMULF64(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto offset = Op->OP & 7; + auto st0 = 0; + if (ResInST0 == OpResult::RES_STI) { + _F80MulStack(offset, st0); + } else { + _F80MulStack(st0, offset); + } + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } + + // We have one memory argument + Ref arg {}; + + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + } + arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _Float_FToF(8, 4, arg); + } else if (Width == 64) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + } + + // top of stack is at offset zero + _F80MulValue(0, arg); + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } +} + +void OpDispatchBuilder::FDIVF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto offset = Op->OP & 7; + const auto st0 = 0; + + if (Reverse) { + if (ResInST0 == OpResult::RES_STI) { + _F80DivStack(offset, st0, offset); + } else { + _F80DivStack(st0, offset, st0); + } + } else { + if (ResInST0 == OpResult::RES_STI) { + _F80DivStack(offset, offset, st0); + } else { + _F80DivStack(st0, st0, offset); + } + } + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } + + // We have one memory argument + Ref Arg {}; + + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + Arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + Arg = _Sbfe(OpSize::i64Bit, 16, 0, Arg); + } + Arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, Arg); + } else if (Width == 32) { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + Arg = _Float_FToF(8, 4, Arg); + } else if (Width == 64) { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + } + } + + // top of stack is at offset zero + if (Reverse) { + _F80DivRValue(Arg, 0); + } else { + _F80DivValue(0, Arg); + } + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } +} + +void OpDispatchBuilder::FSUBF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto Offset = Op->OP & 7; + const auto St0 = 0; + + if (Reverse) { + if (ResInST0 == OpResult::RES_STI) { + _F80SubStack(Offset, St0, Offset); + } else { + _F80SubStack(St0, Offset, St0); + } + } else { + if (ResInST0 == OpResult::RES_STI) { + _F80SubStack(Offset, Offset, St0); + } else { + _F80SubStack(St0, St0, Offset); + } + } + + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } + + // We have one memory argument + Ref arg {}; + + if (Width == 16 || Width == 32 || Width == 64) { if (Integer) { arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { + if (Width == 16) { arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { + arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); - } - - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - auto result = _VFAdd(8, 8, a, b); - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FMULF64(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); - } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { + arg = _Float_FToF(8, 4, arg); + } else if (Width == 64) { arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); } + } + + // top of stack is at offset zero + if (Reverse) { + _F80SubRValue(arg, 0); } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); + _F80SubValue(0, arg); } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _VFMul(8, 8, a, b); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FDIVF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); - } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); - } - - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - Ref result {}; - if (reverse) { - result = _VFDiv(8, 8, b, a); - } else { - result = _VFDiv(8, 8, a, b); - } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FSUBF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); - } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); - } - - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - Ref result {}; - if (reverse) { - result = _VFSub(8, 8, b, a); - } else { - result = _VFSub(8, 8, a, b); - } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FCHSF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - auto result = _VFNeg(8, 8, a); - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FABSF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - auto result = _VFAbs(8, 8, a); - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); } void OpDispatchBuilder::FTSTF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(0); - Ref data = _VCastFromGPR(8, 8, low); - // We are going to clobber NZCV, make sure it's in a GPR first. GetNZCV(); // Now we do our comparison. - _FCmp(8, a, data); + _F80StackTest(0); PossiblySetNZCVBits = ~0; ConvertNZCVToX87(); } -// TODO: This should obey rounding mode -void OpDispatchBuilder::FRNDINTF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _Vector_FToI(8, 8, a, FEXCore::IR::Round_Host); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FXTRACTF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - auto gpr = _VExtractToGPR(8, 8, a, 0); - Ref exp = _And(OpSize::i64Bit, gpr, _Constant(0x7ff0000000000000LL)); - exp = _Lshr(OpSize::i64Bit, exp, _Constant(52)); - exp = _Sub(OpSize::i64Bit, exp, _Constant(1023)); - exp = _Float_FromGPR_S(8, 8, exp); - Ref sig = _And(OpSize::i64Bit, gpr, _Constant(0x800fffffffffffffLL)); - sig = _Or(OpSize::i64Bit, sig, _Constant(0x3ff0000000000000LL)); - sig = _VCastFromGPR(8, 8, sig); - // Write to ST[TOP] - _StoreContextIndexed(exp, orig_top, 8, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(sig, top, 8, MMBaseOffset(), 16, FPRClass); -} - - -void OpDispatchBuilder::FCOMIF64(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::FCOMIFlags whichflags, bool poptwice) { - auto top = GetX87Top(); - auto mask = _Constant(7); - +void OpDispatchBuilder::FCOMIF64(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::FCOMIFlags WhichFlags, bool PopTwice) { Ref arg {}; Ref b {}; - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); - } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { + if (Op->Src[0].IsNone()) { // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); + uint8_t offset = Op->OP & 7; + b = _ReadStackValue(offset); + } else { + // Memory arg + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + } + b = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + b = _Float_FToF(8, 4, arg); + } else if (Width == 64) { + b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + } + } } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - if (whichflags == FCOMIFlags::FLAGS_X87) { + if (WhichFlags == FCOMIFlags::FLAGS_X87) { // We are going to clobber NZCV, make sure it's in a GPR first. GetNZCV(); - _FCmp(8, a, b); + _F80CmpValue(b); PossiblySetNZCVBits = ~0; ConvertNZCVToX87(); } else { - Comiss(8, a, b, true /* InvalidateAF */); + HandleNZCVWrite(); + _F80CmpValue(b); + ComissFlags(true /* InvalidateAF */); } - if (poptwice) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + if (PopTwice) { + _PopStackDestroy(); + _PopStackDestroy(); } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + _PopStackDestroy(); } } -void OpDispatchBuilder::FSQRTF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _VFSqrt(8, 8, a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - - -void OpDispatchBuilder::X87UnaryOpF64(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F64SIN(a)); - - if (IROp == IR::OP_F64SIN || IROp == IR::OP_F64COS) { - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87BinaryOpF64(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - - auto mask = _Constant(7); - Ref st1 = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - st1 = _LoadContextIndexed(st1, 8, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F64ATAN(a, st1)); - - if (IROp == IR::OP_F64FPREM || IROp == IR::OP_F64FPREM1) { - // TODO: Set C0 to Q2, C3 to Q1, C1 to Q0 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87SinCosF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - - auto sin = _F64SIN(a); - auto cos = _F64COS(a); - - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(sin, orig_top, 8, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(cos, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87FYL2XF64(OpcodeArgs) { - bool Plus1 = Op->OP == 0x01F9; // FYL2XP - - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - Ref st0 = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - if (Plus1) { - auto one = _VCastFromGPR(8, 8, _Constant(0x3FF0000000000000)); - st0 = _VFAdd(8, 8, st0, one); - } - - auto result = _F64FYL2X(st0, st1); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87TANF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _F64TAN(a); - - auto one = _VCastFromGPR(8, 8, _Constant(0x3FF0000000000000)); - - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(result, orig_top, 8, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(one, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87ATANF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _F64ATAN(st1, a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - // This function converts to F80 on save for compatibility - void OpDispatchBuilder::X87FNSAVEF64(OpcodeArgs) { + _SyncStackToSlow(); // 14 bytes for 16bit // 2 Bytes : FCW // 2 Bytes : FSW @@ -717,13 +445,13 @@ void OpDispatchBuilder::X87FNSAVEF64(OpcodeArgs) { _StoreMem(GPRClass, Size, Mem, FCW, Size); } - { _StoreMem(GPRClass, Size, ReconstructFSW(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, Size, ReconstructFSW_Helper(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } auto ZeroConst = _Constant(0); { // FTW - _StoreMem(GPRClass, Size, GetX87FTW(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, Size, GetX87FTW_Helper(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); } { @@ -772,6 +500,7 @@ void OpDispatchBuilder::X87FNSAVEF64(OpcodeArgs) { // This function converts from F80 on load for compatibility void OpDispatchBuilder::X87FRSTORF64(OpcodeArgs) { + _StackForceSlow(); const auto Size = GetSrcSize(Op); Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); @@ -788,7 +517,7 @@ void OpDispatchBuilder::X87FRSTORF64(OpcodeArgs) { _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - auto Top = ReconstructX87StateFromFSW(NewFSW); + Ref Top = ReconstructX87StateFromFSW_Helper(NewFSW); { // FTW @@ -826,32 +555,4 @@ void OpDispatchBuilder::X87FRSTORF64(OpcodeArgs) { _StoreContextIndexed(Reg, Top, 8, MMBaseOffset(), 16, FPRClass); } - -// FXAM needs change -void OpDispatchBuilder::X87FXAMF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - Ref Result = _VExtractToGPR(8, 8, a, 0); - - // Extract the sign bit - Result = _Bfe(OpSize::i64Bit, 1, 63, Result); - SetRFLAG(Result); - - // Claim this is a normal number - // We don't support anything else - auto TopValid = GetX87ValidTag(top); - auto ZeroConst = _Constant(0); - auto OneConst = _Constant(1); - - // In the case of top being invalid then C3:C2:C0 is 0b101 - auto C3 = _Select(FEXCore::IR::COND_EQ, TopValid, OneConst, ZeroConst, OneConst); - - auto C2 = TopValid; - auto C0 = C3; // Mirror C3 until something other than zero is supported - SetRFLAG(C0); - SetRFLAG(C2); - SetRFLAG(C3); -} - - } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/IR/PassManager.cpp b/FEXCore/Source/Interface/IR/PassManager.cpp index e93e04cd8..6f5170e6b 100644 --- a/FEXCore/Source/Interface/IR/PassManager.cpp +++ b/FEXCore/Source/Interface/IR/PassManager.cpp @@ -70,6 +70,7 @@ void PassManager::AddDefaultPasses(FEXCore::Context::ContextImpl* ctx) { FEX_CONFIG_OPT(DisablePasses, O0); if (!DisablePasses()) { + InsertPass(CreateX87StackOptimizationPass()); InsertPass(CreateDeadStoreElimination()); InsertPass(CreateConstProp(ctx->HostFeatures.SupportsTSOImm9, &ctx->CPUID)); InsertPass(CreateDeadFlagCalculationEliminination()); diff --git a/FEXCore/Source/Interface/IR/Passes.h b/FEXCore/Source/Interface/IR/Passes.h index 8c18ff2bd..3b377dc6f 100644 --- a/FEXCore/Source/Interface/IR/Passes.h +++ b/FEXCore/Source/Interface/IR/Passes.h @@ -20,6 +20,7 @@ fextl::unique_ptr CreateConstProp(bool SupportsTSOImm9, const fextl::unique_ptr CreateDeadFlagCalculationEliminination(); fextl::unique_ptr CreateDeadStoreElimination(); fextl::unique_ptr CreateRegisterAllocationPass(); +fextl::unique_ptr CreateX87StackOptimizationPass(); namespace Validation { fextl::unique_ptr CreateIRValidation(); diff --git a/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp b/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp new file mode 100644 index 000000000..7111af285 --- /dev/null +++ b/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp @@ -0,0 +1,1069 @@ +#include "FEXCore/Utils/LogManager.h" +#include "Interface/Core/Interpreter/Fallbacks/FallbackOpHandler.h" +#include "Interface/IR/IR.h" +#include "Interface/IR/IREmitter.h" +#include "Interface/IR/PassManager.h" +#include +#include +#include + +#include +#include +#include +#include + +// This file adds a pass to process X87 stack instructions. +// These instructions are marked in IR.json with `X87: true` and are generated +// by X87 guest instructions. +// The way is works is that there's a virtual stack `StackData`, where we load and store +// and apply the operations in a block of code. Once the block finishes, we emit the necessary operations +// that we recorded onto the virtual stack. This allows us to save a lot of code movement +// to and from stack registers, top management and valid flags. It also allows us to +// perform memcpy optimizations like the one performed in STORESTACKMEMORY. +// +// By default we run on the fast path - i.e. we assume all values are in the stack and we have a complete +// stack overview. However, if we encounter a value that's not in the virtual stack - maybe it was added +// to the stack in a previous block, we move onto the slow path which loads and stores values to the stack +// registers. +// Once in a slow path, we won't return to the fast pass until the beginning of the following block. + +namespace FEXCore::IR { + +// FIXME(pmatos): copy from OpcodeDispatcher.h +inline uint32_t MMBaseOffset() { + return static_cast(offsetof(Core::CPUState, mm[0][0])); +} + +// Similar helper to the one in OpcodeDispatcher.h except we do not +// need to handle flags, etc. +template +void DeriveOp(Ref& RefV, IROps NewOp, IREmitter::IRPair Expr) { + Expr.first->Header.Op = NewOp; + RefV = Expr; +} + +enum class StackSlot { UNUSED, INVALID, VALID }; +// FixedSizeStack is a model of the x87 Stack where each element in this +// fixed size stack lives at an offset from top. The top of the stack is at +// index 0. +template +class FixedSizeStack { +public: + static constexpr uint8_t size = 8; + + // Real top as an offset from stored top value (or the one at the beginning of the block) + // For example, if we start and push a value to our simulated stack, because we don't + // update top straight away the TopOffset is 1. + // If SlowPath is true, then TopOffset is always zero. + int8_t TopOffset = 0; + + FixedSizeStack() + : buffer(FixedSizeStack::size, {StackSlot::UNUSED, T()}) {} + + void push(const T& Value) { + rotate(); + buffer.front() = {StackSlot::VALID, Value}; + } + + // Rotate the elements with the direction controlled by Right + void rotate(bool Right = true) { + if (Right) { + std::rotate(buffer.begin(), buffer.end() - 1, buffer.end()); + TopOffset++; + } else { + std::rotate(buffer.begin(), buffer.begin() + 1, buffer.end()); + TopOffset--; + } + } + + void pop() { + buffer.front() = {StackSlot::INVALID, T()}; + rotate(false); + } + + const std::pair& top(size_t Offset = 0) const { + return buffer[Offset]; + } + + void setTop(T Value, size_t Offset = 0) { + buffer[Offset] = {StackSlot::VALID, Value}; + } + + bool isValid(size_t Offset) const { + return buffer[Offset].first; + } + + void clear() { + for (auto& Elem : buffer) { + Elem = {StackSlot::UNUSED, T()}; + } + TopOffset = 0; + } + + void dump() const { + LogMan::Msg::DFmt("-- Stack"); + + for (size_t i = 0; i < 8; i++) { + const auto& [Valid, Element] = buffer[i]; + if (Valid == StackSlot::VALID) { + LogMan::Msg::DFmt("| ST{}: 0x{:x}", i, (uintptr_t)(Element.StackDataNode)); + } else if (Valid == StackSlot::INVALID) { + LogMan::Msg::DFmt("| ST{}: INVALID", i); + } + } + LogMan::Msg::DFmt("--"); + } + + void setTagInvalid(size_t Index) { + buffer[Index].first = StackSlot::INVALID; + } + + // Returns a mask to set in AbridgedTagWord + uint8_t getValidMask() { + uint8_t Mask = 0; + for (size_t i = 0; i < buffer.size(); i++) { + if (buffer[i].first == StackSlot::VALID) { + Mask |= 1U << i; + } + } + return Mask; + } + + // Returns a mask to set in AbridgedTagWord + uint8_t getInvalidMask() { + uint8_t Mask = 0; + for (size_t i = 0; i < buffer.size(); i++) { + if (buffer[i].first == StackSlot::INVALID) { + Mask |= 1U << i; + } + } + return Mask; + } + +private: + fextl::vector> buffer; +}; + +class X87StackOptimization final : public Pass { +public: + X87StackOptimization() { + FEX_CONFIG_OPT(ReducedPrecision, X87REDUCEDPRECISION); + ReducedPrecisionMode = ReducedPrecision; + } + void Run(IREmitter* Emit) override; + +private: + bool ReducedPrecisionMode; + + // Helpers + std::tuple SplitF64SigExp(Ref Node); + Ref RotateRight8(uint32_t V, Ref Amount); + + // Handles a Unary operation. + // Takes the op we are handling, the Node for the reduced precision case and the node for the normal case. + // Depending on the type of Op64, we might need to pass a couple of extra constant arguments, this happens + // when VFOp64 is true. + void HandleUnop(IROps Op64, bool VFOp64, IROps Op80); + void HandleBinopValue(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, bool MarkDestValid, uint8_t StackOffset, + Ref ValueNode, bool Reverse = false); + void HandleBinopStack(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, uint8_t StackOffset1, uint8_t StackOffset2, + bool Reverse = false); + + // Top Management Helpers + /// Set the valid tag for Value as valid (if Valid is true), or invalid (if Valid is false). + void SetX87ValidTag(Ref Value, bool Valid); + // Generates slow code to load/store a value from an offset from the top of the stack + Ref LoadStackValueAtOffset_Slow(uint8_t Offset = 0); + void StoreStackValueAtOffset_Slow(Ref Value, uint8_t Offset = 0, bool SetValid = true); + // Update Top value in slow path for a pop + void UpdateTopForPop_Slow(); + void UpdateTopForPush_Slow(); + // Synchronizes the current simulated stack with the actual values. + // Returns a new value for Top, that's synchronized between the simulated stack + // and the actual FPU stack. + Ref SynchronizeStackValues(); + // Moves us from the fast to the slow path if ShouldMigrate is true. + void MigrateToSlowPathIf(bool ShouldMigrate); + // Top Cache Management + Ref GetTopWithCache_Slow(); + Ref GetOffsetTopWithCache_Slow(uint8_t Offset); + void SetTopWithCache_Slow(Ref Value); + Ref GetX87ValidTag_Slow(uint8_t Offset); + // Resets fields to initial values + void Reset(bool AlsoSlowPath = true); + + struct StackMemberInfo { + StackMemberInfo() {} + StackMemberInfo(Ref Data) + : StackDataNode(Data) + , Source(std::nullopt) + , InterpretAsFloat(false) {} + StackMemberInfo(Ref Data, Ref Source, OpSize Size, bool Float) + : StackDataNode(Data) + , Source({Size, Source}) + , InterpretAsFloat(Float) {} + Ref StackDataNode; // Reference to the data in the Stack. + // This is the source data node in the stack format, possibly converted to 64/80 bits. + // Tuple is only valid if we have information about the Source of the Stack Data Node. + // In it's valid then OpSize is the original source size and Ref is the original source node. + std::optional> Source; + bool InterpretAsFloat; // True if this is a floating point value, false if integer + }; + + // StackData, TopCache need to be always properly set to ensure + // they reflect the current state of the FPU. This sync only makes sense while + // taking the fast path. Once in the slow path, these don't make sense anymore + // and we are syncing everything. + + // Index on vector is offset to top value at start of block + // If slow path is true, then StackData is always empty. + FixedSizeStack StackData; + + void InvalidateCaches(); + void InvalidateTopOffsetCache(); + + // Path Migration helper management + std::optional MigrateToSlowPath_IfInvalid(uint8_t Offset = 0); + Ref LoadStackValue(uint8_t Offset = 0); + void StoreStackValue(Ref Value, uint8_t Offset = 0, bool SetValid = false); + void StackPop(); + + // Cache for Constants + // ConstantPoll[i] has IREmit->_Constant(i); + std::array ConstantPool; + Ref GetConstant(ssize_t Offset); + + // Cached value for Top + // If slowpath is false, then TopCache is nullptr. + std::array TopOffsetCache; + // Are we on the slow path? + // Once we enter the slow path, we never come out. + // This just simplifies the code atm. If there's a need to return to the fast path in the future + // we can implement that but I would expect that there would be very few cases where that's necessary. + // On the slow path TopCache is always the last obtained version of top. + // TopOffset is ignored + bool SlowPath = false; + // Keeping IREmitter not to pass arguments around + IREmitter* IREmit = nullptr; +}; + +inline void X87StackOptimization::InvalidateCaches() { + InvalidateTopOffsetCache(); + ConstantPool.fill(nullptr); +} + +inline void X87StackOptimization::InvalidateTopOffsetCache() { + TopOffsetCache.fill(nullptr); +} + +inline void X87StackOptimization::Reset(bool AlsoSlowPath) { + if (AlsoSlowPath) { + SlowPath = false; + } + StackData.clear(); + InvalidateCaches(); +} + +inline Ref X87StackOptimization::GetConstant(ssize_t Offset) { + if (Offset < 0 || Offset >= X87StackOptimization::ConstantPool.size()) { + // not dealt by pool + return IREmit->_Constant(Offset); + } + if (ConstantPool[Offset] == nullptr) { + + ConstantPool[Offset] = IREmit->_Constant(Offset); + } + return ConstantPool[Offset]; +} + +inline void X87StackOptimization::MigrateToSlowPathIf(bool ShouldMigrate) { + if (ShouldMigrate && !SlowPath) { + SynchronizeStackValues(); + Reset(false); // Reset everything but no need to change slowpath + SlowPath = true; + } +} + +inline Ref X87StackOptimization::GetTopWithCache_Slow() { + if (!TopOffsetCache[0]) { + TopOffsetCache[0] = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); + } + return TopOffsetCache[0]; +} + +inline Ref X87StackOptimization::GetOffsetTopWithCache_Slow(uint8_t Offset) { + if (TopOffsetCache[Offset]) { + return TopOffsetCache[Offset]; + } + + auto* OffsetTop = GetTopWithCache_Slow(); + if (Offset != 0) { + OffsetTop = IREmit->_And(OpSize::i32Bit, IREmit->_Add(OpSize::i32Bit, OffsetTop, GetConstant(Offset)), GetConstant(7)); + // GetTopWithCache_Slow already sets the cache so we don't need to set it here for offset == 0 + TopOffsetCache[Offset] = OffsetTop; + } + + return OffsetTop; +} + + +inline void X87StackOptimization::SetTopWithCache_Slow(Ref Value) { + IREmit->_StoreContext(1, GPRClass, Value, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); + InvalidateTopOffsetCache(); + TopOffsetCache[0] = Value; +} + +inline void X87StackOptimization::SetX87ValidTag(Ref Value, bool Valid) { + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref RegMask = IREmit->_Lshl(OpSize::i32Bit, GetConstant(1), Value); + Ref NewAbridgedFTW = Valid ? IREmit->_Or(OpSize::i32Bit, AbridgedFTW, RegMask) : IREmit->_Andn(OpSize::i32Bit, AbridgedFTW, RegMask); + IREmit->_StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); +} + +inline Ref X87StackOptimization::GetX87ValidTag_Slow(uint8_t Offset) { + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + return IREmit->_And(OpSize::i32Bit, IREmit->_Lshr(OpSize::i32Bit, AbridgedFTW, GetOffsetTopWithCache_Slow(Offset)), GetConstant(1)); +} + +inline Ref X87StackOptimization::LoadStackValueAtOffset_Slow(uint8_t Offset) { + return IREmit->_LoadContextIndexed(GetOffsetTopWithCache_Slow(Offset), ReducedPrecisionMode ? 8 : 16, MMBaseOffset(), 16, FPRClass); +} + +inline void X87StackOptimization::StoreStackValueAtOffset_Slow(Ref Value, uint8_t Offset, bool SetValid) { + OrderedNode* TopOffset = GetOffsetTopWithCache_Slow(Offset); + // store + IREmit->_StoreContextIndexed(Value, TopOffset, ReducedPrecisionMode ? 8 : 16, MMBaseOffset(), 16, FPRClass); + // mark it valid + // In some cases we might already know it has been previously set as valid so we don't need to do it again + if (SetValid) { + SetX87ValidTag(TopOffset, true); + } +} + +inline Ref X87StackOptimization::RotateRight8(uint32_t V, Ref Amount) { + return IREmit->_Lshr(OpSize::i32Bit, GetConstant(V | (V << 8)), Amount); +} + +inline std::optional X87StackOptimization::MigrateToSlowPath_IfInvalid(uint8_t Offset) { + const auto& [Valid, StackMember] = StackData.top(Offset); + MigrateToSlowPathIf(Valid != StackSlot::VALID); + if (Valid == StackSlot::VALID) { + return StackMember; + } + return {}; +} + +inline Ref X87StackOptimization::LoadStackValue(uint8_t Offset) { + const auto& StackValue = MigrateToSlowPath_IfInvalid(Offset); + return SlowPath ? LoadStackValueAtOffset_Slow(Offset) : StackValue->StackDataNode; +} + +inline void X87StackOptimization::StoreStackValue(Ref Value, uint8_t Offset, bool SetValid) { + if (SlowPath) { + StoreStackValueAtOffset_Slow(Value, Offset, SetValid); + } else { + StackData.setTop(StackMemberInfo {Value}, Offset); + } +} + +inline void X87StackOptimization::StackPop() { + if (SlowPath) { + UpdateTopForPop_Slow(); + } else { + StackData.pop(); + } +} + + +void X87StackOptimization::HandleUnop(IROps Op64, bool VFOp64, IROps Op80) { + Ref St0 = LoadStackValue(); + Ref Value {}; + + if (ReducedPrecisionMode) { + if (VFOp64) { + DeriveOp(Value, Op64, IREmit->_VFSqrt(8, 8, St0)); + } else { + DeriveOp(Value, Op64, IREmit->_F64SIN(St0)); + } + } else { + DeriveOp(Value, Op80, IREmit->_F80SQRT(St0)); + } + + StoreStackValue(Value); +} + + +void X87StackOptimization::HandleBinopValue(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, bool MarkDestValid, + uint8_t StackOffset, Ref ValueNode, bool Reverse) { + LOGMAN_THROW_A_FMT(!Reverse || VFOp64, "There are no reverse operations using non VFOp64 ops"); + auto StackNode = LoadStackValue(StackOffset); + + Ref Node = {}; + if (ReducedPrecisionMode) { + if (Reverse) { + DeriveOp(Node, Op64, IREmit->_VFAdd(8, 8, ValueNode, StackNode)); + } else { + if (VFOp64) { + DeriveOp(Node, Op64, IREmit->_VFAdd(8, 8, StackNode, ValueNode)); + } else { + DeriveOp(Node, Op64, IREmit->_F64FPREM(StackNode, ValueNode)); + } + } + } else { + if (Reverse) { + DeriveOp(Node, Op80, IREmit->_F80Add(ValueNode, StackNode)); + } else { + DeriveOp(Node, Op80, IREmit->_F80Add(StackNode, ValueNode)); + } + } + + StoreStackValue(Node, DestStackOffset, MarkDestValid && StackOffset != DestStackOffset); +} + +void X87StackOptimization::HandleBinopStack(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, uint8_t StackOffset1, + uint8_t StackOffset2, bool Reverse) { + auto StackNode = LoadStackValue(StackOffset2); + HandleBinopValue(Op64, VFOp64, Op80, DestStackOffset, StackOffset2 != DestStackOffset, StackOffset1, StackNode, Reverse); +} + +inline void X87StackOptimization::UpdateTopForPop_Slow() { + // Pop the top of the x87 stack + auto* TopOffset = GetTopWithCache_Slow(); + TopOffset = IREmit->_Add(OpSize::i32Bit, TopOffset, GetConstant(1)); + TopOffset = IREmit->_And(OpSize::i32Bit, TopOffset, GetConstant(7)); + SetTopWithCache_Slow(TopOffset); +} + +inline void X87StackOptimization::UpdateTopForPush_Slow() { + // Pop the top of the x87 stack + auto* TopOffset = GetTopWithCache_Slow(); + TopOffset = IREmit->_Sub(OpSize::i32Bit, TopOffset, GetConstant(1)); + TopOffset = IREmit->_And(OpSize::i32Bit, TopOffset, GetConstant(7)); + SetTopWithCache_Slow(TopOffset); +} + +// We synchronize stack values in a few occasions but one of the most important of those, +// is when we move from fast to a slow path and need to make sure that the context is properly +// written. +Ref X87StackOptimization::SynchronizeStackValues() { + if (SlowPath) { // Nothing to do here. + return GetTopWithCache_Slow(); + } + + // Store new top which is now the original top minus recorded top offset + // Careful with underflow wraparound. + const auto TopOffset = StackData.TopOffset; + + if (TopOffset != 0) { + auto* OrigTop = GetTopWithCache_Slow(); + Ref NewTop {}; + if (TopOffset > 0) { + NewTop = IREmit->_And(OpSize::i32Bit, IREmit->_Sub(OpSize::i32Bit, OrigTop, GetConstant(TopOffset)), GetConstant(0x7)); + } else { + NewTop = IREmit->_And(OpSize::i32Bit, IREmit->_Add(OpSize::i32Bit, OrigTop, GetConstant(-TopOffset)), GetConstant(0x7)); + } + SetTopWithCache_Slow(NewTop); + } + StackData.TopOffset = 0; + + // Before leaving we need to write the current values in the stack to + // context so that the values are correct. Copy SourceDataNode in the + // stack to the respective mmX register. + Ref TopValue = GetTopWithCache_Slow(); + for (size_t i = 0; i < StackData.size; ++i) { + const auto& [Valid, StackMember] = StackData.top(i); + + if (Valid == StackSlot::UNUSED) { + continue; + } + Ref TopIndex = GetOffsetTopWithCache_Slow(i); + if (Valid == StackSlot::VALID) { + IREmit->_StoreContextIndexed(StackMember.StackDataNode, TopIndex, ReducedPrecisionMode ? 8 : 16, MMBaseOffset(), 16, FPRClass); + } + } + { // Set valid tags + uint8_t Mask = StackData.getValidMask(); + if (Mask == 0xff) { + IREmit->_StoreContext(1, GPRClass, GetConstant(Mask), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } else if (Mask != 0) { + if (std::popcount(Mask) == 1) { + uint8_t BitIdx = __builtin_ctz(Mask); + SetX87ValidTag(GetOffsetTopWithCache_Slow(BitIdx), true); + } else { + // perform a rotate right on mask by top + auto* TopValue = GetTopWithCache_Slow(); + Ref RotAmount = IREmit->_Sub(OpSize::i32Bit, GetConstant(8), TopValue); + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref NewAbridgedFTW = IREmit->_Or(OpSize::i32Bit, AbridgedFTW, RotateRight8(Mask, RotAmount)); + IREmit->_StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } + } + } + { // Set invalid tags + uint8_t Mask = StackData.getInvalidMask(); + if (Mask == 0xff) { + IREmit->_StoreContext(1, GPRClass, GetConstant(0), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } else if (Mask != 0) { + if (std::popcount(Mask)) { + uint8_t BitIdx = __builtin_ctz(Mask); + SetX87ValidTag(GetOffsetTopWithCache_Slow(BitIdx), false); + } else { + // Same rotate right as above but this time on the invalid mask + auto* TopValue = GetTopWithCache_Slow(); + Ref RotAmount = IREmit->_Sub(OpSize::i32Bit, GetConstant(8), TopValue); + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref NewAbridgedFTW = IREmit->_Andn(OpSize::i32Bit, AbridgedFTW, RotateRight8(Mask, RotAmount)); + IREmit->_StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } + } + } + return TopValue; +} + +std::tuple X87StackOptimization::SplitF64SigExp(Ref Node) { + Ref Gpr = IREmit->_VExtractToGPR(8, 8, Node, 0); + + Ref Exp = IREmit->_And(OpSize::i64Bit, Gpr, GetConstant(0x7ff0000000000000LL)); + Exp = IREmit->_Lshr(OpSize::i64Bit, Exp, GetConstant(52)); + Exp = IREmit->_Sub(OpSize::i64Bit, Exp, GetConstant(1023)); + Exp = IREmit->_Float_FromGPR_S(8, 8, Exp); + Ref Sig = IREmit->_And(OpSize::i64Bit, Gpr, GetConstant(0x800fffffffffffffLL)); + Sig = IREmit->_Or(OpSize::i64Bit, Sig, GetConstant(0x3ff0000000000000LL)); + Sig = IREmit->_VCastFromGPR(8, 8, Sig); + + return std::tuple {Exp, Sig}; +} + +void X87StackOptimization::Run(IREmitter* Emit) { + FEXCORE_PROFILE_SCOPED("PassManager::x87StackOpt"); + + auto CurrentIR = Emit->ViewIR(); + auto* HeaderOp = CurrentIR.GetHeader(); + LOGMAN_THROW_AA_FMT(HeaderOp->Header.Op == OP_IRHEADER, "First op wasn't IRHeader"); + + if (!HeaderOp->HasX87) { + // If there is no x87 in this, just early exit. + return; + } + + // Initialize IREmit member + IREmit = Emit; + + // Run optimization proper + for (auto [BlockNode, BlockHeader] : CurrentIR.GetBlocks()) { + auto BlockIROp = BlockHeader->CW(); + // Each time we deal with a new block we need to start over. + // The optimization should run per-block + Reset(); + + for (auto [CodeNode, IROp] : CurrentIR.GetCode(BlockNode)) { + if (!LoweredX87(IROp->Op)) { + continue; + } + IREmit->SetWriteCursor(CodeNode); + switch (IROp->Op) { + case OP_F80ADDSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFADD, true, OP_F80ADD, Op->SrcStack1, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80SUBSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFSUB, true, OP_F80SUB, Op->DstStack, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80MULSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFMUL, true, OP_F80MUL, Op->SrcStack1, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80DIVSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFDIV, true, OP_F80DIV, Op->DstStack, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80FPREMSTACK: { + HandleBinopStack(OP_F64FPREM, false, OP_F80FPREM, 0, 0, 1); + break; + } + + case OP_F80FPREM1STACK: { + HandleBinopStack(OP_F64FPREM1, false, OP_F80FPREM1, 0, 0, 1); + break; + } + + case OP_F80SCALESTACK: { + HandleBinopStack(OP_F64SCALE, false, OP_F80SCALE, 0, 0, 1); + break; + } + + case OP_F80FYL2XSTACK: { + HandleBinopStack(OP_F64FYL2X, false, OP_F80FYL2X, 1, 0, 1); + StackPop(); + break; + } + + case OP_F80ATANSTACK: { + HandleBinopStack(OP_F64ATAN, false, OP_F80ATAN, 1, 1, 0); + StackPop(); + break; + } + + case OP_F80ADDVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFADD, true, OP_F80ADD, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src)); + break; + } + + case OP_F80SUBRVALUE: + case OP_F80SUBVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFSUB, true, OP_F80SUB, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src), IROp->Op == OP_F80SUBRVALUE); + break; + } + + case OP_F80DIVRVALUE: + case OP_F80DIVVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFDIV, true, OP_F80DIV, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src), IROp->Op == OP_F80DIVRVALUE); + break; + } + + case OP_F80MULVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFMUL, true, OP_F80MUL, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src)); + break; + } + + case OP_F80SQRTSTACK: { + HandleUnop(OP_VFSQRT, true, OP_F80SQRT); + break; + } + + case OP_F80SINSTACK: { + HandleUnop(OP_F64SIN, false, OP_F80SIN); + + break; + } + + case OP_F80COSSTACK: { + HandleUnop(OP_F64COS, false, OP_F80COS); + break; + } + + case OP_F80F2XM1STACK: { + HandleUnop(OP_F64F2XM1, false, OP_F80F2XM1); + break; + } + + + case OP_F80PTANSTACK: { + HandleUnop(OP_F64TAN, false, OP_F80TAN); + Ref OneConst {}; + if (ReducedPrecisionMode) { + OneConst = IREmit->_VCastFromGPR(8, 8, GetConstant(0x3FF0000000000000)); + } else { + OneConst = IREmit->_LoadNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); + } + + if (SlowPath) { + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(OneConst); + } else { + StackData.push(StackMemberInfo {OneConst}); + } + break; + } + + case OP_F80SINCOSSTACK: { + Ref St0 = LoadStackValue(); + + Ref SinValue {}; + Ref CosValue {}; + if (ReducedPrecisionMode) { + SinValue = IREmit->_F64SIN(St0); + CosValue = IREmit->_F64COS(St0); + } else { + SinValue = IREmit->_F80SIN(St0); + CosValue = IREmit->_F80COS(St0); + } + + // Push values + if (SlowPath) { + StoreStackValueAtOffset_Slow(SinValue, 0, false); + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(CosValue, 0, true); + } else { + StackData.setTop(StackMemberInfo {SinValue}); + StackData.push(StackMemberInfo {CosValue}); + } + break; + } + + case OP_INITSTACK: { + StackData.clear(); + break; + } + + case OP_INVALIDATESTACK: { + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + + if (Offset != 0xff) { // invalidate single offset + if (SlowPath) { + auto* TopValue = GetTopWithCache_Slow(); + if (Offset != 0) { + auto* Mask = GetConstant(7); + TopValue = IREmit->_And(OpSize::i32Bit, IREmit->_Add(OpSize::i32Bit, TopValue, GetConstant(Offset)), Mask); + } + SetX87ValidTag(TopValue, false); + } else { + StackData.setTagInvalid(Offset); + } + } else { // invalidate all + if (SlowPath) { + IREmit->_StoreContext(1, GPRClass, GetConstant(0), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } else { + for (size_t i = 0; i < StackData.size; i++) { + StackData.setTagInvalid(i); + } + } + } + break; + } + + case OP_PUSHSTACK: { + const auto* Op = IROp->C(); + auto* SourceNode = CurrentIR.GetNode(Op->X80Src); + + if (SlowPath) { + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(SourceNode); + } else { + auto* SourceNode = CurrentIR.GetNode(Op->X80Src); + auto* OriginalNode = CurrentIR.GetNode(Op->OriginalValue); + StackData.push(StackMemberInfo {SourceNode, OriginalNode, SizeToOpSize(Op->LoadSize), Op->Float}); + } + break; + } + + case OP_COPYPUSHSTACK: { + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + auto Value = MigrateToSlowPath_IfInvalid(Offset); + + if (SlowPath) { + Ref St0 = LoadStackValueAtOffset_Slow(Offset); + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(St0); + } else { + StackData.push(*Value); + } + break; + } + + case OP_READSTACKVALUE: { + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + Ref NewValue = LoadStackValue(Offset); + + IREmit->ReplaceUsesWithAfter(CodeNode, NewValue, CodeNode); + break; + } + + case OP_STACKVALIDTAG: { + // Returns 0 if value is valid and 1 otherwise. + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + auto Value = MigrateToSlowPath_IfInvalid(Offset); + + Ref Tag {}; + if (SlowPath) { + Tag = GetX87ValidTag_Slow(Offset); + } else { + Tag = Value ? GetConstant(1) : GetConstant(0); + } + + IREmit->ReplaceUsesWithAfter(CodeNode, Tag, CodeNode); + break; + } + + case OP_STORESTACKMEMORY: { + const auto* Op = IROp->C(); + const auto& Value = MigrateToSlowPath_IfInvalid(); + Ref StackNode = SlowPath ? LoadStackValueAtOffset_Slow() : Value->StackDataNode; + Ref AddrNode = CurrentIR.GetNode(Op->Addr); + + // On the fast path we can optimize memory copies. + // If we are doing: + // fld dword [rax] + // fst dword [rbx] + // We can optimize this to: + // ldr w2, [x0] + // str w2, [x1] + // or similar. As long as the source size and dest size are one and the same. + // This will avoid any conversions between source and stack element size and conversion back. + if (!SlowPath && Value->Source && Value->Source->first == Op->StoreSize && Value->InterpretAsFloat) { + IREmit->_StoreMem(Value->InterpretAsFloat ? FPRClass : GPRClass, Op->StoreSize, AddrNode, Value->Source->second); + } else { + if (ReducedPrecisionMode) { + switch (Op->StoreSize) { + case 4: { + StackNode = IREmit->_Float_FToF(4, 8, StackNode); + IREmit->_StoreMem(FPRClass, 4, AddrNode, StackNode); + break; + } + case 8: { + IREmit->_StoreMem(FPRClass, 8, AddrNode, StackNode); + break; + } + case 10: { + StackNode = IREmit->_F80CVTTo(StackNode, 8); + IREmit->_StoreMem(FPRClass, 8, AddrNode, StackNode); + auto Upper = IREmit->_VExtractToGPR(16, 8, StackNode, 1); + IREmit->_StoreMem(GPRClass, 2, Upper, AddrNode, GetConstant(8), 8, MEM_OFFSET_SXTX, 1); + break; + } + } + } else { + if (Op->StoreSize != 10) { // if it's not 80bits then convert + StackNode = IREmit->_F80CVT(Op->StoreSize, StackNode); + } + if (Op->StoreSize == 10) { // Part of code from StoreResult_WithOpSize() + // For X87 extended doubles, split before storing + IREmit->_StoreMem(FPRClass, 8, AddrNode, StackNode); + auto Upper = IREmit->_VExtractToGPR(16, 8, StackNode, 1); + auto DestAddr = IREmit->_Add(OpSize::i64Bit, AddrNode, GetConstant(8)); + IREmit->_StoreMem(GPRClass, 2, DestAddr, Upper, 8); + } else { + IREmit->_StoreMem(FPRClass, Op->StoreSize, AddrNode, StackNode); + } + } + } + break; + } + + case OP_STORESTACKTOSTACK: { // stores top of stack in another place in stack. + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + + if (Offset != 0) { + auto Value = MigrateToSlowPath_IfInvalid(); + + // Need to store st0 to stack location - basically a copy. + if (SlowPath) { + StoreStackValueAtOffset_Slow(LoadStackValueAtOffset_Slow(), Offset); + } else { + StackData.setTop(*Value, Offset); + } + } + break; + } + case OP_POPSTACKDESTROY: { + if (SlowPath) { + SetX87ValidTag(GetTopWithCache_Slow(), false); + } + StackPop(); + break; + } + + case OP_F80STACKXCHANGE: { + const auto* Op = IROp->C(); + auto Offset = Op->SrcStack; + Ref ValueTop = LoadStackValue(); + Ref ValueOffset = LoadStackValue(Offset); + + StoreStackValue(ValueOffset); + StoreStackValue(ValueTop, Offset); + break; + } + + case OP_F80STACKCHANGESIGN: { + Ref Value = LoadStackValue(); + + // We need a couple of intermediate instructions to change the sign + // of a value + Ref ResultNode {}; + if (ReducedPrecisionMode) { + ResultNode = IREmit->_VFNeg(8, 8, Value); + } else { + Ref Low = GetConstant(0); + Ref High = GetConstant(0b1'000'0000'0000'0000ULL); + Ref HelperNode = IREmit->_VCastFromGPR(16, 8, Low); + HelperNode = IREmit->_VInsGPR(16, 8, 1, HelperNode, High); + ResultNode = IREmit->_VXor(16, 1, Value, HelperNode); + } + StoreStackValue(ResultNode); + break; + } + + case OP_F80STACKABS: { + Ref Value = LoadStackValue(); + + Ref ResultNode {}; + if (ReducedPrecisionMode) { + ResultNode = IREmit->_VFAbs(8, 8, Value); + } else { + // Intermediate insts + Ref Low = GetConstant(~0ULL); + Ref High = GetConstant(0b0'111'1111'1111'1111ULL); + Ref HelperNode = IREmit->_VCastFromGPR(16, 8, Low); + HelperNode = IREmit->_VInsGPR(16, 8, 1, HelperNode, High); + ResultNode = IREmit->_VAnd(16, 1, Value, HelperNode); + } + StoreStackValue(ResultNode); + break; + } + + case OP_F80CMPSTACK: { + const auto* Op = IROp->C(); + auto Offset = Op->SrcStack; + Ref StackValue1 = LoadStackValue(); + Ref StackValue2 = LoadStackValue(Offset); + + Ref CmpNode {}; + if (ReducedPrecisionMode) { + CmpNode = IREmit->_FCmp(8, StackValue1, StackValue2); + } else { + CmpNode = IREmit->_F80Cmp(StackValue1, StackValue2); + } + + IREmit->ReplaceUsesWithAfter(CodeNode, CmpNode, CodeNode); + break; + } + case OP_F80STACKTEST: { + const auto* Op = IROp->C(); + auto Offset = Op->SrcStack; + auto StackNode = LoadStackValue(Offset); + Ref ZeroConst = IREmit->_VCastFromGPR(ReducedPrecisionMode ? 8 : 16, 8, GetConstant(0)); + + Ref CmpNode {}; + if (ReducedPrecisionMode) { + CmpNode = IREmit->_FCmp(8, StackNode, ZeroConst); + } else { + CmpNode = IREmit->_F80Cmp(StackNode, ZeroConst); + } + IREmit->ReplaceUsesWithAfter(CodeNode, CmpNode, CodeNode); + break; + } + + + case OP_F80CMPVALUE: { + const auto* Op = IROp->C(); + const auto& Value = CurrentIR.GetNode(Op->X80Src); + auto StackNode = LoadStackValue(); + + Ref CmpNode {}; + if (ReducedPrecisionMode) { + CmpNode = IREmit->_FCmp(8, StackNode, Value); + } else { + CmpNode = IREmit->_F80Cmp(StackNode, Value); + } + IREmit->ReplaceUsesWithAfter(CodeNode, CmpNode, CodeNode); + break; + } + + case OP_F80XTRACTSTACK: { + Ref St0 = LoadStackValue(); + + Ref Exp {}; + Ref Sig {}; + if (ReducedPrecisionMode) { + std::tie(Exp, Sig) = SplitF64SigExp(St0); + } else { + Exp = IREmit->_F80XTRACT_EXP(St0); + Sig = IREmit->_F80XTRACT_SIG(St0); + } + + if (SlowPath) { + // Write exp to top, update top for a push and set sig at new top. + StoreStackValueAtOffset_Slow(Exp, 0, false); + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(Sig); + } else { + StackData.setTop(StackMemberInfo {Exp}); + StackData.push(StackMemberInfo {Sig}); + } + break; + } + + case OP_SYNCSTACKTOSLOW: { + // This synchronizes stack values but doesn't necessarily moves us off the FastPath! + Ref NewTop = SynchronizeStackValues(); + IREmit->ReplaceUsesWithAfter(CodeNode, NewTop, CodeNode); + break; + } + + case OP_STACKFORCESLOW: { + MigrateToSlowPathIf(true); + break; + } + + case OP_INCSTACKTOP: { + if (SlowPath) { + UpdateTopForPush_Slow(); + } else { + StackData.rotate(false); + } + break; + } + + case OP_DECSTACKTOP: { + if (SlowPath) { + UpdateTopForPop_Slow(); + } else { + StackData.rotate(true); + } + break; + } + + case OP_F80ROUNDSTACK: { + Ref St0 = LoadStackValue(); + + Ref Value {}; + if (ReducedPrecisionMode) { + Value = IREmit->_Vector_FToI(8, 8, St0, Round_Host); + } else { + Value = IREmit->_F80Round(St0); + } + StoreStackValue(Value); + break; + } + + case OP_F80VBSLSTACK: { + const auto* Op = IROp->C(); + + auto StackOffset1 = Op->SrcStack1; + auto StackOffset2 = Op->SrcStack2; + Ref Value1 = LoadStackValue(StackOffset1); + Ref Value2 = LoadStackValue(StackOffset2); + + Ref StackNode = IREmit->_VBSL(16, CurrentIR.GetNode(Op->VectorMask), Value1, Value2); + StoreStackValue(StackNode, 0, StackOffset1 && StackOffset2); + break; + } + + default: LOGMAN_THROW_A_FMT(false, "IROp was expected to be lowered"); + } + IREmit->Remove(CodeNode); + } + + auto Last = CurrentIR.at(BlockIROp->Last); + --Last; + auto [LastCodeNode, LastIROp] = Last(); + LOGMAN_THROW_A_FMT(IsBlockExit(LastIROp->Op), "must be exit"); + IREmit->SetWriteCursorBefore(LastCodeNode); + SynchronizeStackValues(); + } + + return; +} + +fextl::unique_ptr CreateX87StackOptimizationPass() { + return fextl::make_unique(); +} +} // namespace FEXCore::IR diff --git a/docs/SourceOutline.md b/docs/SourceOutline.md index 094c1fe17..4568925c1 100644 --- a/docs/SourceOutline.md +++ b/docs/SourceOutline.md @@ -5,7 +5,7 @@ See [FEXCore/Readme.md](../FEXCore/Readme.md) for more details ### Glossary -- Splatter: a code generator backend that concaternates configurable macros instead of doing isel +- Splatter: a code generator backend that concatenates configurable macros instead of doing isel - IR: Intermediate Representation, our high-level opcode representation, loosely modeling arm64 - SSA: Single Static Assignment, a form of representing IR in memory - Basic Block: A block of instructions with no control flow, terminated by control flow @@ -115,6 +115,7 @@ IR to IR Optimization - [RedundantFlagCalculationElimination.cpp](../FEXCore/Source/Interface/IR/Passes/RedundantFlagCalculationElimination.cpp): This is not used right now, possibly broken - [RegisterAllocationPass.cpp](../FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp) - [RegisterAllocationPass.h](../FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.h) +- [x87StackOptimizationPass.cpp](../FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp): x87 stack optimization pass diff --git a/unittests/gcc-target-tests-32/Known_Failures b/unittests/gcc-target-tests-32/Known_Failures index 89edbff87..9ea523bea 100644 --- a/unittests/gcc-target-tests-32/Known_Failures +++ b/unittests/gcc-target-tests-32/Known_Failures @@ -1,5 +1,4 @@ pr72867.c.gcc-target-test-32 -pr88240.c.gcc-target-test-32 sse2-mmx-pextrw.c.gcc-target-test-32 # Consistently crashes on Solidrun only in CI diff --git a/unittests/gcc-target-tests-64/Known_Failures b/unittests/gcc-target-tests-64/Known_Failures index d52210b78..46d1bc6c3 100644 --- a/unittests/gcc-target-tests-64/Known_Failures +++ b/unittests/gcc-target-tests-64/Known_Failures @@ -13,15 +13,6 @@ asm-5.c.gcc-target-test-64 # This causes its comparison to fail sse2-mmx-pextrw.c.gcc-target-test-64 -# Fails even on host device -# Stores a large 64bit value in to a union of double and 'unsigned long long' -# 'test' loads this value in to a x87 register, then stores that value on to the stack -# Checks the flag and skips a bunch of x87 logic, and loads that value back from the stack in to rax -# Value has been munged from the fld + fstp step -# 0xFFF279535D540FE4 was the original value -# 0xFFFA79535D540FE4 was the value it turned in to -pr88240.c.gcc-target-test-64 - # These tests fail because of things unrelated to the sse4.1 instructions sse4_1-ceil-sfix-vec.c.gcc-target-test-64 sse4_1-ceilf-sfix-vec.c.gcc-target-test-64 From 774325dcf2f238fea05c4b6ccd54dedb400d87d5 Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Fri, 28 Jun 2024 15:43:40 +0200 Subject: [PATCH 2/3] Tests: X87 Refactoring and Pass --- unittests/ASM/Known_Failures_host | 1 + unittests/ASM/X87/FXAM_Push.asm | 2 +- unittests/ASM/X87/FXAM_Push_2.asm | 2 +- unittests/ASM/X87/FXAM_Push_Simple.asm | 40 ++++++++++++++++ unittests/ASM/X87/FXAM_Push_Simple_2.asm | 51 +++++++++++++++++++++ unittests/ASM/X87/FXAM_Simple.asm | 49 ++++++++++++++++++++ unittests/ASM/X87/Memcopy.asm | 21 +++++++++ unittests/ASM/x87_stack.asm | 26 +++++++++++ unittests/FEXLinuxTests/Known_Failures_Host | 2 + 9 files changed, 192 insertions(+), 2 deletions(-) create mode 100644 unittests/ASM/Known_Failures_host create mode 100644 unittests/ASM/X87/FXAM_Push_Simple.asm create mode 100644 unittests/ASM/X87/FXAM_Push_Simple_2.asm create mode 100644 unittests/ASM/X87/FXAM_Simple.asm create mode 100644 unittests/ASM/X87/Memcopy.asm create mode 100644 unittests/ASM/x87_stack.asm diff --git a/unittests/ASM/Known_Failures_host b/unittests/ASM/Known_Failures_host new file mode 100644 index 000000000..322f758bc --- /dev/null +++ b/unittests/ASM/Known_Failures_host @@ -0,0 +1 @@ +Test_X87/FXAM_Simple.asm diff --git a/unittests/ASM/X87/FXAM_Push.asm b/unittests/ASM/X87/FXAM_Push.asm index a26e039bc..d94511f3c 100644 --- a/unittests/ASM/X87/FXAM_Push.asm +++ b/unittests/ASM/X87/FXAM_Push.asm @@ -11,7 +11,7 @@ mov rdx, 0xe0000000 ; This behaviour was seen around Wine 32-bit libraries ; Anything doing a call to a double application would spin ; the x87 stack on to the stack looking for fxam to return empty -; Empty in this case is that C0 and C3 is set whiel C2 is not +; Empty in this case is that C0 and C3 is set while C2 is not fninit ; Fill the x87 stack diff --git a/unittests/ASM/X87/FXAM_Push_2.asm b/unittests/ASM/X87/FXAM_Push_2.asm index c6ef4ff3f..78edde24d 100644 --- a/unittests/ASM/X87/FXAM_Push_2.asm +++ b/unittests/ASM/X87/FXAM_Push_2.asm @@ -11,7 +11,7 @@ mov rdx, 0xe0000000 ; This behaviour was seen around Wine 32-bit libraries ; Anything doing a call to a double application would spin ; the x87 stack on to the stack looking for fxam to return empty -; Empty in this case is that C0 and C3 is set whiel C2 is not +; Empty in this case is that C0 and C3 is set while C2 is not fninit ; Empty stack to make sure we don't push anything diff --git a/unittests/ASM/X87/FXAM_Push_Simple.asm b/unittests/ASM/X87/FXAM_Push_Simple.asm new file mode 100644 index 000000000..de7ab5086 --- /dev/null +++ b/unittests/ASM/X87/FXAM_Push_Simple.asm @@ -0,0 +1,40 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "8" + } +} +%endif + +fninit +fld1 +fld1 +fld1 +fld1 +fld1 +fld1 +fld1 +fld1 + +mov ebx, 0 + +.ExamineStack: +; Examine st(0) +fxam +fwait +; Get the results in to AX +fnstsw ax +and ax, 0x4500 +; Check for empty +cmp ax, 0x4100 +je .Done + +; Now push the x87 stack value +; We know it isn't empty +fstp st0 +fwait +inc ebx +jmp .ExamineStack +.Done: +mov eax, ebx +hlt diff --git a/unittests/ASM/X87/FXAM_Push_Simple_2.asm b/unittests/ASM/X87/FXAM_Push_Simple_2.asm new file mode 100644 index 000000000..429a0ae30 --- /dev/null +++ b/unittests/ASM/X87/FXAM_Push_Simple_2.asm @@ -0,0 +1,51 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "8" + } +} +%endif + +mov rdx, 0xe0000000 + +; This behaviour was seen around Wine 32-bit libraries +; Anything doing a call to a double application would spin +; the x87 stack on to the stack looking for fxam to return empty +; Empty in this case is that C0 and C3 is set while C2 is not + +fninit +; Fill the x87 stack +fldz +fldz +fldz +fldz +fldz +fldz +fldz +fldz + +mov eax, 0 +mov ecx, 0 + +.ExamineStack: +; Examine st(0) +fxam +fwait +; Get the results in to AX +fnstsw ax +and ax, 0x4500 +; Check for empty +cmp ax, 0x4100 +je .Done + +; Now push the x87 stack value +; We know it isn't empty +fstp qword [rdx + rcx * 8] +fwait +inc ecx +jmp .ExamineStack + +.Done: +; Save how many we stored +mov eax, ecx +hlt diff --git a/unittests/ASM/X87/FXAM_Simple.asm b/unittests/ASM/X87/FXAM_Simple.asm new file mode 100644 index 000000000..7e76fbaaa --- /dev/null +++ b/unittests/ASM/X87/FXAM_Simple.asm @@ -0,0 +1,49 @@ +;; Simpler versions of FXAM_Push* tests. +;; In hostrunner tests this will fail because we mentioned below there's no support +;; for the zero flag. In hostrunner RCX should contain 0x4000 instead of 0x400. +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x6", + "RBX": "0x0400", + "RCX": "0x0400", + "RDX": "0x4100" + } +} +%endif + +mov rdx, 0xe0000000 + +fninit +;; Before adding anything to the stack, lets examine it. +;; The result should be empty. +fxam +fwait + +fnstsw ax +and ax, 0x4500 ; should be 0x4100 for zero +mov edx, eax + +fldz +fxam +fwait + +fnstsw ax +and ax, 0x4500 ; should be 0x4000 for zero, but there's no support for it at the moment, so it'll return 0x0400 as it does for a normal number. +mov ecx, eax + +fld1 +fxam +fwait + +fnstsw ax +mov ebx, eax +and ebx, 0x4500 ; should be 0x0400 for normal + +;; Top should be 6 +;; right shift status word by 11 and and with 0x7. +shr eax, 11 +and eax, 0x7 + + +hlt diff --git a/unittests/ASM/X87/Memcopy.asm b/unittests/ASM/X87/Memcopy.asm new file mode 100644 index 000000000..47d299a20 --- /dev/null +++ b/unittests/ASM/X87/Memcopy.asm @@ -0,0 +1,21 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x3ff8000000000000", + "RBX": "0x3ff8000000000000" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +mov rdx, 0x100000000 +mov rax, 0x3ff8000000000000 ; 1.5 +mov [rdx], rax + +fld qword [rdx] +fstp qword [rdx + 8] + +mov rbx, [rdx + 8] +hlt diff --git a/unittests/ASM/x87_stack.asm b/unittests/ASM/x87_stack.asm new file mode 100644 index 000000000..f032ca9c6 --- /dev/null +++ b/unittests/ASM/x87_stack.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x4142434445464748", + "RBX": "0" + } +} +%endif + +lea rax, [rel .data] +lea rbx, [rel .data_mov] + +fld qword [rax] +fstp qword [rbx] + +mov rax, [rbx] +mov rbx, [rbx + 8] +hlt + +.data: +dq 0x4142434445464748 +dq 0x5152535455565758 + +.data_mov: +dq 0 +dq 0 diff --git a/unittests/FEXLinuxTests/Known_Failures_Host b/unittests/FEXLinuxTests/Known_Failures_Host index e69de29bb..81acd73a9 100644 --- a/unittests/FEXLinuxTests/Known_Failures_Host +++ b/unittests/FEXLinuxTests/Known_Failures_Host @@ -0,0 +1,2 @@ +## Unable to support zero flag +FXAM_Simple.asm From 39bc2a82c1698d36e2bfa8303a394ed813651899 Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Mon, 22 Jul 2024 08:50:01 +0200 Subject: [PATCH 3/3] instcountci: X87 Pass and refactoring --- .../FlagM/HotBlocks_32Bit.json | 2405 +- .../FlagM/x87-HalfLife.json | 7732 +- .../FlagM/x87-Oblivion.json | 67401 ++++------- .../FlagM/x87-Psychonauts.json | 93486 +++++++--------- unittests/InstructionCountCI/FlagM/x87.json | 5270 +- .../InstructionCountCI/FlagM/x87_f64.json | 3419 +- unittests/InstructionCountCI/x87.json | 5270 +- unittests/InstructionCountCI/x87_f64.json | 3419 +- 8 files changed, 69922 insertions(+), 118480 deletions(-) diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index 44ae86e9e..95dc691ab 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -143,7 +143,7 @@ ] }, "Psychonauts matrix swizzle": { - "ExpectedInstructionCount": 2340, + "ExpectedInstructionCount": 165, "Comment": [ "Hottest block in Windows Psychonauts", "Doing a 4x4 32-bit float matrix swizzle", @@ -264,2337 +264,162 @@ "mov x20, #0xffffffffffffffbc", "str w5, [x9, w20, sxtw]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w22, #0x1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w22, w21", - "orr w23, w23, w24", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x24, #0xffffffffffffffc0", - "str s2, [x9, w24, sxtw]", - "lsl w25, w22, w21", - "bic w23, w23, w25", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x21, #0xffffffffffffffc0", + "sub w22, w9, #0x40 (64)", + "str s2, [x22]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w25, w22, w21", - "orr w23, w23, w25", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x25, #0xffffffffffffffc4", - "str s2, [x9, w25, sxtw]", - "lsl w12, w22, w21", - "bic w23, w23, w12", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x22, #0xffffffffffffffc4", + "sub w23, w9, #0x3c (60)", + "str s2, [x23]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w12, w22, w21", - "orr w23, w23, w12", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x12, #0xffffffffffffffc8", - "str s2, [x9, w12, sxtw]", - "lsl w13, w22, w21", - "bic w23, w23, w13", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x23, #0xffffffffffffffc8", + "sub w24, w9, #0x38 (56)", + "str s2, [x24]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w13, w22, w21", - "orr w23, w23, w13", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x13, #0xffffffffffffffcc", - "str s2, [x9, w13, sxtw]", - "lsl w14, w22, w21", - "bic w23, w23, w14", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x24, #0xffffffffffffffcc", + "sub w25, w9, #0x34 (52)", + "str s2, [x25]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w14, w22, w21", - "orr w23, w23, w14", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x14, #0xffffffffffffffd0", - "str s2, [x9, w14, sxtw]", - "lsl w15, w22, w21", - "bic w23, w23, w15", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x25, #0xffffffffffffffd0", + "sub w12, w9, #0x30 (48)", + "str s2, [x12]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w15, w22, w21", - "orr w23, w23, w15", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x15, #0xffffffffffffffd4", - "str s2, [x9, w15, sxtw]", - "lsl w16, w22, w21", - "bic w23, w23, w16", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x12, #0xffffffffffffffd4", + "sub w13, w9, #0x2c (44)", + "str s2, [x13]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w16, w22, w21", - "orr w23, w23, w16", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x16, #0xffffffffffffffd8", - "str s2, [x9, w16, sxtw]", - "lsl w17, w22, w21", - "bic w23, w23, w17", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x13, #0xffffffffffffffd8", + "sub w14, w9, #0x28 (40)", + "str s2, [x14]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w17, w22, w21", - "orr w23, w23, w17", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x17, #0xffffffffffffffdc", - "str s2, [x9, w17, sxtw]", - "lsl w29, w22, w21", - "bic w23, w23, w29", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x14, #0xffffffffffffffdc", + "sub w15, w9, #0x24 (36)", + "str s2, [x15]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w29, w22, w21", - "orr w23, w23, w29", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x29, #0xffffffffffffffe0", - "str s2, [x9, w29, sxtw]", - "lsl w30, w22, w21", - "bic w23, w23, w30", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x15, #0xffffffffffffffe0", + "sub w16, w9, #0x20 (32)", + "str s2, [x16]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w30, w22, w21", - "orr w23, w23, w30", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x30, #0xffffffffffffffe4", - "str s2, [x9, w30, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x16, #0xffffffffffffffe4", + "sub w17, w9, #0x1c (28)", + "str s2, [x17]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xffffffffffffffe8", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x17, #0xffffffffffffffe8", + "sub w29, w9, #0x18 (24)", + "str s2, [x29]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xffffffffffffffec", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x29, #0xffffffffffffffec", + "sub w30, w9, #0x14 (20)", + "str s2, [x30]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xfffffffffffffff0", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x30, #0xfffffffffffffff0", + "sub w19, w9, #0x10 (16)", + "str s2, [x19]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "mov x19, #0xfffffffffffffff4", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "sub w19, w9, #0xc (12)", + "str s2, [x19]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "mov x19, #0xfffffffffffffff8", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "sub w19, w9, #0x8 (8)", + "str s2, [x19]", "ldr w4, [x9, w20, sxtw]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w22, w20", - "orr w21, w23, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x23, #0xfffffffffffffffc", - "str s2, [x9, w23, sxtw]", - "lsl w19, w22, w20", - "bic w21, w21, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x20, #0xfffffffffffffffc", + "sub w19, w9, #0x4 (4)", + "str s2, [x19]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", + "ldr s2, [x9, w21, sxtw]", "str s2, [x5]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "ldr s2, [x9, w22, sxtw]", + "add w21, w6, #0x4 (4)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #16]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #28]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w30, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #36]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffe8", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #40]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffec", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff0", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #48]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff4", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #52]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #60]", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x8 (8)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w24, sxtw]", + "add w21, w5, #0xc (12)", + "str s2, [x21]", + "ldr w6, [x9, #8]", + "ldr s2, [x9, w25, sxtw]", + "add w21, w6, #0x10 (16)", + "str s2, [x21]", + "ldr w4, [x9, #8]", + "ldr s2, [x9, w12, sxtw]", + "add w21, w4, #0x14 (20)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w13, sxtw]", + "add w21, w5, #0x18 (24)", + "str s2, [x21]", + "ldr w6, [x9, #8]", + "ldr s2, [x9, w14, sxtw]", + "add w21, w6, #0x1c (28)", + "str s2, [x21]", + "ldr w4, [x9, #8]", + "ldr s2, [x9, w15, sxtw]", + "add w21, w4, #0x20 (32)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w16, sxtw]", + "add w21, w5, #0x24 (36)", + "str s2, [x21]", + "ldr w6, [x9, #8]", + "ldr s2, [x9, w17, sxtw]", + "add w21, w6, #0x28 (40)", + "str s2, [x21]", + "ldr w4, [x9, #8]", + "ldr s2, [x9, w29, sxtw]", + "add w21, w4, #0x2c (44)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w30, sxtw]", + "add w21, w5, #0x30 (48)", + "str s2, [x21]", + "ldr w6, [x9, #8]", + "mov x21, #0xfffffffffffffff4", + "ldr s2, [x9, w21, sxtw]", + "add w21, w6, #0x34 (52)", + "str s2, [x21]", + "ldr w4, [x9, #8]", + "mov x21, #0xfffffffffffffff8", + "ldr s2, [x9, w21, sxtw]", + "add w21, w4, #0x38 (56)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w20, sxtw]", + "add w20, w5, #0x3c (60)", + "str s2, [x20]", "ldr w4, [x9, #8]", "mov x8, x9", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "strb w21, [x28, #1298]" + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json index 0071184b4..bb2f70b75 100644 --- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 2034, + "ExpectedInstructionCount": 1368, "x86Insts": [ "sub esp,0x2c", "mov ecx,dword [esp + 0x34]", @@ -93,7 +93,6 @@ "ldr w5, [x8, #52]", "ldr w6, [x8, #48]", "ldr w4, [x8, #56]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -122,17 +121,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -144,7 +133,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -157,193 +146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -358,6 +163,123 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x5, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x6, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -369,15 +291,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "fmov s7, s0", + "str s7, [x20]", + "mov w20, #0x8", + "ldr s7, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -389,7 +306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -402,18 +319,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -425,7 +334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -438,35 +347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -479,8 +362,94 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -497,133 +466,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -650,13 +494,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -685,67 +523,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -760,6 +537,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -771,15 +580,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -791,7 +594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -804,23 +607,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -835,6 +655,37 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -851,27 +702,604 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "movi v6.2d, #0x0", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -888,7 +1316,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -902,32 +1330,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -940,11 +1343,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -955,35 +1358,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1000,7 +1377,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -1014,80 +1391,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1102,1004 +1406,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s3", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s3", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s3", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s3", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q4, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q4, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2111,20 +1419,46 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w22, w22, w20", - "orr w23, w23, w20", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", "rmif x22, #63, #nzCv", "rmif x23, #62, #nZcv", - "eor w26, w20, #0x1", - "strb w21, [x28, #1298]" + "mov w22, #0x1", + "eor w26, w21, #0x1", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x3 (3)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "str q4, [x0, #1040]", + "add w23, w21, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q7, [x0, #1040]", + "add w23, w21, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w23, w21, #0x3 (3)", + "and w23, w23, #0x7", + "sub w20, w20, w21", + "ldrb w21, [x28, #1298]", + "mov w24, #0x707", + "lsr w20, w24, w20", + "orr w20, w21, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w23", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 838, + "ExpectedInstructionCount": 551, "x86Insts": [ "sub esp,0x1c", "mov edx,dword [esp + 0x20]", @@ -2169,7 +1503,6 @@ "subs w8, w8, #0x1c (28)", "ldr w6, [x8, #32]", "ldr w4, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2198,27 +1531,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov x23, #0xffffffffffffffff", - "mov w24, #0x7fff", - "fmov d3, x23", - "mov v3.d[1], x24", + "mov x20, #0xffffffffffffffff", + "mov w21, #0x7fff", + "fmov d3, x20", + "mov v3.d[1], x21", "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2230,7 +1548,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2243,43 +1561,116 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "fmov d4, x20", + "mov v4.d[1], x21", + "and v3.16b, v3.16b, v4.16b", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov x22, x0", + "ubfx x23, x22, #1, #1", + "ubfx x24, x22, #0, #1", + "ubfx x22, x22, #2, #1", + "orr w23, w23, w22", + "orr w22, w24, w22", + "rmif x23, #63, #nzCv", + "rmif x22, #62, #nZcv", + "mov w22, #0x1", + "csetm x23, hs", + "csel x23, x20, x23, eq", + "dup v4.2d, x23", + "bit v2.16b, v3.16b, v4.16b", + "ldr s3, [x6, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "fmov d4, x20", + "mov v4.d[1], x21", + "and v3.16b, v3.16b, v4.16b", + "ldr s4, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "and v4.16b, v4.16b, v5.16b", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2294,8 +1685,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2307,398 +1698,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x25, x20, #1, #1", - "ubfx x12, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w25, w25, w20", - "orr w20, w12, w20", - "rmif x25, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x25, x20, #1, #1", - "ubfx x12, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w25, w25, w20", - "orr w20, w12, w20", - "rmif x25, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x24, x20, #1, #1", - "ubfx x25, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w24, w24, w20", - "orr w20, w25, w20", + "mov x23, x0", + "ubfx x24, x23, #1, #1", + "ubfx x25, x23, #0, #1", + "ubfx x23, x23, #2, #1", + "orr w24, w24, w23", + "orr w23, w25, w23", "rmif x24, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "rmif x23, #62, #nZcv", + "csetm x23, hs", + "csel x23, x20, x23, eq", + "dup v5.2d, x23", + "bit v3.16b, v4.16b, v5.16b", + "mov w23, #0x8", + "ldr s4, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2710,13 +1723,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -2726,35 +1736,44 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "and v4.16b, v4.16b, v5.16b", + "ldr s5, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d6, x20", + "mov v6.d[1], x21", + "and v5.16b, v5.16b, v6.16b", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2767,8 +1786,47 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov x21, x0", + "ubfx x24, x21, #1, #1", + "ubfx x25, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w24, w24, w21", + "orr w21, w25, w21", + "rmif x24, #63, #nzCv", + "rmif x21, #62, #nZcv", + "csetm x21, hs", + "csel x20, x20, x21, eq", + "dup v6.2d, x20", + "bit v4.16b, v5.16b, v6.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2785,15 +1843,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2808,52 +1858,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2865,18 +1871,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2889,10 +1886,70 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2907,28 +1964,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2954,18 +1989,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2980,8 +2006,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2994,19 +2020,40 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x24, x20, #0, #1", "ubfx x20, x20, #2, #1", - "orr w22, w22, w20", - "orr w23, w23, w20", - "rmif x22, #63, #nzCv", - "rmif x23, #62, #nZcv", + "orr w21, w21, w20", + "orr w24, w24, w20", + "rmif x21, #63, #nzCv", + "rmif x24, #62, #nZcv", "eor w26, w20, #0x1", - "strb w21, [x28, #1298]" + "ldrb w20, [x28, #1019]", + "sub w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", + "sub w20, w23, w20", + "ldrb w23, [x28, #1298]", + "mov w24, #0x303", + "lsr w20, w24, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w21", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block3": { - "ExpectedInstructionCount": 1131, + "ExpectedInstructionCount": 807, "x86Insts": [ "fld dword [ecx]", "fld dword [edx + 0x4]", @@ -3042,7 +2089,6 @@ "fstp dword [esi]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3071,17 +2117,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "ldr s3, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3093,7 +2129,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3106,18 +2142,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3129,7 +2157,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3142,18 +2170,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3165,7 +2185,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3178,18 +2198,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x5, #8]", + "str s6, [x8]", + "ldr s6, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3201,7 +2215,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3214,196 +2228,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3420,6 +2247,66 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3431,18 +2318,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3454,7 +2333,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3467,11 +2346,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3484,10 +2361,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3499,25 +2376,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3529,7 +2392,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3542,11 +2405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3559,10 +2420,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3574,69 +2435,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3651,88 +2453,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3747,32 +2469,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3785,8 +2481,97 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s5, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -3803,32 +2588,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3841,10 +2601,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3856,30 +2616,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3891,7 +2632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3904,11 +2645,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3923,8 +2662,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3936,19 +2675,99 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x8]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w20, #0x1", + "strb w20, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3965,113 +2784,6 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4086,19 +2798,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w21, #0x2 (2)", + "and w22, w22, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w21, w20, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w22, w20, w22", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1019]", + "add w22, w21, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4130,15 +2851,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w20, w21", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4167,16 +2889,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "ldrb w22, [x28, #1298]", + "lsl w20, w20, w21", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "add w20, w21, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block4": { - "ExpectedInstructionCount": 237, + "ExpectedInstructionCount": 206, "x86Insts": [ "push ebp", "push edi", @@ -4245,10 +2968,9 @@ "ldr w4, [x8, #104]", "add w9, w8, #0x38 (56)", "add w10, w8, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "mov w21, #0x2098", - "movk w21, #0x5, lsl #16", - "ldr d2, [x21]", + "mov w20, #0x2098", + "movk w20, #0x5, lsl #16", + "ldr d2, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4276,23 +2998,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w10, [x8, #12]", "ldr w11, [x8, #100]", "str w9, [x8, #8]", "ldr w7, [x8, #108]", "str w4, [x8, #40]", "ldr w4, [x8, #96]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4304,7 +3016,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4317,11 +3029,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4334,10 +3044,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4352,11 +3062,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4383,13 +3089,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4418,16 +3118,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4455,26 +3145,28 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "mov w20, #0x423", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0bc", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0bc", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block5": { - "ExpectedInstructionCount": 1198, + "ExpectedInstructionCount": 971, "x86Insts": [ "fld dword [esp + 0x80]", "fsub dword [esp + 0x7c]", @@ -4527,7 +3219,6 @@ "test al,al" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4556,17 +3247,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4578,7 +3259,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4591,11 +3272,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4608,10 +3287,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4626,15 +3305,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x8, #136]", "ldr w5, [x8, #140]", "ldr s17, [x8, #124]", "str w6, [x8, #56]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4660,10 +3335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4675,7 +3349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4688,35 +3362,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4729,10 +3377,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4747,27 +3395,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4779,7 +3408,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4792,11 +3421,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4809,10 +3436,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4827,11 +3454,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4858,13 +3481,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4893,15 +3510,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9]", + "ldr s4, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4913,7 +3522,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4926,11 +3535,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4943,10 +3550,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4961,16 +3568,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr s16, [x8, #44]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4983,10 +3581,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5001,10 +3599,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9]", + "ldr s4, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5016,7 +3611,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5029,11 +3624,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5046,10 +3639,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5064,11 +3657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5095,13 +3684,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5130,15 +3713,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #4]", + "ldr s4, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5150,7 +3725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5163,11 +3738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5180,10 +3753,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5198,15 +3771,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5219,10 +3783,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5237,10 +3801,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #4]", + "ldr s4, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5252,7 +3813,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5265,11 +3826,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5282,10 +3841,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5300,11 +3859,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5331,13 +3886,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5366,15 +3915,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #8]", + "ldr s4, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5386,7 +3927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5399,11 +3940,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5416,10 +3955,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5434,15 +3973,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5473,15 +4003,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #8]", + "ldr s3, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5493,7 +4015,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5506,11 +4028,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5523,10 +4043,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5541,17 +4061,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #28]", "str s16, [x8, #16]", "add w5, w8, #0x44 (68)", "str s17, [x8, #12]", "str w5, [x8, #24]", "str w9, [x8, #20]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5578,23 +4094,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", + "str s2, [x20]", "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5606,7 +4108,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5619,35 +4121,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5660,10 +4137,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -5675,34 +4152,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x23, x0", - "ubfx x24, x23, #1, #1", - "ubfx x25, x23, #0, #1", - "ubfx x23, x23, #2, #1", - "orr w24, w24, w23", - "orr w25, w25, w23", - "rmif x24, #63, #nzCv", - "rmif x25, #62, #nZcv", - "eor w26, w23, #0x1", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x20, x0", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", + "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", + "orr w22, w22, w20", + "rmif x21, #63, #nzCv", + "rmif x22, #62, #nZcv", + "mov w21, #0x1", + "eor w26, w20, #0x1", "cset x20, lo", "csel x20, x20, xzr, ne", "strb w20, [x8, #48]", @@ -5720,7 +4179,13 @@ "movk w22, #0x2, lsl #16", "add w22, w20, w22", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w23, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", @@ -5728,7 +4193,7 @@ ] }, "Block6": { - "ExpectedInstructionCount": 1134, + "ExpectedInstructionCount": 924, "x86Insts": [ "push ebp", "push edi", @@ -5782,7 +4247,6 @@ "ldr w7, [x8, #36]", "ldr w4, [x8, #28]", "ldr w6, [x8, #24]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5811,17 +4275,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #4]", + "ldr s3, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5833,7 +4287,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5846,11 +4300,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5863,10 +4315,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5881,13 +4333,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w9, [x8, #40]", "ldr w11, [x8, #44]", "ldr w10, [x8, #48]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "ldr s3, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5899,7 +4348,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5912,18 +4361,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5935,7 +4376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5948,11 +4389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5967,8 +4406,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5980,18 +4419,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6022,15 +4452,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "ldr s3, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6042,7 +4464,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6055,18 +4477,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w20, #0x8", + "ldr s4, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6078,7 +4493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6091,11 +4506,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6110,8 +4523,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6123,13 +4536,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6141,7 +4551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6154,18 +4564,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6177,7 +4579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6190,11 +4592,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6209,47 +4639,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6261,18 +4652,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6284,7 +4667,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6297,18 +4680,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6320,7 +4695,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6333,11 +4708,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6350,10 +4723,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6365,13 +4738,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6383,7 +4753,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6396,18 +4766,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6419,7 +4781,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6432,11 +4794,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6449,10 +4809,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6464,18 +4824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6488,10 +4839,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6503,18 +4854,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6526,7 +4869,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6539,23 +4882,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6568,8 +4897,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -6583,13 +4912,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6601,7 +4927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6614,23 +4940,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6643,10 +4955,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6658,18 +4970,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6682,10 +4985,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6697,18 +5000,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6720,7 +5015,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6733,23 +5028,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6762,10 +5043,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6777,18 +5058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6801,10 +5073,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6816,44 +5088,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "movi v6.2d, #0x0", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6866,10 +5105,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6881,34 +5120,50 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x23, x20, #1, #1", - "ubfx x24, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w23, w23, w20", - "orr w24, w24, w20", - "rmif x23, #63, #nzCv", - "rmif x24, #62, #nZcv", - "eor w26, w20, #0x1", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "rmif x22, #63, #nzCv", + "rmif x23, #62, #nZcv", + "mov w22, #0x1", + "eor w26, w21, #0x1", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x4 (4)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "str q5, [x0, #1040]", + "add w23, w21, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q4, [x0, #1040]", + "add w23, w21, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add w23, w21, #0x3 (3)", "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w23, w21, #0x7 (7)", + "and w23, w23, #0x7", + "sub w20, w20, w21", + "ldrb w21, [x28, #1298]", + "mov w24, #0xf0f", + "lsr w20, w24, w20", + "orr w20, w21, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w23", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block7": { - "ExpectedInstructionCount": 1044, + "ExpectedInstructionCount": 851, "x86Insts": [ "fld dword [ebx + 0x4]", "fld dword [ebx]", @@ -6937,7 +5192,6 @@ "fstp dword [edi]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6966,950 +5220,758 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldr s3, [x7]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x7, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x6]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x6, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr s6, [x6, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x6]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x6, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr s5, [x6, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr s4, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w22, w21, w22", + "bic w20, w20, w22", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7945,7 +6007,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -7975,16 +6036,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block8": { - "ExpectedInstructionCount": 257, + "ExpectedInstructionCount": 254, "x86Insts": [ "fstp st0", "fstp st3", @@ -8014,88 +6076,81 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8124,25 +6179,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8171,25 +6227,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8218,13 +6275,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8254,26 +6312,27 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x893", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0b4", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0b4", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block9": { - "ExpectedInstructionCount": 257, + "ExpectedInstructionCount": 254, "x86Insts": [ "fstp st0", "fstp st3", @@ -8303,88 +6362,81 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8413,25 +6465,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8460,25 +6513,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8507,13 +6561,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8543,20 +6598,21 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x973", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0b4", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0b4", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json index 0310137a8..80af6ce0e 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 34065, + "ExpectedInstructionCount": 25782, "x86Insts": [ "sub esp,0x118", "fld dword [ecx + 0x1084]", @@ -929,7 +929,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x118 (280)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4228]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -958,17 +957,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4104]", + "ldr s3, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -980,7 +969,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -993,11 +982,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1010,10 +997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1028,11 +1015,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1060,12 +1042,6 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1094,15 +1070,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4108]", + "ldr s3, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1114,7 +1082,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1127,11 +1095,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1144,10 +1110,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1162,11 +1128,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1193,13 +1155,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1228,15 +1184,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4112]", + "ldr s3, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1248,7 +1196,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1261,11 +1209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1278,10 +1224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1296,11 +1242,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1327,13 +1269,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1362,15 +1298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4116]", + "ldr s3, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1382,7 +1310,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1395,11 +1323,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1412,10 +1338,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1430,11 +1356,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1461,13 +1383,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4212]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1496,15 +1412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4120]", + "ldr s3, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,7 +1424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1529,11 +1437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1546,10 +1452,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1564,11 +1470,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1595,13 +1497,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1630,15 +1526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4124]", + "ldr s3, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1650,7 +1538,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1663,11 +1551,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1680,10 +1566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1698,11 +1584,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1729,13 +1611,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1764,15 +1640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4128]", + "ldr s3, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1784,7 +1652,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1797,11 +1665,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1814,10 +1680,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1832,11 +1698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1863,13 +1725,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1898,15 +1754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4132]", + "ldr s3, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1918,7 +1766,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1931,11 +1779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1948,10 +1794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1966,11 +1812,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1997,13 +1839,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2032,15 +1868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4136]", + "ldr s3, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2052,7 +1880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2065,11 +1893,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2082,10 +1908,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2100,11 +1926,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2131,13 +1953,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2166,15 +1982,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4140]", + "ldr s3, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2186,7 +1994,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2199,11 +2007,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2216,10 +2022,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2234,11 +2040,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2265,13 +2067,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2300,15 +2096,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4144]", + "ldr s3, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2320,7 +2108,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2333,11 +2121,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2350,10 +2136,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2368,11 +2154,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2399,13 +2181,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2434,15 +2210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4148]", + "ldr s3, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2454,7 +2222,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2467,11 +2235,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2484,10 +2250,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2502,11 +2268,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2533,13 +2295,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2568,15 +2324,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4152]", + "ldr s3, [x5, #4152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2588,7 +2336,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2601,11 +2349,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2618,10 +2364,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2636,11 +2382,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2667,13 +2409,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2702,15 +2438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4156]", + "ldr s3, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2722,7 +2450,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2735,11 +2463,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2752,10 +2478,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2770,11 +2496,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2801,13 +2523,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2836,15 +2552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4160]", + "ldr s3, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2856,7 +2564,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2869,11 +2577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2886,10 +2592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2904,11 +2610,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2935,13 +2637,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2970,15 +2666,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4164]", + "ldr s3, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2990,7 +2678,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3003,11 +2691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3020,10 +2706,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3038,11 +2724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3069,13 +2751,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3104,28 +2780,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3137,7 +2792,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3150,35 +2805,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3191,10 +2820,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3206,31 +2835,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mov w20, #0x0", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3243,8 +2853,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3256,15 +2866,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3276,7 +2880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3289,30 +2893,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3324,7 +2908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3337,35 +2921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3378,10 +2936,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3393,31 +2951,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3430,8 +2968,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3443,15 +2981,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3463,7 +2995,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3476,30 +3008,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3511,7 +3023,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3524,35 +3036,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3565,10 +3051,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3580,31 +3066,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3617,8 +3083,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3630,15 +3096,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3650,7 +3110,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3663,18 +3123,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3686,7 +3138,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3699,11 +3151,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3716,10 +3166,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3731,14 +3181,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3751,8 +3197,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3764,15 +3210,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3784,7 +3224,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3797,18 +3237,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3820,7 +3252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3833,11 +3265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3850,10 +3280,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3865,14 +3295,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3885,8 +3311,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3898,15 +3324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3918,7 +3338,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3931,18 +3351,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3954,7 +3366,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3967,11 +3379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3984,10 +3394,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3999,14 +3409,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4019,8 +3425,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4032,15 +3438,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4052,7 +3452,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4065,18 +3465,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4088,7 +3480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4101,11 +3493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4118,10 +3508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4133,14 +3523,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4153,8 +3539,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4166,15 +3552,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4186,7 +3566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4199,18 +3579,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4222,7 +3594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4235,11 +3607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4252,10 +3622,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4267,14 +3637,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4287,8 +3653,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4300,32 +3666,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4356,17 +3699,420 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0xc1d0", + "mov w21, #0xc1d0", + "movk w21, #0xb3, lsl #16", + "ldr s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w22, #0xc1d4", + "movk w22, #0xb3, lsl #16", + "ldr s3, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w23, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x23]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w23, #0xc1d8", + "movk w23, #0xb3, lsl #16", + "ldr s3, [x23]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w24, w8, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w24, #0xc1dc", "movk w24, #0xb3, lsl #16", - "ldr s2, [x24]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4378,7 +4124,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4391,23 +4137,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4420,10 +4152,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4438,28 +4170,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w25, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4486,500 +4197,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0xc1d4", - "movk w25, #0xb3, lsl #16", - "ldr s2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0xc1d8", - "movk w12, #0xb3, lsl #16", - "ldr s2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0xc1dc", - "movk w13, #0xb3, lsl #16", - "ldr s2, [x13]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x25]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5008,15 +4226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5028,7 +4238,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5041,11 +4251,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5058,10 +4266,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5076,12 +4284,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0xc1e0", - "movk w14, #0xb3, lsl #16", - "ldr s2, [x14]", + "mov w25, #0xc1e0", + "movk w25, #0xb3, lsl #16", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5093,7 +4298,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5106,11 +4311,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5123,10 +4326,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5141,11 +4344,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w12, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5172,13 +4371,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x12]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5207,15 +4400,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5227,7 +4412,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5240,11 +4425,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5257,10 +4440,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5275,12 +4458,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w15, #0xc1e4", - "movk w15, #0xb3, lsl #16", - "ldr s2, [x15]", + "mov w12, #0xc1e4", + "movk w12, #0xb3, lsl #16", + "ldr s3, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5292,7 +4472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5305,11 +4485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5322,10 +4500,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5340,11 +4518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w13, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5371,13 +4545,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x13]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5406,15 +4574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5426,7 +4586,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5439,11 +4599,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5456,10 +4614,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5474,12 +4632,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w16, #0xc1e8", - "movk w16, #0xb3, lsl #16", - "ldr s2, [x16]", + "mov w13, #0xc1e8", + "movk w13, #0xb3, lsl #16", + "ldr s3, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5491,7 +4646,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5504,11 +4659,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5521,10 +4674,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5539,11 +4692,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w14, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5570,13 +4719,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x14]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5605,15 +4748,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5625,7 +4760,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5638,11 +4773,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5655,10 +4788,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5673,12 +4806,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w17, #0xc1ec", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "mov w14, #0xc1ec", + "movk w14, #0xb3, lsl #16", + "ldr s3, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5690,7 +4820,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5703,11 +4833,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5720,10 +4848,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5738,11 +4866,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5769,13 +4893,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x15]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5804,27 +4922,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5836,7 +4934,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5849,1028 +4947,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x4 (4)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x5 (5)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f0", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x6 (6)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x5 (5)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f4", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6887,7 +4966,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6898,20 +4977,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f8", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6923,7 +4992,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x8]", + "ldr s4, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6936,35 +5033,326 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w15, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x15]", + "ldr s6, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "add w15, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x15]", + "ldr s8, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w15, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x15]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6981,6 +5369,66 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w15, #0xc1f0", + "movk w15, #0xb3, lsl #16", + "ldr s3, [x15]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6995,28 +5443,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7043,13 +5471,246 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x15]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w15, #0xc1f4", + "movk w15, #0xb3, lsl #16", + "ldr s4, [x15]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w15, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x15]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w15, #0xc1f8", + "movk w15, #0xb3, lsl #16", + "ldr s5, [x15]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w15, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x15]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7078,15 +5739,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s6, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7098,7 +5751,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7111,11 +5764,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7128,10 +5779,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7146,12 +5797,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1fc", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "mov w15, #0xc1fc", + "movk w15, #0xb3, lsl #16", + "ldr s6, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7163,7 +5811,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7176,35 +5824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7217,10 +5839,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7235,28 +5857,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7283,13 +5885,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7318,27 +5914,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldr s7, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7350,7 +5926,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7363,35 +5939,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7404,10 +5954,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7419,31 +5969,441 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7470,49 +6430,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7541,8 +6459,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s7, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7555,11 +6499,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -7573,11 +6517,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7604,49 +6574,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7675,8 +6603,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s7, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7689,11 +6643,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -7707,11 +6661,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7738,49 +6718,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7809,8 +6747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s7, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7822,13 +6759,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7838,14 +6772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7860,47 +6789,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7915,20 +6805,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x4 (4)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7941,8 +6817,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -7959,11 +6835,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7990,537 +6862,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x3 (3)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8549,27 +6891,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8581,7 +6903,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8594,35 +6916,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8635,11 +6931,245 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x16]", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w16, #0xc200", + "movk w16, #0xb3, lsl #16", + "ldr s6, [x16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -8653,28 +7183,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8701,61 +7211,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8784,43 +7240,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8835,59 +7254,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8902,17 +7270,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc200", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w16, #0xc204", + "movk w16, #0xb3, lsl #16", + "ldr s7, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8924,7 +7284,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8937,35 +7297,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x3 (3)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8978,10 +7312,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8996,28 +7330,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9044,217 +7358,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc204", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9283,27 +7387,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9315,7 +7399,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9328,11 +7412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9345,11 +7427,211 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -9363,11 +7645,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9394,49 +7702,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9465,8 +7731,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9478,76 +7743,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9560,11 +7756,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9579,8 +7773,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9595,15 +7789,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9616,10 +7801,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9634,11 +7819,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9665,186 +7846,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9873,27 +7875,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9905,7 +7887,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9918,11 +7900,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9935,11 +7915,211 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -9953,11 +8133,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9984,49 +8190,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10055,8 +8219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10068,76 +8231,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10150,11 +8244,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10169,8 +8261,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10185,15 +8277,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10206,10 +8289,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10224,11 +8307,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10255,186 +8334,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10463,27 +8363,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10495,7 +8375,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10508,11 +8388,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10525,11 +8403,211 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -10543,11 +8621,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10574,49 +8678,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10645,8 +8707,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10658,76 +8719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10740,11 +8732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10759,8 +8749,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10775,15 +8765,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10796,10 +8777,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10814,11 +8795,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10845,186 +8822,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11053,27 +8851,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11085,7 +8863,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11098,11 +8876,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11115,10 +8891,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11130,14 +8906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11150,8 +8921,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11163,15 +8934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11183,7 +8948,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11196,11 +8961,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11213,10 +8976,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11231,12 +8994,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc208", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w16, #0xc208", + "movk w16, #0xb3, lsl #16", + "ldr s8, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11248,7 +9008,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11261,35 +9021,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11302,10 +9036,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11320,28 +9054,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11368,13 +9082,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11403,14 +9111,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11439,8 +9225,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11452,13 +9237,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -11468,14 +9250,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11490,107 +9267,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11605,15 +9283,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11626,10 +9295,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11644,11 +9313,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11675,13 +9340,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11710,14 +9369,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11746,8 +9483,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11759,13 +9495,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -11775,14 +9508,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11797,107 +9525,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11912,15 +9541,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11933,10 +9553,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11951,11 +9571,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11982,13 +9598,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12017,14 +9627,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12053,8 +9741,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12066,13 +9753,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -12082,14 +9766,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12104,107 +9783,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12219,15 +9799,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12240,10 +9811,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12258,11 +9829,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12289,13 +9856,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12324,14 +9885,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12360,8 +9999,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12373,13 +10011,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -12389,14 +10024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12411,107 +10041,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12526,15 +10057,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12547,10 +10069,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12565,11 +10087,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12596,13 +10114,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12631,14 +10143,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12667,8 +10257,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12680,13 +10269,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -12696,14 +10282,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12718,107 +10299,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12833,15 +10315,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12854,10 +10327,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12872,11 +10345,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12903,13 +10372,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12938,14 +10401,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12974,8 +10515,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12987,13 +10527,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13003,14 +10540,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13025,107 +10557,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13140,15 +10573,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13161,10 +10585,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13179,11 +10603,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13210,13 +10630,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13245,15 +10659,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13265,7 +10671,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13278,11 +10684,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13295,10 +10699,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13313,11 +10717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13344,13 +10744,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13379,15 +10773,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13399,7 +10785,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13412,11 +10798,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13429,10 +10813,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13447,15 +10831,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13468,10 +10843,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13486,11 +10861,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13517,13 +10888,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13549,47 +10914,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #192]", - "ldrb w20, [x28, #1019]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w16, w8, #0xc0 (192)", + "str s2, [x16]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13618,8 +10947,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13632,8 +10959,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -13650,11 +10977,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0xa0 (160)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13681,13 +11004,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #160]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x16]", "ldr s2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13716,25 +11033,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w30, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w16, #0x8000", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13761,13 +11064,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13796,14 +11093,92 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s9, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w17, w8, #0xdc (220)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x17]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13832,8 +11207,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "ldr s9, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13846,10 +11250,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13864,11 +11268,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w17, w8, #0xfc (252)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13895,218 +11353,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #220]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #252]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14132,47 +11379,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "ldrb w20, [x28, #1019]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w17, w8, #0xc8 (200)", + "str s2, [x17]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14201,8 +11412,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14215,8 +11424,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -14233,11 +11442,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xb8 (184)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14264,13 +11469,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #184]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14299,15 +11498,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14319,7 +11510,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14332,11 +11523,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14349,10 +11538,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14367,11 +11556,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xa8 (168)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14398,13 +11583,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #168]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14433,15 +11612,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14453,7 +11624,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14466,11 +11637,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14483,10 +11652,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14501,10 +11670,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14516,7 +11682,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14529,11 +11695,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14546,10 +11710,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14564,11 +11728,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x98 (152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14595,13 +11755,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #152]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14630,24 +11784,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14674,13 +11814,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14709,15 +11843,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "ldr s9, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14729,7 +11855,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14742,11 +11868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14759,10 +11883,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14777,11 +11901,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xd4 (212)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14808,13 +11928,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #212]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14843,23 +11957,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "ldr s9, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14871,7 +11972,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14884,11 +11985,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14901,10 +12000,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14919,11 +12018,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x110 (272)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14949,10 +12044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #272]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "mov v9.8b, v0.8b", + "str d9, [x17]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14964,7 +12058,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14977,11 +12071,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14994,10 +12086,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15012,10 +12104,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15027,7 +12116,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15040,11 +12129,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15057,10 +12144,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15075,11 +12162,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15106,13 +12189,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15141,15 +12218,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15161,7 +12230,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15174,11 +12243,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15191,10 +12258,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15209,11 +12276,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xe4 (228)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15240,13 +12303,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #228]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15275,15 +12332,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #272]", + "ldr d9, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15295,7 +12344,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -15308,11 +12357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15325,71 +12372,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -15406,11 +12390,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w17, w8, #0x104 (260)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15437,13 +12475,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #260]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15472,15 +12504,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15492,7 +12516,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15505,11 +12529,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15522,10 +12544,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15540,11 +12562,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xf4 (244)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15571,13 +12589,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #244]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15606,24 +12618,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x10c (268)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15650,84 +12648,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #268]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #144]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w17, w8, #0x90 (144)", + "str s2, [x17]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15753,19 +12677,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w17, w8, #0xb0 (176)", + "str s2, [x17]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v9.16b, v2.16b", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15780,74 +12727,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #176]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15862,11 +12743,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xec (236)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15893,13 +12770,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #236]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15928,15 +12799,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4228]", + "ldr s9, [x5, #4228]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15948,7 +12811,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15961,11 +12824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15978,10 +12839,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15996,12 +12857,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc190", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc190", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16013,7 +12871,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16026,11 +12884,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16043,10 +12899,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16061,11 +12917,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16093,12 +12944,6 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16127,15 +12972,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4224]", + "ldr s9, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16147,7 +12984,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16160,11 +12997,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16177,10 +13012,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16195,12 +13030,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc194", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc194", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16212,7 +13044,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16225,11 +13057,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16242,10 +13072,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16260,11 +13090,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16291,13 +13117,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16326,15 +13146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4220]", + "ldr s9, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16346,7 +13158,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16359,11 +13171,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16376,10 +13186,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16394,12 +13204,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc198", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc198", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16411,7 +13218,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16424,11 +13231,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16441,10 +13246,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16459,11 +13264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16490,13 +13291,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16525,15 +13320,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4216]", + "ldr s9, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16545,7 +13332,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16558,11 +13345,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16575,10 +13360,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16593,12 +13378,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc19c", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc19c", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16610,7 +13392,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16623,11 +13405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16640,10 +13420,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16658,11 +13438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16689,13 +13465,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16724,15 +13494,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4212]", + "ldr s9, [x5, #4212]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16744,7 +13506,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16757,11 +13519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16774,10 +13534,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16792,12 +13552,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1a0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16809,7 +13566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16822,11 +13579,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16839,10 +13594,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16857,11 +13612,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16888,13 +13639,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16923,15 +13668,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4208]", + "ldr s9, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16943,7 +13680,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16956,11 +13693,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16973,10 +13708,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16991,12 +13726,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1a4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17008,7 +13740,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17021,11 +13753,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17038,10 +13768,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17056,11 +13786,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17087,13 +13813,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17122,15 +13842,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4204]", + "ldr s9, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17142,7 +13854,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17155,11 +13867,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17172,10 +13882,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17190,12 +13900,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1a8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17207,7 +13914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17220,11 +13927,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17237,10 +13942,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17255,11 +13960,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17286,13 +13987,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17321,15 +14016,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4200]", + "ldr s9, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17341,7 +14028,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17354,11 +14041,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17371,10 +14056,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17389,12 +14074,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1ac", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1ac", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17406,7 +14088,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17419,11 +14101,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17436,10 +14116,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17454,11 +14134,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17485,13 +14161,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17520,15 +14190,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4196]", + "ldr s9, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17540,7 +14202,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17553,11 +14215,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17570,10 +14230,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17588,12 +14248,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17605,7 +14262,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17618,11 +14275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17635,10 +14290,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17653,11 +14308,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17684,13 +14335,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17719,15 +14364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4192]", + "ldr s9, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17739,7 +14376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17752,11 +14389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17769,10 +14404,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17787,12 +14422,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17804,7 +14436,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17817,11 +14449,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17834,10 +14464,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17852,11 +14482,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17883,13 +14509,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17918,15 +14538,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4188]", + "ldr s9, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17938,7 +14550,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17951,11 +14563,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17968,10 +14578,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17986,12 +14596,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18003,7 +14610,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18016,11 +14623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18033,10 +14638,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -18051,11 +14656,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18082,13 +14683,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18117,15 +14712,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4184]", + "ldr s9, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18137,7 +14724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18150,11 +14737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18167,10 +14752,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18185,12 +14770,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1bc", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1bc", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18202,7 +14784,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18215,11 +14797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18232,10 +14812,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -18250,11 +14830,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18281,13 +14857,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18316,15 +14886,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4180]", + "ldr s9, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18336,7 +14898,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18349,11 +14911,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18366,10 +14926,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18384,12 +14944,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18401,7 +14958,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18414,11 +14971,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18431,10 +14986,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -18449,11 +15004,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18480,13 +15031,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18515,15 +15060,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4176]", + "ldr s9, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18535,7 +15072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18548,11 +15085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18565,10 +15100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18583,12 +15118,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18600,7 +15132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18613,11 +15145,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18630,10 +15160,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -18648,11 +15178,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18679,13 +15205,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18714,15 +15234,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4172]", + "ldr s9, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18734,7 +15246,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18747,11 +15259,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18764,10 +15274,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18782,12 +15292,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18799,7 +15306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18812,11 +15319,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18829,10 +15334,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -18847,11 +15352,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18878,13 +15379,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18913,15 +15408,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4168]", + "ldr s9, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18933,7 +15420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18946,11 +15433,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18963,10 +15448,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18981,12 +15466,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1cc", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1cc", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18998,7 +15480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19011,11 +15493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19028,10 +15508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -19046,11 +15526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19077,13 +15553,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19112,15 +15582,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19132,7 +15594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19145,11 +15607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19162,10 +15622,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19180,11 +15640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19211,13 +15667,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19246,15 +15696,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19266,7 +15708,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19279,11 +15721,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19296,10 +15736,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19314,11 +15754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19345,13 +15781,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19380,15 +15810,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19400,7 +15822,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19413,11 +15835,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19430,10 +15850,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19448,11 +15868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19479,13 +15895,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19514,15 +15924,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19534,7 +15936,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19547,11 +15949,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19564,10 +15964,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19582,11 +15982,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19613,13 +16009,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19648,15 +16038,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19668,7 +16050,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19681,11 +16063,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19698,10 +16078,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19716,11 +16096,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19747,13 +16123,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19782,15 +16152,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19802,7 +16164,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19815,11 +16177,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19832,10 +16192,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19850,11 +16210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19881,13 +16237,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19916,15 +16266,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19936,7 +16278,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19949,11 +16291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19966,10 +16306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19984,11 +16324,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20015,13 +16351,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20050,15 +16380,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20070,7 +16392,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20083,11 +16405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20100,10 +16420,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20118,11 +16438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20149,13 +16465,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x17]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20184,15 +16494,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "ldr s9, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20204,7 +16506,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20217,11 +16519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20234,10 +16534,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20252,10 +16552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20267,7 +16564,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20280,11 +16577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20297,10 +16592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20315,11 +16610,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20346,13 +16637,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20381,15 +16666,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "ldr s9, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20401,7 +16678,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20414,11 +16691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20431,10 +16706,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20449,10 +16724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s9, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20464,7 +16736,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20477,11 +16749,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20494,10 +16764,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20512,11 +16782,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20543,13 +16809,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20578,15 +16838,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20598,7 +16850,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20611,11 +16863,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20628,10 +16878,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20646,10 +16896,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", + "ldr s9, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20661,7 +16908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20674,11 +16921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20691,10 +16936,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20709,11 +16954,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20740,13 +16981,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20775,15 +17010,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20795,7 +17022,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20808,11 +17035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20825,10 +17050,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20843,10 +17068,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s9, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20858,7 +17080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20871,11 +17093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20888,10 +17108,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20906,11 +17126,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20937,13 +17153,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20972,15 +17182,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20992,7 +17194,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21005,11 +17207,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21022,10 +17222,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21040,10 +17240,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s9, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21055,7 +17252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21068,11 +17265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21085,10 +17280,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21103,11 +17298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21134,13 +17325,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21169,15 +17354,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21189,7 +17366,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21202,11 +17379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21219,10 +17394,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21237,10 +17412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x15]", + "ldr s9, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21252,7 +17424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21265,11 +17437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21282,10 +17452,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21300,11 +17470,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21331,13 +17497,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21366,15 +17526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21386,7 +17538,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21399,11 +17551,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21416,10 +17566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21434,10 +17584,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x16]", + "ldr s9, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21449,7 +17596,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21462,11 +17609,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21479,10 +17624,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21497,11 +17642,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21528,13 +17669,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21563,15 +17698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s9, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21583,7 +17710,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21596,11 +17723,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21613,10 +17738,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21631,10 +17756,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x17]", + "ldr s9, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21646,7 +17768,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21659,11 +17781,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21676,10 +17796,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21694,11 +17814,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21725,13 +17841,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21760,15 +17870,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21780,7 +17882,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21793,11 +17895,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21810,10 +17910,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21828,11 +17928,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21860,12 +17955,6 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21894,15 +17983,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21914,7 +17995,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21927,11 +18008,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21944,10 +18023,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21962,11 +18041,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21993,13 +18068,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22028,15 +18097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s9, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22048,7 +18109,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22061,11 +18122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22078,10 +18137,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22096,11 +18155,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22127,13 +18182,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22162,15 +18211,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22182,7 +18223,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22195,11 +18236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22212,10 +18251,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22230,11 +18269,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22261,13 +18296,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22296,15 +18325,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "ldr s9, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22316,7 +18337,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22329,11 +18350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22346,10 +18365,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22364,15 +18383,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22385,10 +18395,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -22403,11 +18413,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22434,13 +18440,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22469,15 +18469,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22489,7 +18481,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22502,11 +18494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22519,10 +18509,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22537,15 +18527,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22558,10 +18539,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -22576,11 +18557,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22607,13 +18584,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22642,15 +18613,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "ldr s9, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22662,7 +18625,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22675,11 +18638,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22692,10 +18653,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22710,15 +18671,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22731,10 +18683,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -22749,11 +18701,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22780,13 +18728,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22815,15 +18757,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s9, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22835,7 +18769,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22848,11 +18782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22865,10 +18797,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22883,10 +18815,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x29]", + "ldr s9, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22898,7 +18827,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22911,11 +18840,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22928,10 +18855,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -22946,11 +18873,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22977,13 +18900,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23012,15 +18929,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldr s9, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23032,7 +18941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23045,11 +18954,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23062,10 +18969,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23080,11 +18987,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23111,13 +19014,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23146,15 +19043,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23166,7 +19055,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23179,11 +19068,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23196,10 +19083,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23214,11 +19101,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23245,13 +19128,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23280,15 +19157,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldr s9, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23300,7 +19169,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23313,11 +19182,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23330,10 +19197,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23348,11 +19215,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23379,13 +19242,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23414,15 +19271,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23434,7 +19283,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23447,11 +19296,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23464,10 +19311,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23482,11 +19329,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23513,13 +19356,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23548,15 +19385,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23568,7 +19397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23581,11 +19410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23598,10 +19425,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23616,15 +19443,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23655,28 +19473,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23703,13 +19501,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23738,15 +19530,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23758,7 +19542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23771,11 +19555,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23788,10 +19570,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23806,15 +19588,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23827,8 +19600,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -23845,28 +19618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23893,13 +19646,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23928,15 +19675,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s3, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23948,7 +19687,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23961,11 +19700,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23978,10 +19715,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23996,15 +19733,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24017,8 +19745,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -24035,28 +19763,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24083,13 +19791,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24118,15 +19820,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24138,7 +19832,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24151,11 +19845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24168,10 +19860,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24186,10 +19878,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x29]", + "ldr s3, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24201,7 +19890,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24214,11 +19903,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24231,10 +19918,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -24249,11 +19936,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24280,13 +19963,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24315,27 +19992,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24347,7 +20004,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24360,455 +20017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24825,7 +20036,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -24836,18 +20047,153 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24864,6 +20210,36 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -24878,11 +20254,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24909,13 +20282,123 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "ldr s2, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24944,27 +20427,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24976,7 +20439,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24989,455 +20452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25454,7 +20471,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25465,18 +20482,153 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25493,6 +20645,36 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25507,11 +20689,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25538,13 +20717,123 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25573,27 +20862,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25605,7 +20874,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25618,455 +20887,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26083,7 +20906,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26094,18 +20917,153 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26122,6 +21080,36 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -26136,11 +21124,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26167,13 +21152,123 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "ldr s2, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26202,27 +21297,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s3, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26234,7 +21309,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26247,87 +21322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26342,119 +21339,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26466,14 +21352,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26486,8 +21369,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26499,32 +21382,123 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26555,32 +21529,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26593,8 +21542,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -26611,28 +21560,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26659,13 +21588,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26694,20 +21617,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26720,10 +21629,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26738,20 +21647,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26764,10 +21659,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -26782,16 +21677,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26818,13 +21704,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26853,27 +21733,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26885,7 +21745,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26898,87 +21758,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26993,6 +21775,37 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27004,20 +21817,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27048,20 +21849,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27074,10 +21861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -27092,11 +21879,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27123,13 +21906,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27158,27 +21935,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s3, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27190,7 +21947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27203,87 +21960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27298,6 +21977,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27309,20 +22020,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27353,20 +22052,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27379,10 +22064,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -27397,11 +22082,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27428,13 +22109,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27463,27 +22138,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27495,7 +22150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27508,87 +22163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27603,6 +22180,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27614,20 +22223,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27658,20 +22255,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27684,10 +22267,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -27702,11 +22285,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27733,13 +22312,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27768,27 +22341,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s3, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27800,7 +22353,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27813,87 +22366,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27908,6 +22383,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27919,20 +22426,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27963,20 +22458,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27989,10 +22470,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -28007,11 +22488,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28038,13 +22515,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28073,27 +22544,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldr s3, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28105,7 +22556,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28118,87 +22569,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28213,6 +22586,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28224,20 +22629,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28268,20 +22661,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28294,10 +22673,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -28312,11 +22691,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28343,13 +22718,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28378,27 +22747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldr s3, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28410,7 +22759,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28423,87 +22772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28518,6 +22789,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28529,20 +22832,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28573,20 +22864,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28599,10 +22876,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -28617,11 +22894,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28648,13 +22921,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28683,27 +22950,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28715,7 +22962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28728,87 +22975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28823,6 +22992,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28834,20 +23035,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28878,20 +23067,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28904,10 +23079,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -28922,11 +23097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28953,13 +23124,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28988,27 +23153,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29020,7 +23165,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29033,87 +23178,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29128,6 +23195,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29139,20 +23238,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29183,20 +23270,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29209,8 +23282,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -29227,16 +23300,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29263,13 +23327,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29298,27 +23356,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldr s3, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29330,7 +23368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29343,35 +23381,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29384,10 +23396,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29399,31 +23411,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29436,8 +23428,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29449,15 +23441,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29469,7 +23455,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29482,30 +23468,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29517,7 +23483,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29530,35 +23496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29571,10 +23511,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29586,31 +23526,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xbc (188)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29623,8 +23543,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29636,15 +23556,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #188]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29656,7 +23570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29669,18 +23583,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29692,7 +23598,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29705,11 +23611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29722,10 +23626,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29737,13 +23641,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29755,7 +23656,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29768,35 +23669,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29809,10 +23684,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29824,31 +23699,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xa4 (164)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29861,8 +23716,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29874,130 +23729,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #164]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30012,6 +23745,95 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xb4 (180)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30023,15 +23845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #180]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30043,7 +23859,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30056,23 +23872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30085,10 +23887,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30100,14 +23902,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xac (172)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30122,59 +23947,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #172]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30186,13 +23960,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30204,7 +23975,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30217,11 +23988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30234,10 +24003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30249,14 +24018,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30269,8 +24034,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30282,15 +24047,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30302,7 +24061,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30315,18 +24074,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30338,7 +24089,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30351,11 +24102,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30368,10 +24117,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30383,14 +24132,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x94 (148)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30403,8 +24148,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30416,15 +24161,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #148]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30436,7 +24175,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30449,27 +24188,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d8, x20", + "mov v8.d[1], x16", + "eor v6.16b, v6.16b, v8.16b", + "add w21, w8, #0x110 (272)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30482,8 +24207,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30495,15 +24220,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #272]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #272]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30515,7 +24234,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30528,18 +24247,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30551,7 +24262,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30564,35 +24275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30605,10 +24290,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30620,31 +24305,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30657,8 +24322,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30670,15 +24335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30690,7 +24349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30703,18 +24362,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30726,7 +24377,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30739,11 +24390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30756,10 +24405,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30771,18 +24420,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30795,10 +24435,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30810,14 +24450,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x9c (156)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30830,8 +24466,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30843,15 +24479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #156]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30863,7 +24493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30876,27 +24506,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v6.16b, v6.16b, v9.16b", + "add w21, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30909,8 +24525,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30922,15 +24538,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30942,7 +24552,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30955,18 +24565,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30978,7 +24580,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30991,11 +24593,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31008,8 +24608,187 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xd8 (216)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v6.16b, v6.16b, v9.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -31023,300 +24802,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #216]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31329,8 +24819,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31342,15 +24832,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31362,7 +24846,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31375,35 +24859,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31416,10 +24874,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31431,18 +24889,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31454,7 +24904,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31467,23 +24917,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31496,10 +24932,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31511,13 +24947,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31529,7 +24962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31542,11 +24975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31559,10 +24990,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31574,14 +25005,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xe8 (232)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31594,8 +25021,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31607,15 +25034,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #232]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31627,7 +25048,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31640,23 +25061,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31669,10 +25076,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31684,18 +25091,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31707,7 +25106,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31720,23 +25119,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31749,8 +25134,38 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -31764,87 +25179,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe0 (224)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31857,8 +25196,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31870,15 +25209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #224]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31890,7 +25223,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31903,35 +25236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31944,10 +25251,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31959,18 +25266,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31982,7 +25281,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31995,23 +25294,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32024,10 +25309,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32039,13 +25324,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32057,7 +25339,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32070,11 +25352,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32087,10 +25367,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32102,14 +25382,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xf0 (240)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32122,8 +25398,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32135,15 +25411,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #240]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32155,7 +25425,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32168,18 +25438,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32191,7 +25453,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32204,11 +25466,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32223,8 +25513,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32236,73 +25526,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x5, #4100]", "ldr w6, [x5, #4096]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "add w4, w6, w4, lsl #2", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32315,8 +25546,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32328,15 +25559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32348,7 +25573,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32361,35 +25586,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32402,8 +25601,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -32417,31 +25616,568 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xf8 (248)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d7, x20", + "mov v7.d[1], x16", + "eor v5.16b, v5.16b, v7.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x108 (264)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x100 (256)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #144]", + "str s3, [x4]", + "ldr s3, [x8, #148]", + "add w21, w4, #0x40 (64)", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "add w21, w4, #0x80 (128)", + "str s3, [x21]", + "ldr s3, [x8, #156]", + "add w21, w4, #0xc0 (192)", + "str s3, [x21]", + "ldr s3, [x8, #160]", + "add w21, w4, #0x100 (256)", + "str s3, [x21]", + "ldr s3, [x8, #164]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x140 (320)", + "str s3, [x21]", + "ldr s3, [x8, #168]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w4, #0x180 (384)", + "str s3, [x21]", + "ldr s3, [x8, #172]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x1c0 (448)", + "str s3, [x21]", + "ldr s3, [x8, #176]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x200 (512)", + "str s3, [x21]", + "ldr s3, [x8, #180]", + "add w21, w4, #0x240 (576)", + "str s3, [x21]", + "ldr s3, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w4, #0x280 (640)", + "str s3, [x21]", + "ldr s3, [x8, #188]", + "add w21, w4, #0x2c0 (704)", + "str s3, [x21]", + "ldr s3, [x8, #192]", + "add w21, w4, #0x300 (768)", + "str s3, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x340 (832)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #200]", + "add w21, w4, #0x380 (896)", + "str s3, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x3c0 (960)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32467,15 +26203,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #248]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s3, s0", + "str s3, [x21]", + "movi v3.2d, #0x0", + "add w21, w4, #0x400 (1024)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32487,10 +26218,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -32500,166 +26232,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", + "fmov s3, s0", + "str s3, [x21]", + "fmov d3, x20", + "mov v3.d[1], x16", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x440 (1088)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32686,1190 +26264,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #264]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #256]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #192]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #256]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #164]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #320]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #384]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #172]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #448]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #512]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #576]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #640]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #704]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #768]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #832]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33898,16 +26293,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x480 (1152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33934,27 +26323,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #896]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v4.16b, v2.16b", + "add w21, w4, #0x4c0 (1216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33981,229 +26355,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #960]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1024]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1088]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1152]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1216]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34232,24 +26384,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", + "fmov d3, x20", + "mov v3.d[1], x16", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x500 (1280)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34276,13 +26414,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1280]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34311,24 +26443,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", + "fmov d3, x20", + "mov v3.d[1], x16", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x540 (1344)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34355,35 +26473,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1344]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v9.16b, v2.16b", + "add w21, w4, #0x580 (1408)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34410,13 +26505,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1408]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34445,24 +26534,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", + "fmov d3, x20", + "mov v3.d[1], x16", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x5c0 (1472)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34489,35 +26564,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1472]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v8.16b, v2.16b", + "add w21, w4, #0x600 (1536)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34544,35 +26596,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1536]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v7.16b, v2.16b", + "add w21, w4, #0x640 (1600)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34599,35 +26628,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1600]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v6.16b, v2.16b", + "add w21, w4, #0x680 (1664)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34654,23 +26660,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1664]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v5.16b, v2.16b", + "add w20, w4, #0x6c0 (1728)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34697,306 +26691,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #1728]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1792]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w4, #0x700 (1792)", + "str s2, [x20]", "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1856]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w4, #0x740 (1856)", + "str s2, [x20]", "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1920]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w4, #0x780 (1920)", + "str s2, [x20]", "ldr s2, [x8, #272]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1984]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w4, #0x7c0 (1984)", + "str s2, [x20]", "ldr w20, [x5, #4096]", "eor w27, w20, w5", "subs w26, w20, w5", "cfinv", "add w4, w5, #0x800 (2048)", - "strb w21, [x28, #1298]" + "strb wzr, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 22089, + "ExpectedInstructionCount": 16635, "x86Insts": [ "mov eax,dword [ebp + 0x8]", "fld dword [eax + 0x40]", @@ -35631,7 +27348,6 @@ ], "ExpectedArm64ASM": [ "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35660,17 +27376,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "ldr s3, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35682,7 +27388,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35695,23 +27401,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35739,14 +27431,65 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35761,96 +27504,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35865,28 +27520,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "mov w20, #0x0", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35913,13 +27549,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35948,32 +27578,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36001,31 +27605,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36038,8 +27622,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36051,15 +27635,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36071,7 +27649,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36084,35 +27662,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36125,10 +27677,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36143,28 +27695,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36191,13 +27723,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36226,32 +27752,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36279,31 +27779,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36316,8 +27796,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36329,15 +27809,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36349,7 +27823,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36362,35 +27836,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36403,10 +27851,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36421,28 +27869,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36469,13 +27897,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36504,32 +27926,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36557,31 +27953,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36594,8 +27970,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36607,15 +27983,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36627,7 +27997,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36640,35 +28010,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36681,10 +28025,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36699,28 +28043,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36747,13 +28071,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36782,32 +28100,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36835,31 +28127,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36872,8 +28144,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36885,15 +28157,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36905,7 +28171,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36918,35 +28184,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36959,10 +28199,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36977,28 +28217,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37025,13 +28245,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37060,32 +28274,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37113,31 +28301,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37150,8 +28318,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37163,15 +28331,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37183,7 +28345,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37196,35 +28358,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37237,10 +28373,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37255,28 +28391,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37303,13 +28419,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37338,32 +28448,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37391,31 +28475,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37428,8 +28492,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37441,15 +28505,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37461,7 +28519,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37474,35 +28532,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37515,10 +28547,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37533,28 +28565,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37581,13 +28593,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37616,32 +28622,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37669,31 +28649,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37706,8 +28666,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37719,15 +28679,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37739,7 +28693,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37752,35 +28706,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37793,10 +28721,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37811,28 +28739,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37859,13 +28767,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37894,16 +28796,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37929,27 +28822,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v4.8b, v0.8b", + "str d4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37977,208 +28851,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38193,41 +28870,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38239,15 +28881,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38259,7 +28895,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38272,35 +28908,153 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x4 (4)", + "str s3, [x21]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38315,8 +29069,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38328,118 +29082,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38454,8 +29101,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38467,31 +29169,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38504,8 +29186,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38517,15 +29199,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38537,7 +29213,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38550,35 +29226,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38593,8 +29243,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38606,118 +29256,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38732,8 +29275,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38745,31 +29343,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38782,8 +29360,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38795,15 +29373,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38815,7 +29387,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38828,35 +29400,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38871,8 +29417,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38884,118 +29430,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39010,8 +29449,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -39023,31 +29517,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39060,8 +29534,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -39073,20 +29547,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39101,6 +29594,36 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #4]", + "add w21, w4, #0xc (12)", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -39117,16 +29640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39153,158 +29667,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39333,16 +29696,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39368,10 +29722,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "mov v3.8b, v0.8b", + "str d3, [x21]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39383,7 +29736,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -39396,53 +29749,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39457,8 +29767,35 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -39473,16 +29810,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39509,13 +29837,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39544,15 +29866,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39564,7 +29878,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -39577,19 +29891,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39602,8 +29907,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -39615,10 +29920,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39630,7 +29934,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -39643,18 +29947,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39666,7 +29962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -39679,32 +29975,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b70", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mov w21, #0x7b70", + "movk w21, #0xa7, lsl #16", + "ldr d6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39716,7 +29992,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v6.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -39729,23 +30005,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39758,8 +30020,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -39773,30 +30035,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39824,32 +30066,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b68", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w21, #0x7b68", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39861,7 +30083,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -39874,23 +30096,162 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w21, #0x7b60", + "movk w21, #0xa7, lsl #16", + "ldr d8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc0 (192)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39905,10 +30266,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -39918,30 +30277,36 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "ldr d3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -39969,32 +30334,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b60", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40006,7 +30348,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -40019,23 +30392,627 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xd0 (208)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xb8 (184)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc8 (200)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr d3, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40052,7 +31029,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -40066,27 +31043,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40099,8 +31056,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -40117,16 +31074,96 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "ldr d3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40153,1288 +31190,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #192]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #184]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41463,17 +31219,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b58", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "mov w21, #0x7b58", + "movk w21, #0xa7, lsl #16", + "ldr d3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41485,7 +31233,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -41498,11 +31246,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41515,10 +31261,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -41533,11 +31279,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41564,13 +31306,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41599,16 +31335,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41634,10 +31361,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "mov v3.8b, v0.8b", + "str d3, [x22]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41649,7 +31375,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -41662,223 +31388,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #144]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b50", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41893,6 +31406,175 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x22]", + "ldr s4, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w22, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x22]", + "mov w22, #0x7b50", + "movk w22, #0xa7, lsl #16", + "ldr d9, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -41906,30 +31588,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41960,17 +31622,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b48", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", + "mov w22, #0x7b48", + "movk w22, #0xa7, lsl #16", + "ldr d3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41982,7 +31636,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -41995,23 +31649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42026,8 +31666,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -42039,30 +31679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42075,8 +31695,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -42093,17 +31713,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b40", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", + "mov w22, #0x7b40", + "movk w22, #0xa7, lsl #16", + "ldr d4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42115,7 +31727,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v4.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -42128,23 +31740,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42157,10 +31755,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -42172,30 +31770,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42208,8 +31786,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -42226,16 +31804,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0xb4 (180)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42262,13 +31831,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #180]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr d2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42297,15 +31860,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", + "ldr d5, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42317,7 +31872,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v5.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -42330,23 +31885,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42361,8 +31902,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -42377,22 +31918,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", + "ldr d10, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42404,7 +31931,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v10.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -42417,11 +31944,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42434,10 +31959,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -42452,10 +31977,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", + "ldr d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42467,7 +31989,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v10.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -42480,11 +32002,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42497,10 +32017,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -42515,11 +32035,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42546,13 +32062,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr d2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42581,173 +32091,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42764,86 +32107,6 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -42858,15 +32121,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr d10, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42879,10 +32161,159 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -42897,16 +32328,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0xa8 (168)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42933,13 +32355,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #168]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr d2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42968,316 +32384,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43292,8 +32398,66 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -43308,16 +32472,183 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr d5, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x90 (144)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43344,13 +32675,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #144]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43379,16 +32704,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43414,15 +32730,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v5.8b, v0.8b", + "str d5, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43435,8 +32744,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -43453,11 +32762,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43484,13 +32789,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43519,16 +32818,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x98 (152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43554,10 +32844,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #152]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43569,7 +32858,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -43582,19 +32871,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43609,42 +32916,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #160]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -43659,16 +32932,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43695,13 +32959,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43730,16 +32988,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43765,10 +33014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43780,7 +33028,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -43793,19 +33041,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43818,8 +33057,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -43831,15 +33070,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #136]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43851,7 +33084,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -43864,19 +33097,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43889,8 +33113,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -43902,15 +33126,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43922,7 +33140,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -43935,19 +33153,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43962,47 +33198,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -44017,10 +33214,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", + "ldr d5, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44032,7 +33226,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v5.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -44045,11 +33239,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44062,10 +33254,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -44080,10 +33272,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", + "ldr d5, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44095,7 +33284,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v5.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -44108,23 +33297,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44137,10 +33312,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -44152,18 +33327,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44176,10 +33342,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -44194,15 +33360,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", + "ldr d5, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44214,7 +33372,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v5.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -44227,23 +33385,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x7 (7)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44256,10 +33400,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -44271,18 +33415,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44295,10 +33430,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -44313,16 +33448,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0xb0 (176)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44349,13 +33475,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #176]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr d2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44384,14 +33504,296 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr d5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", "ldr d2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44420,8 +33822,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44434,10 +33834,244 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -44452,256 +34086,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0xa0 (160)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44728,13 +34113,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr d2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44763,20 +34142,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44789,8 +34154,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -44804,13 +34169,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44822,7 +34184,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -44835,11 +34197,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44852,10 +34212,275 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x22]", + "ldr d5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -44870,10 +34495,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", + "strb wzr, [x28, #1017]", + "ldr d5, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44885,7 +34508,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v5.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -44898,62 +34521,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -44968,8 +34538,66 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -44984,56 +34612,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -45046,47 +34624,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -45103,16 +34642,68 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "mov w22, #0x7bd8", + "movk w22, #0xa7, lsl #16", + "ldr d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -45139,890 +34730,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #160]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x7 (7)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7bd8", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46051,15 +34759,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", + "ldr d5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46071,7 +34771,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v5.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -46084,11 +34784,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46101,10 +34799,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -46119,11 +34817,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w22, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46150,13 +34844,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46185,15 +34873,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s5, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46205,7 +34885,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -46218,18 +34898,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46241,7 +34913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -46254,18 +34926,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46277,7 +34941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -46290,23 +34954,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46319,10 +34969,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -46334,18 +34984,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46358,8 +34999,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -46373,30 +35014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46409,10 +35029,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -46424,18 +35044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46448,10 +35059,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -46463,35 +35074,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46504,10 +35089,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -46519,18 +35104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46543,10 +35119,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -46558,19 +35134,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w22, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46583,8 +35150,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -46596,15 +35163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "fmov s7, s0", + "str s7, [x22]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46616,7 +35177,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -46629,19 +35190,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w22, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46654,8 +35206,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -46667,15 +35219,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v8.8b, v0.8b", + "str d8, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46688,10 +35233,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -46703,18 +35248,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46727,10 +35263,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -46742,13 +35278,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr d8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46760,7 +35293,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v8.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -46773,11 +35306,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46790,10 +35321,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -46805,14 +35336,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x98 (152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46825,8 +35352,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -46838,15 +35365,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #152]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", + "fmov s7, s0", + "str s7, [x21]", + "ldr d7, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46858,7 +35379,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -46871,23 +35392,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -46900,195 +35407,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x7 (7)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -47100,18 +35422,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47124,10 +35437,130 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -47139,19 +35572,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47164,8 +35588,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -47177,15 +35601,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", + "fmov s7, s0", + "str s7, [x21]", + "ldr d7, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47197,7 +35615,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -47210,23 +35628,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47239,10 +35643,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -47254,35 +35658,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47295,8 +35674,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -47313,20 +35692,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47339,10 +35704,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -47354,23 +35719,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47383,8 +35734,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -47401,20 +35752,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47429,8 +35766,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -47442,23 +35779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47489,16 +35812,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47525,13 +35839,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47560,15 +35868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", + "ldr s3, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47580,7 +35880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -47593,35 +35893,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47649,14 +35923,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47669,8 +35939,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -47682,15 +35952,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47702,7 +35966,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -47715,18 +35979,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47738,7 +35994,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -47751,35 +36007,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47792,10 +36022,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -47807,15 +36037,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b38", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mov w21, #0x7b38", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47827,7 +36054,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -47840,11 +36067,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47857,10 +36082,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -47872,14 +36097,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47892,8 +36113,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -47905,15 +36126,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47925,7 +36140,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -47938,18 +36153,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -47961,7 +36168,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -47974,35 +36181,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48015,10 +36196,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -48030,14 +36211,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48050,8 +36227,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -48063,20 +36240,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48089,10 +36254,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -48104,19 +36269,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48129,8 +36285,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -48142,15 +36298,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48162,7 +36312,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48175,18 +36325,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #208]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48198,7 +36340,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48211,35 +36353,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48252,10 +36368,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -48267,14 +36383,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48287,8 +36399,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -48300,15 +36412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48320,7 +36426,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48333,19 +36439,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48358,8 +36455,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -48371,10 +36468,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #208]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48386,7 +36482,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48399,19 +36495,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x98 (152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48424,8 +36511,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -48437,15 +36524,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #152]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48458,10 +36538,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -48473,20 +36553,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7bd0", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7bd0", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48498,7 +36570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -48511,11 +36583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48528,10 +36598,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -48543,14 +36613,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48563,8 +36629,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -48576,15 +36642,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48596,7 +36656,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48609,18 +36669,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48632,7 +36684,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48645,19 +36697,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48670,8 +36713,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -48683,15 +36726,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48704,10 +36740,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -48719,14 +36755,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48739,8 +36771,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -48752,15 +36784,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48772,7 +36798,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -48785,11 +36811,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48802,10 +36826,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -48817,14 +36841,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48837,8 +36857,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -48850,15 +36870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48870,7 +36884,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48883,19 +36897,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xa8 (168)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48908,8 +36913,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -48921,10 +36926,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #168]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48936,7 +36940,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -48949,19 +36953,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xb8 (184)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48974,8 +36969,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -48987,15 +36982,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #184]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49008,10 +36996,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -49023,19 +37011,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49048,8 +37027,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -49061,15 +37040,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49081,7 +37054,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49094,19 +37067,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49119,8 +37083,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49132,10 +37096,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #136]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49147,7 +37110,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49160,19 +37123,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xa0 (160)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49185,8 +37139,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49198,15 +37152,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #160]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49219,10 +37166,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -49234,20 +37181,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b30", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b30", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49259,7 +37198,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -49272,11 +37211,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49289,10 +37226,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -49304,14 +37241,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49324,8 +37257,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -49337,15 +37270,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49357,7 +37284,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49370,18 +37297,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49393,7 +37312,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49406,19 +37325,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49431,8 +37341,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49444,15 +37354,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49465,10 +37368,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -49480,14 +37383,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49500,8 +37399,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -49513,15 +37412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49533,7 +37426,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -49546,11 +37439,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49563,10 +37454,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -49578,14 +37469,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49598,8 +37485,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -49611,15 +37498,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49631,7 +37512,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49644,19 +37525,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x90 (144)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49669,8 +37541,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49682,10 +37554,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #144]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49697,7 +37568,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49710,19 +37581,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xc8 (200)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49735,8 +37597,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49748,15 +37610,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #200]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49769,10 +37624,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -49784,19 +37639,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49809,8 +37655,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -49822,15 +37668,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49842,7 +37682,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49855,19 +37695,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49880,8 +37711,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49893,10 +37724,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49908,7 +37738,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -49921,19 +37751,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49946,8 +37767,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -49959,15 +37780,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49980,10 +37794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -49995,20 +37809,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b28", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b28", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50020,7 +37826,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50033,11 +37839,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50050,10 +37854,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -50065,14 +37869,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50085,8 +37885,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50098,15 +37898,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50118,7 +37912,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -50131,18 +37925,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50154,7 +37940,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -50167,19 +37953,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50192,8 +37969,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -50205,15 +37982,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50226,10 +37996,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -50241,14 +38011,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50261,8 +38027,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50274,15 +38040,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50294,7 +38054,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50307,11 +38067,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50324,10 +38082,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50339,14 +38097,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50359,8 +38113,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50372,15 +38126,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50392,7 +38140,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -50405,18 +38153,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50428,7 +38168,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -50441,19 +38181,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50466,8 +38197,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -50479,15 +38210,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50500,10 +38224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -50515,14 +38239,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50535,8 +38255,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50548,15 +38268,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50568,7 +38282,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50581,11 +38295,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50598,10 +38310,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50613,14 +38325,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50633,8 +38341,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50646,15 +38354,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #200]", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50666,7 +38368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v8.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50679,18 +38381,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50702,7 +38396,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50715,11 +38409,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50732,10 +38424,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50747,14 +38439,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50767,8 +38455,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50780,15 +38468,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50800,7 +38482,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v8.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50813,18 +38495,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50836,7 +38510,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50849,11 +38523,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50866,10 +38538,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50881,15 +38553,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b20", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b20", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50901,7 +38570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -50914,11 +38583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50931,10 +38598,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -50946,14 +38613,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50966,8 +38629,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -50979,15 +38642,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50999,7 +38656,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -51012,18 +38669,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51035,7 +38684,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -51048,19 +38697,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51073,8 +38713,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -51086,15 +38726,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51107,10 +38740,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -51122,14 +38755,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51142,8 +38771,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51155,15 +38784,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51175,7 +38798,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51188,11 +38811,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51205,10 +38826,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51220,14 +38841,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51240,8 +38857,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51253,15 +38870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #184]", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51273,7 +38884,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v8.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51286,18 +38897,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #168]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51309,7 +38912,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51322,11 +38925,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51339,10 +38940,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51354,14 +38955,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51374,8 +38971,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51387,15 +38984,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #160]", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51407,7 +38998,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v8.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51420,18 +39011,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51443,7 +39026,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51456,11 +39039,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51473,10 +39054,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51488,15 +39069,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b18", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b18", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51508,7 +39086,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51521,11 +39099,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51538,10 +39114,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -51553,14 +39129,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51573,8 +39145,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51586,15 +39158,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51606,7 +39172,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -51619,18 +39185,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51642,7 +39200,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -51655,19 +39213,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51680,8 +39229,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -51693,15 +39242,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v10.8b, v0.8b", + "str d10, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51714,10 +39256,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -51729,14 +39271,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51749,8 +39287,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51762,15 +39300,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51782,7 +39314,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51795,11 +39327,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51812,10 +39342,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51827,14 +39357,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51847,8 +39373,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51860,20 +39386,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51886,10 +39400,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51901,19 +39415,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51926,8 +39431,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -51939,15 +39444,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", + "fmov s6, s0", + "str s6, [x21]", + "ldr d6, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51959,7 +39458,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v6.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -51972,18 +39471,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #208]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr d7, [x8, #208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51995,7 +39486,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -52008,11 +39499,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52025,10 +39514,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -52040,15 +39529,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7be0", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mov w21, #0x7be0", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52060,7 +39546,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v7.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -52073,11 +39559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52090,10 +39574,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -52105,14 +39589,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52125,8 +39605,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -52138,15 +39618,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52158,7 +39632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -52171,18 +39645,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52194,7 +39660,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -52207,35 +39673,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52248,10 +39688,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -52263,14 +39703,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52283,8 +39719,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -52296,20 +39732,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52322,10 +39746,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -52337,19 +39761,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52362,8 +39777,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -52375,32 +39790,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52431,28 +39823,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52479,19 +39851,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52504,10 +39864,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -52522,17 +39882,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b10", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "mov w21, #0x7b10", + "movk w21, #0xa7, lsl #16", + "ldr d3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52544,7 +39896,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -52557,11 +39909,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52574,10 +39924,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -52592,11 +39942,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52623,13 +39969,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52658,15 +39998,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52678,7 +40010,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -52691,37 +40023,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "add w4, w5, w5, lsl #3", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w5, [x9, #12]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52749,20 +40055,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "lsl w4, w4, #4", - "mov w20, #0x83d0", - "movk w20, #0xb1, lsl #16", + "mov w21, #0x83d0", + "movk w21, #0xb1, lsl #16", "mvn w27, w4", - "adds w26, w4, w20", + "adds w26, w4, w21", "mov x4, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52775,8 +40077,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -52788,20 +40090,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52832,16 +40122,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52868,13 +40149,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52903,36 +40178,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w24, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "mov w21, #0x8000", + "fmov d3, x20", + "mov v3.d[1], x21", + "eor v3.16b, v2.16b, v3.16b", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52944,7 +40194,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -52957,11 +40207,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52976,8 +40224,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -52989,14 +40237,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53009,8 +40252,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -53022,15 +40265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "fmov s3, s0", + "str s3, [x5]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53042,7 +40279,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -53055,18 +40292,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53078,7 +40307,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -53091,43 +40320,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "eor v5.16b, v4.16b, v5.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53142,8 +40340,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -53155,162 +40353,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w22, w5, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53325,8 +40372,94 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d6, x20", + "mov v6.d[1], x21", + "eor v6.16b, v5.16b, v6.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -53338,162 +40471,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #8]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w22, w5, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53508,8 +40490,94 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d7, x20", + "mov v7.d[1], x21", + "eor v7.16b, v6.16b, v7.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -53521,162 +40589,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w22, w5, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53691,8 +40608,94 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "fmov d8, x20", + "mov v8.d[1], x21", + "eor v8.16b, v7.16b, v8.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -53704,162 +40707,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #16]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w22, w5, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53874,8 +40726,94 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s8, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x21", + "eor v9.16b, v8.16b, v9.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -53887,150 +40825,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w22, w5, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54045,46 +40844,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -54096,15 +40855,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54116,7 +40869,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54129,18 +40882,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54152,7 +40897,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54165,31 +40910,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54204,8 +40930,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -54217,138 +40943,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #28]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w5, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54363,46 +40961,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -54414,15 +40972,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54434,7 +40986,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54447,18 +40999,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54470,7 +41014,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54483,11 +41027,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54502,8 +41047,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -54515,113 +41060,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w5, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54636,41 +41078,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -54682,15 +41089,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54702,7 +41103,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54715,18 +41116,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54738,7 +41131,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54751,11 +41144,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54770,8 +41164,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -54783,77 +41177,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54868,41 +41195,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -54914,15 +41206,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54934,7 +41220,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -54947,11 +41233,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54966,8 +41278,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -54979,77 +41291,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55064,41 +41309,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -55110,15 +41320,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55130,7 +41334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55143,11 +41347,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55162,8 +41392,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -55175,77 +41405,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55260,41 +41423,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -55306,15 +41434,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55326,7 +41448,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55339,11 +41461,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55358,8 +41506,524 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -55374,11 +42038,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w5, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55405,13 +42065,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55440,15 +42094,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "ldr s3, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55460,7 +42106,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55473,23 +42119,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55517,125 +42149,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55650,41 +42167,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -55696,15 +42178,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55716,7 +42192,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55729,18 +42205,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55752,7 +42220,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55765,23 +42233,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55794,10 +42248,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -55809,14 +42263,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w5, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55829,8 +42279,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -55842,15 +42292,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55862,7 +42306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55875,18 +42319,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55898,7 +42334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -55911,23 +42347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55940,10 +42362,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -55955,14 +42377,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w5, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55975,8 +42393,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -55988,15 +42406,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56008,7 +42420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56021,18 +42433,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56044,7 +42448,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56057,23 +42461,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56086,10 +42476,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56101,14 +42491,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w5, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56121,8 +42507,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56134,15 +42520,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56154,7 +42534,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56167,18 +42547,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56190,7 +42562,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56203,23 +42575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56232,10 +42590,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56247,14 +42605,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w5, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56267,8 +42621,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56280,15 +42634,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56300,7 +42648,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56313,19 +42661,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56338,8 +42704,95 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -56351,10 +42804,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "mov v9.8b, v0.8b", + "str d9, [x20]", + "ldr s9, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56366,7 +42818,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56379,11 +42831,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56396,10 +42846,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56411,14 +42861,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56431,8 +42877,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56444,15 +42890,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56464,7 +42904,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56477,19 +42917,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56502,8 +42933,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", @@ -56515,10 +42946,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "mov v9.8b, v0.8b", + "str d9, [x20]", + "ldr s9, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56530,7 +42960,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56543,11 +42973,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56560,10 +42988,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56575,14 +43003,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56595,8 +43019,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56608,15 +43032,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56628,7 +43046,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56641,18 +43059,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56664,7 +43074,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56677,23 +43087,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56706,10 +43102,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56721,14 +43117,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w5, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56741,8 +43133,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56754,15 +43146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56774,7 +43160,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56787,11 +43173,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56804,10 +43188,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56819,14 +43203,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56839,8 +43219,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56852,15 +43232,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56872,7 +43246,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -56885,18 +43259,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56908,7 +43274,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -56921,11 +43287,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56938,10 +43302,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -56953,14 +43317,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56973,8 +43333,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -56986,15 +43346,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57006,7 +43360,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57019,18 +43373,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57042,7 +43388,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -57055,11 +43401,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57072,10 +43416,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57087,14 +43431,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57107,8 +43447,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -57120,15 +43460,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57140,7 +43474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57153,11 +43487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57170,10 +43502,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57185,14 +43517,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w5, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57205,8 +43533,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -57218,15 +43546,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57238,7 +43560,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57251,11 +43573,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57268,10 +43588,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57283,14 +43603,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w5, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57303,8 +43619,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -57316,15 +43632,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #128]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x4, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57336,7 +43646,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57349,11 +43659,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57366,10 +43674,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57381,14 +43689,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w5, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57401,8 +43705,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -57414,15 +43718,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #132]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57434,7 +43732,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57447,11 +43745,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57464,10 +43760,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57479,14 +43775,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w5, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57499,8 +43791,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -57512,15 +43804,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #136]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x4, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57532,7 +43818,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57545,11 +43831,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57564,8 +43848,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57577,14 +43861,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57597,8 +43877,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -57610,15 +43890,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #140]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57630,7 +43904,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -57643,11 +43917,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57660,10 +43932,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -57678,11 +43950,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w5, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -57709,20 +43977,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #140]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "mov x8, x9", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "strb w21, [x28, #1298]" + "strb wzr, [x28, #1298]" ] }, "Block3": { - "ExpectedInstructionCount": 20918, + "ExpectedInstructionCount": 11537, "x86Insts": [ "fld dword [esi + 0x64]", "mov eax,dword [esi + 0x88]", @@ -58375,517 +44638,38 @@ "mov edi,0x5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x10, #136]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x5c (92)", + "str s2, [x20]", "ldr w5, [x10, #140]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x10, #144]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x60 (96)", + "str s2, [x20]", "mov w20, #0x3f", "str w20, [x8, #740]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w4, [x8, #148]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x64 (100)", + "str s2, [x20]", "str w5, [x8, #152]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #156]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x14 (20)", + "str s2, [x20]", "str w4, [x8, #232]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #236]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x18 (24)", + "str s2, [x20]", "str w6, [x8, #240]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x1c (28)", + "str s2, [x20]", "ldr s2, [x10, #244]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58914,15 +44698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -58934,7 +44710,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -58947,23 +44723,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -58991,14 +44753,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59011,8 +44769,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -59024,15 +44782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59044,7 +44796,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -59057,23 +44809,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59101,77 +44839,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59186,8 +44857,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -59202,11 +44928,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59233,297 +44955,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x10, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x14 (20)", + "str s2, [x20]", "ldr s2, [x10, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x18 (24)", + "str s2, [x20]", "ldr s2, [x10, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x1c (28)", + "str s2, [x20]", "ldr s2, [x10, #240]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59552,15 +44996,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59572,7 +45008,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -59585,23 +45021,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59629,14 +45051,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59649,8 +45067,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -59662,15 +45080,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59682,7 +45094,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -59695,23 +45107,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59739,77 +45137,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59824,8 +45155,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -59840,11 +45226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59871,84 +45253,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x10, #256]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59977,15 +45285,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -59997,7 +45297,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60010,23 +45310,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60054,14 +45340,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60074,8 +45356,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -60087,15 +45369,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60107,7 +45383,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60120,19 +45396,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x10 (16)", + "str s3, [x20]", + "ldr s3, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60144,36 +45413,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60186,23 +45426,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60230,14 +45456,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60250,8 +45472,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -60263,15 +45485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60283,7 +45499,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60296,19 +45512,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", + "str s3, [x20]", + "ldr s3, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60320,36 +45529,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60362,23 +45542,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60406,14 +45572,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60426,8 +45588,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -60439,15 +45601,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60459,7 +45615,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60472,19 +45628,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x14 (20)", + "str s3, [x20]", + "ldr s3, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60496,36 +45645,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60538,23 +45658,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60582,14 +45688,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60602,8 +45704,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -60615,15 +45717,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #76]", + "add w20, w8, #0x44 (68)", + "str s3, [x20]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60635,7 +45734,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60648,94 +45747,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60763,14 +45777,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60783,8 +45793,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -60796,15 +45806,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #140]", + "add w20, w8, #0x48 (72)", + "str s3, [x20]", + "ldr s3, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60816,7 +45823,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -60829,94 +45836,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60944,14 +45866,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60964,8 +45882,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -60977,15 +45895,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #88]", + "add w20, w8, #0x40 (64)", + "str s3, [x20]", + "ldr s3, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -60997,7 +45912,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -61010,94 +45925,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61125,14 +45955,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61145,8 +45971,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -61158,15 +45984,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #80]", + "add w20, w8, #0x84 (132)", + "str s3, [x20]", + "ldr s3, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61178,7 +46001,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -61191,94 +46014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61306,160 +46044,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61474,8 +46062,66 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #84]", + "add w20, w8, #0x7c (124)", + "str s3, [x20]", + "ldr s3, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -61490,29 +46136,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", + "mov w20, #0x0", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61539,84 +46165,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", + "str s2, [x21]", "ldr s2, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61645,15 +46197,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldr s3, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61665,7 +46209,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -61678,23 +46222,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61722,125 +46252,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61855,8 +46270,91 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -61868,14 +46366,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61888,8 +46382,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -61901,15 +46395,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61921,7 +46409,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -61934,18 +46422,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61957,7 +46437,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -61970,23 +46450,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61999,10 +46465,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62014,14 +46480,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62034,8 +46496,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62047,15 +46509,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62067,7 +46523,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62080,18 +46536,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62103,7 +46551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62116,11 +46564,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62133,10 +46579,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62148,14 +46594,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62168,8 +46610,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62181,15 +46623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62201,7 +46637,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62214,18 +46650,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62237,7 +46665,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62250,11 +46678,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62267,10 +46693,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62282,14 +46708,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62302,8 +46724,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62315,15 +46737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62335,7 +46751,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62348,18 +46764,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62371,7 +46779,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62384,11 +46792,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62401,10 +46807,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62416,14 +46822,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62436,8 +46838,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62449,15 +46851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62469,7 +46865,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62482,18 +46878,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62505,7 +46893,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62518,11 +46906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62535,10 +46921,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62550,14 +46936,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62570,8 +46952,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62583,15 +46965,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62603,7 +46979,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62616,18 +46992,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62639,7 +47007,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62652,11 +47020,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62669,10 +47035,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62684,14 +47050,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62704,8 +47066,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62717,15 +47079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62737,7 +47093,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62750,18 +47106,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62773,7 +47121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -62786,11 +47134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62803,10 +47149,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -62818,14 +47164,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -62838,8 +47180,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -62851,247 +47193,25 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "add w21, w8, #0x5c (92)", + "str s8, [x21]", "ldr w4, [x8, #92]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #44]", "str w4, [x8, #244]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", + "str s8, [x21]", "ldr w5, [x8, #96]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #20]", "str w5, [x8, #248]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x64 (100)", + "str s8, [x21]", "ldr w6, [x8, #100]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #252]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63104,8 +47224,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -63117,23 +47237,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63146,8 +47253,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -63159,23 +47266,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63188,8 +47282,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -63201,10 +47295,27 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63216,7 +47327,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -63229,19 +47340,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63254,438 +47355,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -63699,14 +47370,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63719,8 +47386,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -63732,15 +47399,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63752,7 +47413,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -63765,23 +47426,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63794,10 +47441,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -63809,14 +47456,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63829,8 +47472,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -63842,15 +47485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63862,7 +47499,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -63875,23 +47512,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63904,10 +47527,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -63919,14 +47542,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63939,8 +47558,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -63952,15 +47571,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -63972,7 +47585,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -63985,18 +47598,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64008,7 +47613,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64021,11 +47626,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64038,10 +47641,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -64053,14 +47656,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64073,8 +47672,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -64086,15 +47685,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64106,7 +47699,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64119,18 +47712,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64142,7 +47727,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64155,11 +47740,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64172,10 +47755,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -64187,14 +47770,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64207,8 +47786,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -64220,15 +47799,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64240,7 +47813,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64253,18 +47826,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64276,7 +47841,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64289,11 +47854,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64306,10 +47869,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -64321,14 +47884,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64341,8 +47900,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -64354,15 +47913,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64374,7 +47927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64387,18 +47940,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64410,7 +47955,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64423,11 +47968,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64440,10 +47983,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64455,14 +47998,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64475,8 +48014,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -64488,15 +48027,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64508,7 +48041,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64521,18 +48054,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64544,7 +48069,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64557,11 +48082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64574,10 +48097,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64589,14 +48112,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64609,8 +48128,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -64622,15 +48141,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64642,7 +48155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64655,18 +48168,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64678,7 +48183,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -64691,11 +48196,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64708,10 +48211,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64723,14 +48226,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -64743,8 +48242,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -64756,247 +48255,25 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #44]", "str w4, [x8, #256]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", + "str s8, [x21]", "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #16]", "str w5, [x8, #260]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", + "str s8, [x21]", "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #264]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65009,8 +48286,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65022,23 +48299,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65051,8 +48315,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65064,23 +48328,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65093,8 +48344,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65106,10 +48357,27 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65121,7 +48389,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65134,19 +48402,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65159,438 +48417,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -65604,14 +48432,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65624,8 +48448,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65637,15 +48461,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65657,7 +48475,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65670,23 +48488,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65699,10 +48503,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65714,14 +48518,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65734,8 +48534,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65747,15 +48547,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65767,7 +48561,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65780,23 +48574,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65809,10 +48589,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65824,14 +48604,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65844,8 +48620,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65857,15 +48633,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65877,7 +48647,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65890,18 +48660,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65913,7 +48675,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65926,11 +48688,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65943,10 +48703,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -65958,14 +48718,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65978,8 +48734,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -65991,15 +48747,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66011,7 +48761,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66024,18 +48774,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66047,7 +48789,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66060,11 +48802,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66077,10 +48817,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -66092,14 +48832,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66112,8 +48848,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66125,15 +48861,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66145,7 +48875,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66158,18 +48888,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66181,7 +48903,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66194,11 +48916,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66211,10 +48931,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -66226,14 +48946,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66246,8 +48962,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66259,15 +48975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66279,7 +48989,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66292,18 +49002,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66315,7 +49017,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66328,11 +49030,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66345,10 +49045,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66360,14 +49060,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66380,8 +49076,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66393,15 +49089,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66413,7 +49103,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66426,18 +49116,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66449,7 +49131,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66462,11 +49144,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66479,10 +49159,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66494,14 +49174,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66514,8 +49190,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66527,15 +49203,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66547,7 +49217,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66560,18 +49230,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66583,7 +49245,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66596,11 +49258,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66613,10 +49273,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66628,14 +49288,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66648,8 +49304,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66661,247 +49317,25 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #44]", "str w4, [x8, #268]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", + "str s8, [x21]", "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #16]", "str w5, [x8, #272]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", + "str s8, [x21]", "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #276]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66914,8 +49348,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66927,28 +49361,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66961,8 +49377,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -66974,28 +49390,115 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s4, [x21]", + "ldr s4, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s4, [x21]", + "ldr s4, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s4, [x21]", + "ldr s4, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s4, [x21]", + "ldr s4, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s4, [x21]", + "ldr s4, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s4, [x21]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67022,14 +49525,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x21]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67057,446 +49554,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67527,28 +49584,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67575,14 +49612,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "str s2, [x21]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67610,20 +49641,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67636,8 +49653,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -67654,28 +49671,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67702,111 +49698,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67835,15 +49727,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "ldr s3, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67855,7 +49739,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67868,11 +49752,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67885,10 +49767,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -67903,11 +49785,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67934,13 +49812,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67969,15 +49841,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s3, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67989,7 +49853,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68002,11 +49866,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68019,10 +49881,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -68037,11 +49899,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68068,13 +49926,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68103,15 +49955,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68123,7 +49967,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68136,11 +49980,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68153,10 +49995,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -68171,11 +50013,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68202,13 +50040,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68237,15 +50069,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s3, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68257,7 +50081,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68270,11 +50094,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68287,10 +50109,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -68305,11 +50127,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68336,13 +50154,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68371,15 +50183,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldr s3, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68391,7 +50195,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68404,11 +50208,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68421,10 +50223,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -68439,11 +50241,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68470,13 +50268,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68505,15 +50297,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68525,7 +50309,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68538,11 +50322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68555,10 +50337,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -68573,11 +50355,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68604,738 +50382,52 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w4, [x8, #280]", "ldr w4, [x7, #136]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", + "str s2, [x21]", "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", + "str s2, [x21]", "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #284]", "ldr w5, [x7, #140]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x70 (112)", + "str s2, [x21]", "ldr s2, [x7, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #288]", "ldr w6, [x7, #144]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x74 (116)", + "str s2, [x21]", "ldr s2, [x7, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w4, [x8, #148]", "str w5, [x8, #152]", "str w6, [x8, #156]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x78 (120)", + "str s2, [x21]", "str w4, [x8, #172]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #176]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x2c (44)", + "str s2, [x21]", "str w6, [x8, #180]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x30 (48)", + "str s2, [x21]", "ldr s2, [x7, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x34 (52)", + "str s2, [x21]", "ldr s2, [x7, #244]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69364,15 +50456,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69384,7 +50468,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69397,23 +50481,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69441,14 +50511,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69461,8 +50527,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -69474,15 +50540,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69494,7 +50554,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69507,23 +50567,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69551,77 +50597,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69636,8 +50615,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69652,11 +50686,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69683,297 +50713,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x7, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", + "str s2, [x21]", "ldr s2, [x7, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", + "str s2, [x21]", "ldr s2, [x7, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x64 (100)", + "str s2, [x21]", "ldr s2, [x7, #240]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70002,15 +50754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s3, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70022,7 +50766,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70035,23 +50779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70079,14 +50809,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70099,8 +50825,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -70112,15 +50838,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70132,7 +50852,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70145,23 +50865,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70189,77 +50895,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70274,8 +50913,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70290,11 +50984,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70321,84 +51011,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x7, #256]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x28 (40)", + "str s2, [x21]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70427,15 +51043,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70447,7 +51055,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70460,23 +51068,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70504,14 +51098,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70524,8 +51114,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -70537,15 +51127,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70557,7 +51141,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70570,19 +51154,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x5c (92)", + "str s3, [x21]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70594,36 +51171,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70636,23 +51184,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70680,14 +51214,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70700,8 +51230,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -70713,15 +51243,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70733,7 +51257,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70746,19 +51270,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x84 (132)", + "str s3, [x21]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70770,36 +51287,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70812,23 +51300,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70856,14 +51330,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70876,8 +51346,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -70889,15 +51359,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70909,7 +51373,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70922,19 +51386,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x7c (124)", + "str s3, [x21]", + "ldr s3, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70946,36 +51403,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70988,23 +51416,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71032,14 +51446,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71052,8 +51462,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -71065,15 +51475,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s3, [x21]", + "ldr s3, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71085,7 +51492,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71098,94 +51505,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71213,14 +51535,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71233,8 +51551,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -71246,15 +51564,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s3, [x21]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71266,7 +51581,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71279,94 +51594,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71394,14 +51624,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71414,8 +51640,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -71427,15 +51653,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s3, [x21]", + "ldr s3, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71447,7 +51670,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71460,94 +51683,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71575,14 +51713,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71595,8 +51729,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -71608,15 +51742,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s3, [x21]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71628,7 +51759,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71641,94 +51772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71756,160 +51802,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71924,8 +51820,66 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s3, [x21]", + "ldr s3, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71940,28 +51894,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71988,84 +51922,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", + "str s2, [x21]", "ldr s2, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72094,15 +51954,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72114,7 +51966,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72127,23 +51979,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72171,125 +52009,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72304,8 +52027,91 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72317,14 +52123,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72337,8 +52139,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -72350,15 +52152,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72370,7 +52166,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72383,18 +52179,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72406,7 +52194,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72419,23 +52207,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72448,10 +52222,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72463,14 +52237,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72483,8 +52253,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -72496,15 +52266,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72516,7 +52280,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72529,18 +52293,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72552,7 +52308,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72565,11 +52321,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72582,10 +52336,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72597,14 +52351,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72617,8 +52367,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -72630,15 +52380,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72650,7 +52394,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72663,18 +52407,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72686,7 +52422,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72699,11 +52435,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72716,10 +52450,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72731,14 +52465,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72751,8 +52481,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -72764,15 +52494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72784,7 +52508,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72797,18 +52521,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72820,7 +52536,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72833,11 +52549,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72850,10 +52564,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72865,14 +52579,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72885,8 +52595,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -72898,15 +52608,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72918,7 +52622,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72931,18 +52635,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72954,7 +52650,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72967,11 +52663,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72984,10 +52678,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72999,14 +52693,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73019,8 +52709,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -73032,15 +52722,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73052,7 +52736,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73065,18 +52749,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73088,7 +52764,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73101,11 +52777,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73118,10 +52792,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73133,14 +52807,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73153,8 +52823,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -73166,15 +52836,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73186,7 +52850,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73199,18 +52863,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73222,7 +52878,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73235,11 +52891,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73252,10 +52906,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73267,14 +52921,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73287,8 +52937,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -73300,247 +52950,25 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #44]", "str w4, [x8, #184]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #16]", "str w5, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", "ldr w6, [x8, #120]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #192]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73553,8 +52981,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -73566,23 +52994,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73595,8 +53010,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -73608,23 +53023,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73637,8 +53039,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -73650,10 +53052,27 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73665,7 +53084,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73678,19 +53097,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73703,438 +53112,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -74148,14 +53127,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74168,8 +53143,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74181,15 +53156,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74201,7 +53170,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74214,23 +53183,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74243,10 +53198,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74258,14 +53213,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74278,8 +53229,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74291,15 +53242,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74311,7 +53256,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74324,23 +53269,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74353,10 +53284,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74368,14 +53299,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74388,8 +53315,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74401,15 +53328,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74421,7 +53342,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74434,18 +53355,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74457,7 +53370,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74470,11 +53383,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74487,10 +53398,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74502,14 +53413,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74522,8 +53429,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74535,15 +53442,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74555,7 +53456,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74568,18 +53469,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74591,7 +53484,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74604,11 +53497,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74621,10 +53512,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74636,14 +53527,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74656,8 +53543,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74669,15 +53556,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74689,7 +53570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74702,18 +53583,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74725,7 +53598,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74738,11 +53611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74755,10 +53626,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74770,14 +53641,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74790,8 +53657,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74803,15 +53670,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74823,7 +53684,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74836,18 +53697,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74859,7 +53712,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74872,11 +53725,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74889,10 +53740,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -74904,14 +53755,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74924,8 +53771,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -74937,15 +53784,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74957,7 +53798,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74970,18 +53811,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74993,7 +53826,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75006,11 +53839,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75023,10 +53854,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -75038,14 +53869,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75058,8 +53885,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75071,15 +53898,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75091,7 +53912,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75104,18 +53925,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75127,7 +53940,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75140,11 +53953,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75157,10 +53968,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -75172,14 +53983,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75192,8 +53999,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75205,247 +54012,25 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #44]", "str w4, [x8, #196]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #16]", "str w5, [x8, #200]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", "ldr w6, [x8, #120]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "str w6, [x8, #204]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75458,8 +54043,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75471,23 +54056,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75500,8 +54072,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75513,23 +54085,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75542,8 +54101,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75555,10 +54114,27 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75570,7 +54146,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75583,19 +54159,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75608,438 +54174,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -76053,14 +54189,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76073,8 +54205,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76086,15 +54218,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76106,7 +54232,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76119,23 +54245,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76148,10 +54260,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -76163,14 +54275,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76183,8 +54291,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76196,15 +54304,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76216,7 +54318,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76229,23 +54331,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76258,10 +54346,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -76273,14 +54361,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76293,8 +54377,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76306,15 +54390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76326,7 +54404,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76339,18 +54417,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76362,7 +54432,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76375,11 +54445,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76392,10 +54460,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -76407,14 +54475,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76427,8 +54491,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76440,15 +54504,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76460,7 +54518,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76473,18 +54531,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76496,7 +54546,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76509,11 +54559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76526,10 +54574,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -76541,14 +54589,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76561,8 +54605,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76574,15 +54618,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76594,7 +54632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76607,18 +54645,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76630,7 +54660,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76643,11 +54673,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76660,10 +54688,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -76675,14 +54703,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76695,8 +54719,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76708,15 +54732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76728,7 +54746,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76741,18 +54759,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76764,7 +54774,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76777,11 +54787,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76794,10 +54802,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -76809,14 +54817,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76829,8 +54833,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76842,15 +54846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76862,7 +54860,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76875,18 +54873,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76898,7 +54888,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76911,11 +54901,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76928,10 +54916,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -76943,14 +54931,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76963,8 +54947,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76976,15 +54960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76996,7 +54974,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77009,18 +54987,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77032,7 +55002,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77045,11 +55015,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77062,10 +55030,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77077,14 +55045,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77097,8 +55061,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -77110,249 +55074,26 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #44]", "str w4, [x8, #208]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s8, [x8, #16]", "str w5, [x8, #212]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", "ldr w6, [x8, #120]", "str w6, [x8, #216]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w24, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str w20, [x8, #-4]!", + "add w20, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77365,8 +55106,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -77378,29 +55119,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77413,8 +55135,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -77426,28 +55148,115 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #44]", + "add w20, w8, #0x44 (68)", + "str s4, [x20]", + "ldr s4, [x8, #88]", + "add w20, w8, #0x4c (76)", + "str s4, [x20]", + "ldr s4, [x8, #84]", + "add w20, w8, #0x48 (72)", + "str s4, [x20]", + "ldr s4, [x8, #92]", + "add w20, w8, #0x18 (24)", + "str s4, [x20]", + "ldr s4, [x8, #144]", + "add w20, w8, #0x30 (48)", + "str s4, [x20]", + "ldr s4, [x8, #80]", + "add w20, w8, #0x14 (20)", + "str s4, [x20]", + "ldr s4, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77474,14 +55283,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "str s2, [x20]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77509,446 +55312,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77979,28 +55342,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78027,14 +55370,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78062,20 +55399,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78088,8 +55411,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -78106,28 +55429,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78154,111 +55456,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78287,15 +55485,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78307,7 +55497,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78320,11 +55510,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78337,10 +55525,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -78355,11 +55543,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78386,13 +55570,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78421,15 +55599,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s3, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78441,7 +55611,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78454,11 +55624,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78471,10 +55639,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -78489,11 +55657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78520,13 +55684,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78555,15 +55713,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s3, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78575,7 +55725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78588,11 +55738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78605,10 +55753,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -78623,11 +55771,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78654,13 +55798,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78689,15 +55827,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "ldr s3, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78709,7 +55839,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78722,11 +55852,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78739,10 +55867,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -78757,11 +55885,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78788,13 +55912,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78823,15 +55941,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "ldr s3, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78843,7 +55953,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78856,11 +55966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78873,10 +55981,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -78891,11 +55999,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78922,13 +56026,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78957,15 +56055,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "ldr s3, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78977,7 +56067,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78990,11 +56080,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79007,10 +56095,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -79025,11 +56113,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79056,247 +56140,45 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x74 (116)", + "str s2, [x20]", "ldr w4, [x8, #116]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w4, [x8, #224]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x78 (120)", + "str s2, [x20]", "ldr w5, [x8, #120]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #228]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x7c (124)", + "str s2, [x20]", "ldr w6, [x8, #124]", "add w5, w8, #0x190 (400)", "str w6, [x8, #232]", "mov w20, #0x2296", "movk w20, #0x1, lsl #16", - "mov w22, #0xd4f1", - "movk w22, #0x70, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd4f1", + "movk w21, #0x70, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "mov w22, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w22, w20", + "bic w20, w23, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block4": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 63, "x86Insts": [ "fldz", "push 0x0", @@ -81350,31 +58232,17 @@ "add esp,0x20" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "mov w20, #0x0", "str w20, [x8, #-4]!", - "strb w22, [x28, #1298]", - "mov w22, #0xffffffff", - "str w22, [x8, #-4]!", - "mov w22, #0x172", - "movk w22, #0x100, lsl #16", - "str w22, [x8, #-4]!", - "mov w22, #0x37", - "str w22, [x8, #-4]!", + "mov w21, #0xffffffff", + "str w21, [x8, #-4]!", + "mov w21, #0x172", + "movk w21, #0x100, lsl #16", + "str w21, [x8, #-4]!", + "mov w21, #0x37", + "str w21, [x8, #-4]!", "str w5, [x8, #-4]!", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81402,14 +58270,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "bic w21, w23, w21", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "mov w20, #0x3c14", "movk w20, #0xa3, lsl #16", "str w20, [x8, #-4]!", @@ -81422,6 +58283,14 @@ "movk w21, #0x41, lsl #16", "add w21, w20, w21", "str w20, [x8, #-4]!", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", @@ -81429,7 +58298,7 @@ ] }, "Block5": { - "ExpectedInstructionCount": 586, + "ExpectedInstructionCount": 284, "x86Insts": [ "mov ebx,dword [eax + 0x68]", "fld dword [esi + 0x2c]", @@ -81802,98 +58671,18 @@ ], "ExpectedArm64ASM": [ "ldr w7, [x4, #104]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #104]", "mvn w27, w8", "subs w26, w8, #0x14 (20)", "cfinv", "mov x8, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w8, #0x10 (16)", + "str s2, [x20]", "uxtb w5, w4", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", "ldr q2, [x28, #2608]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #56]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81920,25 +58709,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "uxtb w6, w7", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81965,48 +58739,34 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr w23, [x8, #56]", - "mov w24, #0x0", - "sxtw x23, w23", - "mrs x25, nzcv", - "cmp x23, #0x0 (0)", - "mov w12, #0x8000", - "csel x13, x12, xzr, lt", - "cneg x23, x23, mi", - "mov w14, #0x3f", + "str s2, [x20]", + "ldr w20, [x8, #56]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x24, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w25, #0x3f", "mov x0, #0x3f", - "clz x15, x23", - "sub x15, x0, x15", - "sub x15, x14, x15", - "lsl x16, x23, x15", - "mov w17, #0x403e", - "sub x15, x17, x15", - "cmp x23, #0x0 (0)", - "csel x23, x24, x15, eq", - "orr x23, x13, x23", - "fmov d2, x16", - "fmov d3, x23", + "clz x12, x20", + "sub x12, x0, x12", + "sub x12, x25, x12", + "lsl x13, x20, x12", + "mov w14, #0x403e", + "sub x12, x14, x12", + "cmp x20, #0x0 (0)", + "csel x20, x22, x12, eq", + "orr x20, x24, x20", + "fmov d2, x13", + "fmov d3, x20", "mov v2.d[1], v3.d[0]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "msr nzcv, x25", + "msr nzcv, x21", "str w4, [x8, #64]", - "ldrb w20, [x28, #1019]", - "mov w23, #0xddd8", - "movk w23, #0xa3, lsl #16", - "ldr d2, [x23]", + "mov w20, #0xddd8", + "movk w20, #0xa3, lsl #16", + "ldr d3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82018,7 +58778,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -82031,23 +58791,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82078,23 +58824,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82121,51 +58852,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4 (4)", + "str s2, [x20]", + "str w6, [x8, #56]", + "ldr w20, [x8, #56]", + "sxtw x20, w20", + "mrs x21, nzcv", + "cmp x20, #0x0 (0)", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov x0, #0x3f", + "clz x24, x20", + "sub x24, x0, x24", + "sub x24, x25, x24", + "lsl x25, x20, x24", + "sub x24, x14, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d4, x20", + "mov v2.d[1], v4.d[0]", + "msr nzcv, x21", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82180,75 +58890,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #56]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr w23, [x8, #56]", - "sxtw x23, w23", - "mrs x25, nzcv", - "cmp x23, #0x0 (0)", - "csel x12, x12, xzr, lt", - "cneg x23, x23, mi", - "mov x0, #0x3f", - "clz x13, x23", - "sub x13, x0, x13", - "sub x13, x14, x13", - "lsl x14, x23, x13", - "sub x13, x17, x13", - "cmp x23, #0x0 (0)", - "csel x23, x24, x13, eq", - "orr x23, x12, x23", - "fmov d2, x14", - "fmov d3, x23", - "mov v2.d[1], v3.d[0]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "msr nzcv, x25", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -82263,16 +58906,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82299,98 +58933,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "str s2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "mov w20, #0x3e2b", "movk w20, #0x1, lsl #16", - "mov w22, #0xe52", - "movk w22, #0x41, lsl #16", - "add w22, w20, w22", + "mov w21, #0xe52", + "movk w21, #0x41, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block6": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 58, "x86Insts": [ "mov eax,dword [esp + 0x110]", "fldz", @@ -82710,17 +59277,7 @@ ], "ExpectedArm64ASM": [ "ldr w4, [x8, #272]", - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w5, [x4]", "ldr w6, [x8, #92]", "ldr w7, [x6, #24]", @@ -82732,10 +59289,6 @@ "str w4, [x7, #20]", "ldr w5, [x10, #80]", "str w5, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82763,27 +59316,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "mov w20, #0x43c4", "movk w20, #0x1, lsl #16", - "mov w22, #0x433f", - "movk w22, #0x78, lsl #16", - "add w22, w20, w22", + "mov w21, #0x433f", + "movk w21, #0x78, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block7": { - "ExpectedInstructionCount": 7653, + "ExpectedInstructionCount": 7397, "x86Insts": [ "fld dword [ecx + 0xc]", "fld dword [ecx + 0x18]", @@ -83001,7 +59555,6 @@ "fstp dword [eax + 0x10]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -83030,17 +59583,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "ldr s3, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83052,7 +59595,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83065,23 +59608,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83109,14 +59638,65 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x5]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83131,83 +59711,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83222,24 +59727,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", + "mov w20, #0x0", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83266,14 +59756,183 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff4", + "str s2, [x21]", + "mov x21, #0xfffffffffffffff4", + "ldr s2, [x5, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x5]", + "mov x22, #0xffffffffffffffe8", + "ldr s3, [x5, w22, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "sub w23, w5, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x23]", + "mov x23, #0xffffffffffffffdc", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -83302,32 +59961,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83355,737 +59988,329 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "mov w23, #0x8", + "add w24, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x24]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "sub w24, w5, #0x18 (24)", + "str s3, [x24]", + "ldr s3, [x5]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x5, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w24, w5, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w24, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x24]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "str s3, [x5]", + "ldr s3, [x5, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldrb w24, [x28, #1019]", + "sub w24, w24, #0x4 (4)", + "and w24, w24, #0x7", + "strb w24, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x25, #0xffffffffffffffe8", - "ldr s2, [x5, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", + "mov w25, #0x1", + "add w12, w24, #0x1 (1)", "and w12, w12, #0x7", "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", + "str q5, [x0, #1040]", + "add w12, w24, #0x2 (2)", "and w12, w12, #0x7", "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, w23, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x12, #0xffffffffffffffdc", - "ldr s2, [x5, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", + "str q4, [x0, #1040]", + "add w12, w24, #0x3 (3)", "and w12, w12, #0x7", "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "sub w23, w23, w24", + "ldrb w24, [x28, #1298]", + "mov w12, #0xf0f", + "lsr w23, w12, w23", + "orr w23, w24, w23", + "strb w23, [x28, #1298]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, w25, sxtw]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x6 (6)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84117,10 +60342,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4 (4)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84148,13 +60373,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84183,31 +60409,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x6 (6)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84239,10 +60465,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84270,13 +60496,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84305,19 +60532,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84349,10 +60577,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84380,18 +60608,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84405,10 +60634,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -84423,27 +60652,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84471,13 +60701,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84506,14 +60737,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84542,31 +60774,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84598,10 +60830,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84629,18 +60861,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84654,10 +60887,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -84672,15 +60905,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84708,30 +60943,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84763,10 +60998,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4 (4)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84794,13 +61029,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84829,31 +61065,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84885,10 +61121,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84916,13 +61152,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84951,19 +61188,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84995,10 +61233,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85026,18 +61264,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85051,10 +61290,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -85069,15 +61308,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85105,13 +61346,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85140,14 +61382,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85176,31 +61419,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85232,10 +61475,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85263,18 +61506,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85288,10 +61532,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -85306,15 +61550,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85342,13 +61588,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85377,17 +61624,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7be0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7be0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85415,7 +61663,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85447,10 +61695,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85478,13 +61726,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85513,17 +61762,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bd8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bd8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85551,7 +61801,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85583,10 +61833,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85614,13 +61864,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85649,17 +61900,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bd0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bd0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85687,7 +61939,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85719,10 +61971,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85750,13 +62002,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85785,15 +62038,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85821,8 +62076,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85851,19 +62105,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85895,22 +62150,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85938,13 +62190,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85973,7 +62226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86005,10 +62258,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86036,13 +62289,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86071,15 +62325,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86107,8 +62363,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86137,19 +62392,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86181,22 +62437,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86224,13 +62477,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86259,7 +62513,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86291,10 +62545,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86322,13 +62576,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86357,15 +62612,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86393,8 +62650,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86423,19 +62679,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86467,22 +62724,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86510,13 +62764,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86545,7 +62800,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86577,10 +62832,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86608,13 +62863,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86643,17 +62899,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bc8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bc8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86681,7 +62938,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86713,10 +62970,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86744,13 +63001,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86779,17 +63037,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bc0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bc0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86817,7 +63076,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86849,10 +63108,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86880,13 +63139,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86915,17 +63175,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bb8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bb8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86953,7 +63214,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86985,10 +63246,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87016,13 +63277,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87051,17 +63313,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bb0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bb0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87089,7 +63352,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87121,10 +63384,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87152,13 +63415,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87187,17 +63451,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7ba8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7ba8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87225,7 +63490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87257,10 +63522,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87288,13 +63553,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87323,15 +63589,248 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7ba0", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7ba0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mov w24, #0x8000", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w12, w8, #0x58 (88)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "mov w12, #0x7b98", "movk w12, #0xa7, lsl #16", "ldr d2, [x12]", "mrs x0, nzcv", @@ -87361,7 +63860,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87393,265 +63905,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w12, #0x8000", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b98", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w12, w8, #0x5c (92)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87679,13 +63945,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87714,37 +63981,36 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", + "fmov d3, x20", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b90", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "mov w12, #0x7b90", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87772,19 +64038,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87816,22 +64083,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w12, w8, #0x54 (84)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87859,28 +64123,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b88", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "strb wzr, [x28, #1017]", + "mov w12, #0x7b88", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87908,7 +64172,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87940,10 +64204,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w13, w8, #0x60 (96)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87971,13 +64235,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x13]", + "ldrb w13, [x28, #1298]", + "lsl w14, w25, w23", + "bic w13, w13, w14", + "strb w13, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88006,23 +64271,137 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w13, [x28, #1298]", + "lsl w14, w25, w23", + "orr w13, w13, w14", + "strb w13, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", + "fmov d3, x20", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0x7b80", + "mov w13, #0x7b80", + "movk w13, #0xa7, lsl #16", + "ldr d2, [x13]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w14, [x28, #1298]", + "lsl w15, w25, w23", + "orr w14, w14, w15", + "strb w14, [x28, #1298]", + "add w14, w23, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w14, w8, #0x50 (80)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x14]", + "ldrb w14, [x28, #1298]", + "lsl w15, w25, w23", + "bic w14, w14, w15", + "strb w14, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "mov w14, #0x7b78", "movk w14, #0xa7, lsl #16", "ldr d2, [x14]", "mrs x0, nzcv", @@ -88052,19 +64431,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88096,10 +64463,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w15, w8, #0x64 (100)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88127,113 +64494,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w15, #0x7b78", - "movk w15, #0xa7, lsl #16", - "ldr d2, [x15]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x15]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "bic w15, w15, w16", + "strb w15, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88262,15 +64530,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "orr w15, w15, w16", + "strb w15, [x28, #1298]", + "add w15, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88298,13 +64568,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x15]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "bic w15, w15, w16", + "strb w15, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88333,15 +64604,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x13]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "orr w15, w15, w16", + "strb w15, [x28, #1298]", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88369,19 +64641,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88413,10 +64686,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w12, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88444,13 +64717,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88479,31 +64753,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x4 (4)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w12, w23, #0x4 (4)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88535,27 +64809,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w12, w23, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w12, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88583,38 +64858,37 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w12, w23, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", + "fmov d3, x20", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w12, w23, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88646,7 +64920,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "add w4, w4, #0x18 (24)", "add w5, w5, #0x4 (4)", @@ -88654,8 +64928,8 @@ "cfinv", "mov x27, x6", "mov x6, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w12, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88683,38 +64957,35 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", + "fmov d3, x20", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88746,15 +65017,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w12, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88782,13 +65055,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88817,34 +65091,132 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", + "fmov d3, x20", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr d2, [x13]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w20, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldrb w20, [x28, #1298]", + "lsl w24, w25, w23", + "bic w20, w20, w24", + "strb w20, [x28, #1298]", + "add w20, w23, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88907,7 +65279,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -88936,113 +65308,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x15]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffe4", - "ldr s2, [x4, w24, sxtw]", + "mov x23, #0xffffffffffffffe4", + "ldr s2, [x4, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89072,12 +65347,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89140,7 +65416,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w23, w4, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89169,14 +65445,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, w25, sxtw]", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89206,12 +65483,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89274,7 +65552,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89303,13 +65581,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w25, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89340,14 +65619,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffec", - "ldr s2, [x4, w24, sxtw]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "mov x22, #0xffffffffffffffec", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89409,7 +65689,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89438,15 +65718,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff0", - "ldr s2, [x4, w24, sxtw]", + "mov x22, #0xfffffffffffffff0", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89476,12 +65757,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89544,7 +65826,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89573,14 +65855,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, w23, sxtw]", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89610,12 +65893,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89678,7 +65962,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w4, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89707,15 +65991,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff8", - "ldr s2, [x4, w23, sxtw]", + "mov x21, #0xfffffffffffffff8", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89745,12 +66030,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89813,7 +66099,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w4, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89842,13 +66128,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89879,14 +66166,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x4, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89948,7 +66236,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w4, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89977,13 +66265,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90014,12 +66303,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90082,7 +66372,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90112,12 +66401,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90148,12 +66438,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90216,7 +66507,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w4, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90245,13 +66536,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90282,12 +66574,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90350,7 +66643,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w4, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90379,13 +66672,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90416,12 +66710,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90484,7 +66779,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w4, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90513,13 +66808,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90550,12 +66846,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90618,7 +66915,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w4, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90647,17 +66944,18 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block8": { - "ExpectedInstructionCount": 8283, + "ExpectedInstructionCount": 6590, "x86Insts": [ "movzx eax,word [esi + edx*0x8]", "fld dword [esi + edx*0x8 + 0x4]", @@ -90892,83 +67190,12 @@ "ExpectedArm64ASM": [ "add w20, w10, w6, lsl #3", "ldrh w4, [x20]", - "ldrb w20, [x28, #1019]", - "add w21, w10, #0x4 (4)", - "add w21, w21, w6, lsl #3", - "ldr s2, [x21]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w6, lsl #3", + "ldr s2, [x20]", + "add w20, w8, #0x24 (36)", + "str s2, [x20]", "ldr w10, [x8, #456]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90997,13 +67224,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "uxth w4, w4", "mov x5, x4", "ldr w20, [x8, #484]", @@ -91014,10 +67234,9 @@ "add w20, w4, #0x8 (8)", "add w11, w20, w10", "str w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "add w20, w4, #0x4 (4)", + "add w20, w20, w10", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91029,7 +67248,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91042,11 +67261,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91059,10 +67276,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -91077,10 +67294,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", + "ldr s3, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91092,7 +67306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91105,19 +67319,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w10", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91129,7 +67335,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91142,11 +67348,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91161,8 +67365,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -91174,18 +67378,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91198,10 +67393,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91216,15 +67411,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", + "ldr s3, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91236,7 +67423,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91249,18 +67436,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91272,7 +67451,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91285,11 +67464,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91304,8 +67481,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -91317,18 +67494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91341,10 +67509,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91359,15 +67527,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "ldr s3, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91379,7 +67539,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91392,11 +67552,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91409,10 +67567,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91427,11 +67585,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91458,13 +67612,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91493,17 +67641,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "add w20, w4, #0x4 (4)", + "add w20, w20, w10", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91515,7 +67655,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91528,11 +67668,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91545,10 +67683,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -91563,10 +67701,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #164]", + "ldr s3, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91578,7 +67713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91591,19 +67726,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w10", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91615,7 +67742,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91628,11 +67755,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91647,8 +67772,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -91660,18 +67785,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91684,10 +67800,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91702,15 +67818,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #172]", + "ldr s3, [x8, #172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91722,7 +67830,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91735,18 +67843,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91758,7 +67858,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91771,11 +67871,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91790,8 +67888,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -91803,18 +67901,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91827,10 +67916,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91845,15 +67934,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "ldr s3, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91865,7 +67946,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -91878,11 +67959,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91895,10 +67974,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91913,11 +67992,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xd4 (212)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91944,13 +68019,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #212]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91979,17 +68048,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "add w20, w4, #0x4 (4)", + "add w20, w20, w10", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92001,7 +68062,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92014,11 +68075,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92031,10 +68090,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92049,10 +68108,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", + "ldr s3, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92064,7 +68120,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92077,19 +68133,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w10", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92101,7 +68149,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92114,11 +68162,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92133,8 +68179,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92146,19 +68192,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mov x10, x11", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92171,10 +68208,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92189,15 +68226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", + "ldr s3, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92209,7 +68238,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92222,18 +68251,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92245,7 +68266,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92258,11 +68279,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92277,8 +68296,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92290,22 +68309,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w10, [x8, #56]", "add w20, w10, #0x8 (8)", "add w11, w20, w4", "str w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92318,10 +68328,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92336,15 +68346,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", + "ldr s3, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92356,7 +68358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92369,11 +68371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92386,10 +68386,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92404,11 +68404,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xd8 (216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92435,13 +68431,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #216]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92470,28 +68460,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "add w20, w4, w7", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92503,7 +68473,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92516,11 +68486,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92533,10 +68501,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92548,13 +68516,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92566,7 +68531,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92579,32 +68544,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x4 (4)", + "add w20, w20, w7", + "ldr s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92616,7 +68561,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92629,11 +68574,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92646,10 +68589,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92661,18 +68604,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92687,8 +68621,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92700,18 +68634,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92723,7 +68649,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92736,32 +68662,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w4, #0x8 (8)", + "add w20, w20, w7", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92773,7 +68679,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92786,11 +68692,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92803,10 +68707,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92818,18 +68722,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92844,8 +68739,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92857,31 +68752,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xe8 (232)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92894,8 +68769,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -92907,15 +68782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #232]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92927,7 +68796,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92940,31 +68809,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w7", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92976,7 +68825,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92989,11 +68838,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93008,8 +68855,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93021,13 +68868,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93039,7 +68883,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93052,32 +68896,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x4 (4)", + "add w20, w20, w7", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93089,7 +68913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93102,11 +68926,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93119,10 +68941,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93134,18 +68956,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93158,10 +68971,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93173,18 +68986,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93196,7 +69001,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93209,20 +69014,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x8 (8)", + "add w20, w20, w7", + "ldr s9, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93234,7 +69031,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93247,11 +69044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93264,10 +69059,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93279,18 +69074,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93303,10 +69089,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93318,31 +69104,478 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xec (236)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w4, w7", + "ldr s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x4 (4)", + "add w20, w20, w7", + "ldr s9, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x8 (8)", + "add w20, w20, w7", + "ldr s9, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0xf0 (240)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w4", + "ldr s6, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, w4", + "ldr s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93357,6 +69590,155 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x11]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -93368,15 +69750,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #236]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov s6, s0", + "str s6, [x20]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w4", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93388,7 +69766,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93401,48 +69779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93455,10 +69794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93470,13 +69809,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, w4", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93488,7 +69825,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93501,49 +69838,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93558,8 +69855,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93571,18 +69868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93595,10 +69883,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93610,18 +69898,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93633,7 +69913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93646,20 +69926,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93671,7 +69941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93684,11 +69954,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93701,10 +69969,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93716,18 +69984,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93740,10 +69999,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93755,19 +70014,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93780,8 +70030,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -93793,29 +70043,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #240]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93827,7 +70057,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93840,11 +70070,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, #0x4 (4)", + "add w20, w20, w4", + "ldr s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93857,10 +70115,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93872,26 +70130,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93903,7 +70145,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93916,11 +70158,38 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w10, w4", + "ldr s9, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93933,10 +70202,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93948,793 +70217,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mov x10, x11", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94747,10 +70233,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -94762,18 +70248,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94785,7 +70263,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94798,18 +70276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94821,7 +70291,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94834,11 +70304,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94851,10 +70319,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -94866,22 +70334,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w10, [x8, #32]", "add w20, w10, #0x4 (4)", "add w11, w20, w4", "str w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94894,10 +70353,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -94909,23 +70368,70 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "add w20, w10, #0x8 (8)", "add w11, w20, w4", "str w11, [x8, #188]", "ldr w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "add w20, w10, w4", + "ldr s6, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94940,84 +70446,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95032,15 +70462,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "ldr s6, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95052,7 +70474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95065,24 +70487,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w11, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95095,10 +70503,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95110,35 +70518,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95151,8 +70534,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -95169,15 +70552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95189,7 +70564,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95202,24 +70577,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95232,10 +70593,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95247,35 +70608,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95288,8 +70624,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -95306,28 +70642,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95354,15 +70670,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "str s2, [x20]", + "add w20, w10, w4", + "ldr s2, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95390,8 +70700,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95422,10 +70730,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "ldr s3, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95437,7 +70742,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95450,24 +70755,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w11, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95480,10 +70771,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95495,23 +70786,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95542,15 +70819,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s3, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95562,7 +70831,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95575,18 +70844,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95598,7 +70859,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95611,11 +70872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95630,8 +70889,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95643,18 +70902,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95667,10 +70917,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -95685,16 +70935,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95721,13 +70962,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95756,16 +70991,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "add w20, w10, w4", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95777,7 +71004,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95790,11 +71017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95807,10 +71032,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95825,11 +71050,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "ldr s3, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95841,7 +71063,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95854,18 +71076,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95877,7 +71091,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95890,11 +71104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95909,8 +71121,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95922,19 +71134,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x8, #468]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95947,10 +71150,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -95965,15 +71168,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldr s3, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95985,7 +71180,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95998,18 +71193,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96021,7 +71208,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96034,11 +71221,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96053,8 +71238,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96066,18 +71251,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96090,10 +71266,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -96108,16 +71284,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96144,13 +71311,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #208]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96179,15 +71340,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96199,7 +71352,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96212,35 +71365,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96253,10 +71380,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96271,28 +71398,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc0 (192)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96319,13 +71426,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #192]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #212]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96354,20 +71455,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96380,10 +71467,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96398,11 +71485,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96429,13 +71512,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #216]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96464,20 +71541,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96490,10 +71553,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96508,11 +71571,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc8 (200)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96539,13 +71598,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #200]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96574,16 +71627,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "add w20, w5, w4", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96595,7 +71640,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96608,11 +71653,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96625,10 +71668,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -96643,11 +71686,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96674,19 +71713,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", + "mov w20, #0x1", "add w6, w6, #0x1 (1)", - "ldr w20, [x8, #28]", - "eor w27, w6, w20", - "subs w26, w6, w20", + "ldr w21, [x8, #28]", + "eor w27, w6, w21", + "subs w26, w6, w21", "cfinv", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96715,17 +71748,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96737,7 +71762,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96750,11 +71775,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96767,10 +71790,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -96785,11 +71808,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96816,17 +71836,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w4, w20, w4", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w4, w21, w4", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96855,15 +71867,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", + "ldr s4, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96875,7 +71879,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96888,11 +71892,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96905,10 +71907,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -96923,11 +71925,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96955,13 +71952,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x8, #476]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #232]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96990,20 +71981,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97016,10 +71993,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97034,11 +72011,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xdc (220)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97065,13 +72038,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #220]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #236]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97100,20 +72067,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97126,10 +72079,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97144,11 +72097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe0 (224)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97175,13 +72124,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #224]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #240]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97210,20 +72153,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97236,10 +72165,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97254,11 +72183,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe4 (228)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97285,13 +72210,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #228]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #220]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97320,16 +72239,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w9", - "ldr s2, [x23]", + "add w21, w5, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97341,7 +72252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97354,11 +72265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97371,10 +72280,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -97389,11 +72298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97420,14 +72325,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #224]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97456,17 +72354,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w9", - "ldr s2, [x23]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97478,7 +72368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97491,11 +72381,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97508,10 +72396,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -97526,11 +72414,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97557,15 +72442,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #228]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97594,17 +72471,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x8 (8)", - "add w23, w23, w9", - "ldr s2, [x23]", + "add w21, w5, #0x8 (8)", + "add w21, w21, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97616,7 +72485,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97629,11 +72498,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97646,10 +72513,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -97664,11 +72531,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x8 (8)", + "add w21, w21, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97695,15 +72559,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x8 (8)", - "add w23, w23, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97732,20 +72588,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97758,10 +72600,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97776,11 +72618,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97807,13 +72645,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97842,20 +72674,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97868,10 +72686,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97886,11 +72704,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97917,13 +72731,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97952,20 +72760,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97978,10 +72772,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97996,11 +72790,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98027,15 +72817,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "str s2, [x21]", + "add w21, w5, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98063,15 +72847,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "ldr s4, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98083,7 +72859,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98096,11 +72872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98113,10 +72887,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98131,11 +72905,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98162,14 +72932,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98198,17 +72961,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98220,7 +72975,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98233,11 +72988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98250,10 +73003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98268,11 +73021,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98299,17 +73049,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w4, w20, w4", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w4, w21, w4", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98338,15 +73080,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98358,7 +73092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98371,11 +73105,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98388,10 +73120,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98406,11 +73138,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98438,13 +73165,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x8, #480]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98473,20 +73194,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98499,10 +73206,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -98517,11 +73224,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98548,13 +73251,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98583,20 +73280,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98609,10 +73292,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -98627,11 +73310,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98658,13 +73337,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98693,8 +73366,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98725,11 +73396,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98756,15 +73423,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "str s2, [x21]", + "add w21, w5, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98792,15 +73453,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98812,7 +73465,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98825,11 +73478,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98842,10 +73493,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98860,11 +73511,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98891,14 +73538,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98927,17 +73567,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98949,7 +73581,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98962,11 +73594,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98979,10 +73609,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98997,11 +73627,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99028,17 +73655,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w5, w20, w4", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w5, w21, w4", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99067,15 +73686,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "ldr s3, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99087,7 +73698,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -99100,11 +73711,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99117,10 +73726,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -99135,11 +73744,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99167,16 +73771,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1019]", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w20, w21", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "Block9": { - "ExpectedInstructionCount": 295, + "ExpectedInstructionCount": 251, "x86Insts": [ "fld dword [edi]", "fmul st0", @@ -99440,7 +74045,6 @@ "mov dword [esp + 0x54],edx" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99469,22 +74073,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99497,8 +74085,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -99515,11 +74103,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99546,13 +74130,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99581,17 +74159,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0xf928", - "movk w23, #0xa2, lsl #16", - "ldr d2, [x23]", + "mov w20, #0xf928", + "movk w20, #0xa2, lsl #16", + "ldr d3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99603,7 +74173,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1432]", "blr x1", @@ -99616,11 +74186,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99633,10 +74201,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -99651,11 +74219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99682,13 +74246,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99717,28 +74275,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "mov w20, #0x4fe2", + "movk w20, #0x1, lsl #16", + "mov w21, #0x2c11", + "movk w21, #0x98, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", + "ldrb w20, [x28, #1019]", + "mov w22, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "mov w20, #0x4fe2", - "movk w20, #0x1, lsl #16", - "mov w22, #0x2c11", - "movk w22, #0x98, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w23, [x28, #1298]", + "lsl w20, w22, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block10": { - "ExpectedInstructionCount": 1268, + "ExpectedInstructionCount": 450, "x86Insts": [ "fld dword [0x00b42a74]", "push ecx", @@ -99948,91 +74509,92 @@ "pop ebp" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x2a74", - "movk w21, #0xb4, lsl #16", - "ldr s2, [x21]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "mov w20, #0x2a74", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", "str w5, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w22, #0x2a20", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov w20, #0x2a20", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", "add w5, w8, #0x48 (72)", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a78", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "mov w20, #0x2a78", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a24", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a7c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a28", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a68", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a2c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a6c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a30", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a70", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a34", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a5c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a38", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a60", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a3c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a64", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a40", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a50", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a44", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a54", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a48", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a58", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a4c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "add w20, w8, #0x48 (72)", + "ldrb w21, [x28, #1019]", + "add w21, w21, #0x7 (7)", + "and w21, w21, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100044,10 +74606,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100057,17 +74620,76 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", + "fmov s2, s0", + "str s2, [x20]", + "add w20, w8, #0x58 (88)", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "add w20, w8, #0x68 (104)", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldrb w20, [x28, #1298]", + "lsl w22, w23, w21", + "bic w20, w20, w22", + "strb w20, [x28, #1298]", + "add w20, w21, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100096,1045 +74718,164 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a24", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "add w21, w8, #0x50 (80)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w8, #0x54 (84)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w8, #0x5c (92)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w8, #0x60 (96)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w8, #0x64 (100)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a7c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a28", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a68", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a2c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a6c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a30", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a70", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a34", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a5c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a38", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a60", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a3c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a64", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a40", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a50", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a44", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a54", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a48", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a58", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a4c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101165,12 +74906,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101200,20 +74942,21 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x54a9", "movk w20, #0x1, lsl #16", - "mov w22, #0x39db", - "movk w22, #0x79, lsl #16", - "add w22, w20, w22", + "mov w21, #0x39db", + "movk w21, #0x79, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json index 7e6065ad5..82feaa352 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 20545, + "ExpectedInstructionCount": 16357, "x86Insts": [ "sub esp,0x88", "fld dword [ecx + 0x4]", @@ -538,7 +538,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x88 (136)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -567,18 +566,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x5, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #16]", + "ldr s3, [x5, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -590,7 +579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -603,19 +592,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "str w6, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #20]", + "ldr s4, [x5, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -627,7 +608,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -640,19 +621,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w6, [x5, #28]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #32]", + "ldr s5, [x5, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -664,7 +637,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -677,19 +650,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "str w6, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #36]", + "ldr s6, [x5, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -701,7 +666,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -714,18 +679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -737,7 +694,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -750,18 +707,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -773,7 +722,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -786,11 +735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -803,10 +750,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -818,13 +765,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -836,7 +780,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -849,18 +793,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -872,7 +808,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -885,11 +821,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -902,10 +836,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -917,13 +851,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -935,7 +866,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -948,18 +879,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -971,7 +894,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -984,11 +907,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1001,10 +922,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1016,14 +937,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1036,8 +953,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1049,15 +966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1069,7 +980,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1082,18 +993,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1105,7 +1008,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1118,11 +1021,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1135,10 +1036,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1150,14 +1051,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1170,8 +1066,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1183,15 +1079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1203,7 +1093,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1216,18 +1106,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1239,7 +1121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1252,11 +1134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1269,10 +1149,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1284,18 +1164,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1308,8 +1179,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1323,14 +1194,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1343,8 +1210,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1356,15 +1223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1376,7 +1237,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1389,18 +1250,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1412,7 +1265,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1425,11 +1278,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1442,10 +1293,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1457,18 +1308,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1481,8 +1323,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1496,14 +1338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,8 +1353,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1529,15 +1366,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1549,7 +1380,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1562,23 +1393,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1591,10 +1408,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1606,14 +1423,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1626,8 +1439,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1639,15 +1452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1659,7 +1466,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1672,23 +1479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1701,10 +1494,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1716,14 +1509,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1736,8 +1525,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1749,27 +1538,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s9, s0", + "str s9, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1781,7 +1553,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1794,11 +1566,14958 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s10", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s10", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s10", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s10", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s10", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr s9, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s10", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x8]", + "ldr s5, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "ldr s7, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr s7, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x8]", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr s6, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x4]", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1826,77 +16545,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1911,9 +16563,92 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -1924,113 +16659,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2045,8 +16677,63 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2061,209 +16748,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2290,147 +16775,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2459,15 +16804,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2479,7 +16816,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2492,1098 +16829,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3614,16 +16862,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3650,17442 +16889,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #124]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "adds w26, w8, #0x88 (136)", - "strb w21, [x28, #1298]", "mov x27, x8", - "mov x8, x26" + "mov x8, x26", + "strb wzr, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 17381, + "ExpectedInstructionCount": 14021, "x86Insts": [ "sub esp,0x90", "fld dword [ecx + 0x4]", @@ -21524,7 +17336,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x90 (144)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21553,29 +17364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "ldr s3, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21587,7 +17376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21600,3683 +17389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25293,7 +17408,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25304,19 +17419,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25328,11 +17434,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -25342,20 +17447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25370,9 +17464,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25383,30 +17477,981 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25419,287 +18464,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25711,30 +18479,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25747,8 +18495,3830 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -25762,30 +22332,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25798,8 +22348,65 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -25813,18 +22420,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25837,8 +22436,2831 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -25852,19 +25274,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25877,8 +25290,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25890,32 +25303,150 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x8]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s6, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25930,9 +25461,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25943,30 +25474,38 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25979,49 +25518,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26033,118 +25533,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26159,8 +25551,91 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26172,78 +25647,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26258,140 +25665,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26403,863 +25676,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27272,10 +25691,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27287,91 +25706,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27386,8 +25724,91 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27399,113 +25820,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27520,8 +25838,91 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27533,78 +25934,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27619,8 +25952,91 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27632,30 +26048,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27670,8 +26066,205 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27683,18 +26276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27709,41 +26294,6 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27755,20 +26305,64 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27783,8 +26377,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27796,18 +26390,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27819,90 +26405,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27915,18 +26418,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27938,7 +26433,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27951,11 +26446,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27968,10 +26461,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27983,13 +26476,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28001,7 +26491,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28014,18 +26504,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28037,7 +26519,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28050,11 +26532,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28067,10 +26547,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28082,30 +26562,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28118,82 +26578,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28205,20 +26591,64 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28231,10 +26661,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28246,18 +26676,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28270,43 +26692,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28318,29 +26705,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28352,7 +26719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28365,18 +26732,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28388,7 +26747,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28401,11 +26760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28418,10 +26775,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28433,13 +26790,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28451,7 +26805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28464,18 +26818,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28487,7 +26833,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28500,11 +26846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28517,10 +26861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28532,13 +26876,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28550,7 +26891,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28563,18 +26932,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28586,7 +26947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28599,11 +26960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28616,10 +26975,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28631,14 +26990,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28651,8 +27005,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28664,15 +27018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s6, s0", + "str s6, [x8]", + "ldr s6, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28684,7 +27032,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28697,18 +27045,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28720,7 +27060,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28733,11 +27073,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28750,10 +27088,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28765,14 +27103,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28785,8 +27119,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28798,80 +27132,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28884,10 +27146,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28899,13 +27161,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w4, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28917,7 +27176,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28930,47 +27217,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28983,10 +27232,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28998,14 +27247,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w4, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29018,8 +27263,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29031,496 +27276,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29535,8 +27293,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29548,14 +27306,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29568,8 +27322,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29581,29 +27335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29615,7 +27349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29628,11 +27362,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29645,382 +27377,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -30034,19 +27392,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30059,8 +27408,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30072,32 +27421,754 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30125,30 +28196,65 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30161,8 +28267,241 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -30179,55 +28518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30254,5263 +28545,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35539,15 +28574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s4, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35559,7 +28586,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35572,11 +28599,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35589,10 +28614,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35607,10 +28632,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s4, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35622,7 +28644,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35635,18 +28657,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35658,7 +28672,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35671,11 +28685,409 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35690,8 +29102,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35703,14 +29115,65 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35725,241 +29188,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35974,11 +29204,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36005,135 +29231,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36162,43 +29260,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36213,71 +29274,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36292,11 +29290,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36323,151 +29317,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36496,15 +29346,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36516,7 +29358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36529,11 +29371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36546,10 +29386,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36564,11 +29404,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36595,13 +29431,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36630,15 +29460,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36650,7 +29472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36663,11 +29485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36680,10 +29500,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36698,11 +29518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36729,13 +29545,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36764,15 +29574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36784,7 +29586,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36797,11 +29599,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36814,10 +29614,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36832,11 +29632,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36863,13 +29659,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36898,15 +29688,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36918,7 +29700,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36931,11 +29713,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36948,10 +29728,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36966,11 +29746,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36997,13 +29773,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37032,15 +29802,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37052,7 +29814,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37065,11 +29827,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37082,10 +29842,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37100,10 +29860,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldr s3, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37115,7 +29872,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37128,18 +29885,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37151,7 +29900,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37164,11 +29913,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37183,8 +29930,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37196,13 +29943,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37214,7 +29958,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37227,18 +29971,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37250,7 +29986,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37263,11 +29999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37280,10 +30014,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37295,14 +30029,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37315,8 +30045,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37328,15 +30058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37348,7 +30072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37361,18 +30085,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37384,7 +30100,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37397,11 +30113,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37414,10 +30128,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37429,14 +30143,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37449,8 +30159,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37462,15 +30172,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37482,7 +30186,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37495,18 +30199,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37518,7 +30214,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37531,11 +30227,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37548,10 +30242,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37563,13 +30257,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37581,7 +30272,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37594,18 +30285,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37617,7 +30300,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37630,11 +30313,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37647,10 +30328,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37662,14 +30343,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37682,8 +30359,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37695,15 +30372,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37715,7 +30386,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37728,18 +30399,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37751,7 +30414,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37764,11 +30427,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37781,10 +30442,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37796,14 +30457,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37816,8 +30472,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37829,15 +30485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "fmov s5, s0", + "str s5, [x8]", + "ldr s5, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37849,7 +30499,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37862,18 +30512,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37885,7 +30527,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37898,11 +30540,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37915,10 +30555,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37930,14 +30570,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37950,8 +30586,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37963,32 +30599,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38001,8 +30613,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -38016,14 +30628,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38036,8 +30643,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38049,15 +30656,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x4]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38069,7 +30670,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38082,23 +30683,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38111,10 +30698,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38126,14 +30713,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w4, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38146,8 +30729,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38159,32 +30742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38197,10 +30757,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38215,11 +30775,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38246,27 +30802,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38295,8 +30831,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38327,11 +30861,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38358,13 +30888,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38393,15 +30917,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38413,7 +30929,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38426,11 +30942,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38443,10 +30957,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38461,11 +30975,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38492,13 +31002,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38527,15 +31031,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38547,7 +31043,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38560,11 +31056,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38577,10 +31071,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38595,11 +31089,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38626,13 +31116,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38661,15 +31145,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38681,7 +31157,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38694,11 +31170,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38711,10 +31185,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38729,11 +31203,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38760,13 +31230,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38795,15 +31259,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38815,7 +31271,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38828,11 +31284,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38845,10 +31299,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38863,11 +31317,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38894,16 +31344,18 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "mvn w27, w8", "adds w26, w8, #0x90 (144)", - "strb w21, [x28, #1298]", - "mov x8, x26" + "mov x8, x26", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "Block3": { @@ -39734,7 +32186,7 @@ ] }, "Block4": { - "ExpectedInstructionCount": 12319, + "ExpectedInstructionCount": 12313, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -40090,7 +32542,6 @@ ], "ExpectedArm64ASM": [ "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40119,6 +32570,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -40155,7 +32607,6 @@ "str q2, [x0, #1040]", "add w9, w9, #0x10 (16)", "str w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40218,7 +32669,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x6c (108)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40247,15 +32698,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", + "str s2, [x21]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40286,14 +32737,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x9, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40355,7 +32807,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40418,7 +32869,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x68 (104)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40447,13 +32898,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40484,12 +32936,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40552,7 +33005,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40615,7 +33067,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40644,13 +33096,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40681,12 +33134,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40749,7 +33203,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40812,7 +33265,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40841,15 +33294,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", + "mov x23, #0xfffffffffffffff8", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40879,18 +33333,19 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr w9, [x9, w21, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", "str w9, [x8, #56]", "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40921,22 +33376,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "orr w21, w21, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w25, #0x0", - "mov w12, #0x8000", - "fmov d3, x25", - "mov v3.d[1], x12", + "mov w24, #0x0", + "mov w25, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x3c (60)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40965,14 +33421,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41002,13 +33459,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41070,7 +33528,112 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldr s2, [x11, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x24", + "mov v3.d[1], x25", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr s2, [x6, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41101,20 +33664,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41177,8 +33733,44 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "add w12, w8, #0x14 (20)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41208,13 +33800,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41276,7 +33869,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41305,147 +33898,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w13, w22, w20", - "bic w21, w21, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41476,12 +33936,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41544,7 +34005,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41573,13 +34034,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41610,20 +34072,20 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41686,7 +34148,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41715,13 +34177,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41752,12 +34215,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41820,7 +34284,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41849,13 +34313,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41886,12 +34351,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41954,7 +34420,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41983,112 +34449,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42119,12 +34487,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42187,43 +34556,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w13, w22, w20", - "bic w21, w21, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42253,13 +34586,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42305,7 +34639,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -42321,7 +34655,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42350,13 +34684,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42387,12 +34722,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42455,7 +34791,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42484,13 +34820,150 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w12, w22, w20", + "bic w23, w23, w12", + "strb w23, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x10, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1298]", + "lsl w12, w22, w20", + "orr w23, w23, w12", + "strb w23, [x28, #1298]", + "ldr s2, [x5, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42521,12 +34994,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42589,7 +35063,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42618,13 +35092,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42655,12 +35130,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42723,7 +35199,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42752,13 +35228,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42789,12 +35266,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42857,7 +35335,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42886,13 +35364,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42923,12 +35402,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42991,7 +35471,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43020,28 +35500,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43077,7 +35557,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43106,25 +35586,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43187,7 +35669,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43216,13 +35698,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43253,12 +35736,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43321,7 +35805,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43351,12 +35834,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43387,12 +35871,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43455,7 +35940,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43484,28 +35969,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43541,7 +36024,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43570,27 +36053,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43621,15 +36108,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43665,7 +36153,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43694,27 +36182,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43745,12 +36227,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43813,7 +36296,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43843,12 +36325,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43879,12 +36362,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43947,7 +36431,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43976,13 +36460,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44013,12 +36498,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44081,7 +36567,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44112,12 +36597,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44180,7 +36666,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44211,15 +36696,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44255,7 +36741,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44286,15 +36771,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44330,12 +36816,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44349,10 +36834,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -44367,14 +36852,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -44403,13 +36890,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44440,15 +36928,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44484,7 +36973,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44515,15 +37003,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44559,12 +37048,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44596,14 +37084,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -44632,41 +37122,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44697,12 +37174,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44765,7 +37243,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44796,12 +37273,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44864,22 +37342,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44915,7 +37393,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44946,15 +37423,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44990,12 +37468,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45009,10 +37486,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -45027,14 +37504,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45064,27 +37542,29 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45120,7 +37600,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45151,15 +37630,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45195,12 +37675,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45232,14 +37711,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45268,41 +37749,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45333,12 +37801,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45401,7 +37870,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45432,12 +37900,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45500,7 +37969,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45531,15 +37999,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45576,7 +38045,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45607,15 +38075,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45651,12 +38120,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45688,14 +38156,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45724,13 +38194,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45761,15 +38232,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45805,7 +38277,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45836,15 +38307,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45880,12 +38352,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45899,10 +38370,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -45917,14 +38388,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45953,41 +38426,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46018,12 +38478,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46086,7 +38547,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46117,12 +38577,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46185,7 +38646,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46216,15 +38676,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46260,7 +38721,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46291,15 +38751,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46335,12 +38796,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46372,14 +38832,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -46409,12 +38870,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46445,15 +38907,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46489,7 +38952,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46520,15 +38982,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46564,12 +39027,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46583,10 +39045,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -46601,14 +39063,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -46637,41 +39101,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46702,13 +39153,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46772,7 +39224,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46803,21 +39254,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46881,7 +39332,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46912,13 +39362,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46981,7 +39432,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47010,13 +39461,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47047,13 +39499,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47117,7 +39570,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47146,13 +39599,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47183,13 +39637,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47252,7 +39707,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47281,13 +39736,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47318,21 +39774,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47396,7 +39852,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47425,13 +39881,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47462,13 +39919,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47531,7 +39989,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47560,13 +40018,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47597,13 +40056,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47667,7 +40127,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47696,13 +40156,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47733,12 +40194,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47801,7 +40263,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47832,12 +40293,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47900,7 +40362,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47929,13 +40391,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47966,12 +40429,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48034,7 +40498,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48063,13 +40527,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48100,12 +40565,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48168,7 +40634,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48197,13 +40663,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48234,12 +40701,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48302,7 +40770,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48331,13 +40799,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48368,12 +40837,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48436,7 +40906,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48465,13 +40935,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48502,12 +40973,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48570,7 +41042,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48599,13 +41071,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48636,13 +41109,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48705,7 +41179,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48734,28 +41208,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -48791,7 +41265,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48820,25 +41294,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48901,7 +41377,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48930,13 +41406,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48967,12 +41444,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49035,7 +41513,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49065,12 +41542,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49101,12 +41579,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49169,7 +41648,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49198,29 +41677,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49256,7 +41733,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49285,27 +41762,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49336,15 +41817,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49380,7 +41862,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49409,27 +41891,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49460,12 +41936,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49528,7 +42005,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49558,12 +42034,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49594,12 +42071,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49662,7 +42140,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49691,14 +42169,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49729,12 +42208,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49797,7 +42277,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49828,12 +42307,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49896,7 +42376,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49927,15 +42406,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49971,7 +42451,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50002,15 +42481,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50046,12 +42526,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50065,10 +42544,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50083,14 +42562,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50119,13 +42600,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50156,15 +42638,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50200,7 +42683,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50231,15 +42713,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50275,12 +42758,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50312,14 +42794,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50348,41 +42832,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50413,12 +42884,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50481,7 +42953,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50512,12 +42983,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50580,7 +43052,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50611,15 +43082,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50655,22 +43127,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50706,12 +43178,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50725,10 +43196,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50743,14 +43214,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50780,13 +43252,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50817,16 +43290,17 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "str w9, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50863,23 +43337,23 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w5, w5, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "add w6, w6, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50917,12 +43391,11 @@ "str q2, [x0, #1040]", "add w10, w10, #0x10 (16)", "add w11, w11, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50954,15 +43427,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "sub w7, w7, #0x10 (16)", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50991,45 +43466,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51060,14 +43522,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "subs w9, w9, #0x10 (16)", "cfinv", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51131,7 +43594,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51162,13 +43624,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51231,12 +43694,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "cset w20, hs", + "cset w21, hs", "subs w26, w9, #0x1 (1)", - "rmif x20, #63, #nzCv", + "rmif x21, #63, #nzCv", "mov x27, x9", "mov x9, x26", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51267,16 +43729,17 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "str w9, [x8, #124]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51312,7 +43775,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51343,15 +43805,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51387,12 +43850,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51424,14 +43886,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -51460,13 +43924,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51497,15 +43962,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51541,7 +44007,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51572,15 +44037,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51616,12 +44082,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51635,10 +44100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51653,14 +44118,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -51689,41 +44156,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51754,12 +44208,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51822,7 +44277,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51853,12 +44307,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51921,7 +44376,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51952,15 +44406,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51996,7 +44451,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52027,15 +44481,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52071,12 +44526,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52108,14 +44562,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52144,13 +44600,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52181,15 +44638,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52225,7 +44683,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52256,15 +44713,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52300,12 +44758,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52319,10 +44776,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -52337,14 +44794,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52373,45 +44832,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block5": { - "ExpectedInstructionCount": 12238, + "ExpectedInstructionCount": 12248, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -52762,7 +45208,6 @@ ], "ExpectedArm64ASM": [ "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52791,6 +45236,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -52827,7 +45273,6 @@ "str q2, [x0, #1040]", "add w9, w9, #0x10 (16)", "str w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52890,7 +45335,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x6c (108)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52919,15 +45364,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", + "str s2, [x21]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52958,14 +45403,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x9, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53027,7 +45473,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53090,7 +45535,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x68 (104)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53119,13 +45564,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53156,12 +45602,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53224,7 +45671,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53287,7 +45733,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x30 (48)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53316,13 +45762,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53353,12 +45800,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53421,7 +45869,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53484,7 +45931,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53513,15 +45960,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", + "mov x23, #0xfffffffffffffff8", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53551,18 +45999,19 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr w9, [x9, w21, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", "str w9, [x8, #56]", "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53593,22 +46042,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w25, #0x0", - "mov w12, #0x8000", - "fmov d3, x25", - "mov v3.d[1], x12", + "mov w24, #0x0", + "mov w25, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x3c (60)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53637,148 +46087,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53807,6 +46123,43 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x11, w23, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -53841,8 +46194,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53872,13 +46224,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53924,7 +46277,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -53940,42 +46293,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w25, w22, w20", - "bic w21, w21, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54006,12 +46323,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54074,7 +46392,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54103,13 +46421,150 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x11, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x6, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x1c (28)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54140,12 +46595,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54208,7 +46664,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54237,13 +46693,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54274,12 +46731,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54342,7 +46800,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54371,13 +46829,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54408,12 +46867,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54476,7 +46936,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54505,13 +46965,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54542,12 +47003,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54610,7 +47072,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54639,112 +47101,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54775,12 +47139,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54843,43 +47208,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w25, w22, w20", - "bic w21, w21, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54909,13 +47238,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54961,7 +47291,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -54977,7 +47307,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55006,13 +47336,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55043,12 +47374,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55111,7 +47443,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55140,13 +47472,150 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x10, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "ldr s2, [x5, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55177,12 +47646,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55245,7 +47715,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55274,13 +47744,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55311,12 +47782,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55379,7 +47851,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55408,13 +47880,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55445,12 +47918,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55513,7 +47987,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55542,13 +48016,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55579,12 +48054,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55647,7 +48123,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55676,28 +48152,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55733,7 +48209,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55762,13 +48238,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w24, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55799,15 +48276,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55843,7 +48321,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55872,13 +48350,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w23, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55909,12 +48388,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55977,7 +48457,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56007,12 +48486,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56043,12 +48523,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56111,7 +48592,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56140,28 +48621,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, #4]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56197,7 +48676,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56226,27 +48705,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w24, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56309,7 +48792,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56338,13 +48821,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w23, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56375,12 +48859,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56443,7 +48928,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56473,12 +48957,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56509,12 +48994,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56577,7 +49063,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56606,13 +49092,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, #4]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56643,12 +49130,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56711,7 +49199,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56742,12 +49229,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56810,7 +49298,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56841,15 +49328,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56885,7 +49373,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56916,15 +49403,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56960,12 +49448,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56979,10 +49466,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -56997,14 +49484,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57033,13 +49522,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w24, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57070,15 +49560,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57114,7 +49605,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57145,15 +49635,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57189,12 +49680,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57226,14 +49716,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57262,41 +49754,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w23, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57327,12 +49806,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57395,7 +49875,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57426,12 +49905,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57494,22 +49974,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57545,7 +50025,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57576,15 +50055,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57620,12 +50100,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57639,10 +50118,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -57657,14 +50136,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57694,27 +50174,29 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57750,7 +50232,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57781,15 +50262,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57825,12 +50307,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57862,14 +50343,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57898,41 +50381,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57963,12 +50433,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58031,7 +50502,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58062,12 +50532,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58130,7 +50601,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58161,15 +50631,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58205,7 +50676,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58236,15 +50706,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58280,12 +50751,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58317,15 +50787,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -58354,13 +50826,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58391,15 +50864,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58435,7 +50909,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58466,15 +50939,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58510,12 +50984,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58529,10 +51002,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -58547,14 +51020,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -58583,41 +51058,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58648,12 +51110,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58716,7 +51179,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58747,12 +51209,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58815,7 +51278,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58846,15 +51308,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58890,7 +51353,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58921,15 +51383,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58965,12 +51428,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59002,14 +51464,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59039,12 +51502,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59075,15 +51539,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59119,7 +51584,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59150,15 +51614,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59194,12 +51659,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59213,10 +51677,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -59231,14 +51695,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59267,41 +51733,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59332,13 +51785,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59402,7 +51856,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59433,13 +51886,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59503,7 +51957,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59534,13 +51987,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59604,7 +52058,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59633,13 +52087,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59670,13 +52125,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59740,7 +52196,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59769,13 +52225,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59806,13 +52263,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59876,7 +52334,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59905,13 +52363,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59942,13 +52401,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60012,7 +52472,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60041,13 +52501,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60078,13 +52539,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60148,7 +52610,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60177,13 +52639,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60214,13 +52677,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60284,7 +52748,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60313,13 +52777,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60350,12 +52815,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60418,7 +52884,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60449,12 +52914,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60517,7 +52983,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60546,13 +53012,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60583,12 +53050,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60651,7 +53119,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60680,13 +53148,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60717,12 +53186,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60785,7 +53255,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60814,13 +53284,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60851,12 +53322,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60919,7 +53391,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60948,13 +53420,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60985,12 +53458,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61053,7 +53527,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61082,13 +53556,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61119,12 +53594,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61187,7 +53663,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61216,13 +53692,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61253,13 +53730,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61322,7 +53800,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61351,28 +53829,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61408,7 +53886,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61437,13 +53915,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61474,15 +53953,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61518,7 +53998,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61547,13 +54027,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61584,12 +54065,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61652,7 +54134,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61682,12 +54163,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61718,12 +54200,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61786,7 +54269,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61815,29 +54298,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61873,7 +54354,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61902,27 +54383,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61985,7 +54470,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62014,13 +54499,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62051,12 +54537,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62119,7 +54606,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62149,12 +54635,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62185,12 +54672,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62253,7 +54741,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62282,14 +54770,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62320,12 +54809,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62388,7 +54878,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62419,12 +54908,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62487,7 +54977,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62518,15 +55007,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62562,7 +55052,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62593,15 +55082,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62637,12 +55127,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62656,10 +55145,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -62674,14 +55163,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62710,13 +55201,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62747,15 +55239,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62791,7 +55284,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62822,15 +55314,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62866,12 +55359,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62903,14 +55395,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62939,41 +55433,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63004,12 +55485,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63072,7 +55554,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63103,12 +55584,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63171,7 +55653,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63202,15 +55683,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63246,22 +55728,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63297,12 +55779,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63316,10 +55797,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -63334,14 +55815,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -63371,12 +55853,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63407,15 +55890,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63451,22 +55935,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63505,12 +55989,11 @@ "sub w9, w9, #0x10 (16)", "str w9, [x8, #40]", "add w5, w5, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63542,16 +56025,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "add w6, w6, #0x10 (16)", "add w10, w10, #0x10 (16)", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -63580,45 +56065,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63649,13 +56121,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63719,7 +56192,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63750,13 +56222,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63820,7 +56293,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w11, w11, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63851,22 +56323,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "subs w7, w7, #0x10 (16)", "cfinv", - "cset w20, hs", + "cset w21, hs", "subs w26, w9, #0x1 (1)", - "rmif x20, #63, #nzCv", + "rmif x21, #63, #nzCv", "mov x27, x9", "mov x9, x26", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63903,7 +56376,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63934,15 +56406,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63978,12 +56451,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64015,14 +56487,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64051,13 +56525,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64088,15 +56563,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64132,7 +56608,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64163,15 +56638,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64207,12 +56683,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64226,10 +56701,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64244,14 +56719,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64280,41 +56757,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64345,12 +56809,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64413,7 +56878,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64444,12 +56908,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64512,7 +56977,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64543,15 +57007,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64587,7 +57052,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64618,15 +57082,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64662,12 +57127,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64699,14 +57163,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64735,13 +57201,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64772,15 +57239,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64816,7 +57284,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64847,15 +57314,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64891,12 +57359,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64910,10 +57377,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64928,14 +57395,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64964,45 +57433,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block6": { - "ExpectedInstructionCount": 10994, + "ExpectedInstructionCount": 7575, "x86Insts": [ "mov eax,dword [ebp + 0x10]", "fld dword [eax + 0x30]", @@ -65416,7 +57872,6 @@ ], "ExpectedArm64ASM": [ "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65445,18 +57900,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65468,7 +57913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65481,23 +57926,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65510,10 +57941,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65528,16 +57959,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65549,7 +57972,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65562,19 +57985,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65586,7 +58001,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65599,23 +58014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65630,8 +58031,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65643,23 +58044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65672,10 +58059,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65690,16 +58077,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65711,7 +58090,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65724,19 +58103,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65748,7 +58119,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65761,23 +58132,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65792,8 +58149,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65805,23 +58162,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65834,10 +58177,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65852,16 +58195,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65873,7 +58208,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65886,19 +58221,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65910,7 +58237,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65923,23 +58250,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65954,8 +58267,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65967,23 +58280,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65996,10 +58295,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66014,16 +58313,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xffffffffffffffd0", + "sub w21, w9, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66050,15 +58341,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd0", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66087,16 +58371,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66108,7 +58384,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66121,23 +58397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66150,10 +58412,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66168,16 +58430,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66189,7 +58443,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66202,19 +58456,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66226,7 +58472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66239,23 +58485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66270,8 +58502,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66283,23 +58515,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66312,10 +58530,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66330,16 +58548,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66351,7 +58561,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66364,19 +58574,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66388,7 +58590,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66401,23 +58603,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66432,8 +58620,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66445,23 +58633,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66474,10 +58648,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66492,16 +58666,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66513,7 +58679,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66526,19 +58692,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66550,7 +58708,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66563,23 +58721,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66594,8 +58738,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66607,23 +58751,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66636,10 +58766,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66654,16 +58784,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xffffffffffffffd4", + "sub w22, w9, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66690,15 +58812,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd4", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66727,16 +58842,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66748,7 +58855,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66761,23 +58868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66790,10 +58883,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66808,16 +58901,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66829,7 +58914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66842,19 +58927,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66866,7 +58943,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66879,23 +58956,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66910,8 +58973,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66923,23 +58986,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66952,10 +59001,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66970,16 +59019,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66991,7 +59032,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67004,19 +59045,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67028,7 +59061,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67041,23 +59074,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67072,8 +59091,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67085,23 +59104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67114,10 +59119,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67132,16 +59137,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67153,7 +59150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67166,19 +59163,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67190,7 +59179,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67203,23 +59192,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67234,8 +59209,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67247,23 +59222,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67276,10 +59237,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67294,16 +59255,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x22, #0xffffffffffffffd8", + "sub w23, w9, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67330,15 +59283,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffd8", - "str s2, [x9, w25, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x23]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67367,16 +59313,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67388,7 +59326,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67401,23 +59339,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67430,10 +59354,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67448,16 +59372,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67469,7 +59385,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67482,19 +59398,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67506,7 +59414,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67519,23 +59427,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67550,8 +59444,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67563,23 +59457,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67592,10 +59472,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67610,16 +59490,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67631,7 +59503,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67644,18 +59516,246 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", + "ldr s4, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov x23, #0xffffffffffffffdc", + "sub w24, w9, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr w4, [x9, #16]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67684,141 +59784,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67830,7 +59797,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67843,23 +59810,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67872,10 +59825,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67890,20 +59843,64 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67918,8 +59915,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67934,16 +59961,244 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov x24, #0xffffffffffffffe0", + "sub w25, w9, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67970,15 +60225,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffdc", - "str s2, [x9, w12, sxtw]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68007,16 +60255,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68028,7 +60268,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68041,23 +60281,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68070,10 +60296,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68088,16 +60314,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68109,7 +60327,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68122,19 +60340,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68146,7 +60356,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68159,23 +60369,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68190,8 +60386,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68203,23 +60399,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68232,10 +60414,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68250,16 +60432,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68271,7 +60445,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68284,19 +60458,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68308,7 +60474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68321,23 +60487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68352,8 +60504,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68365,23 +60517,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68394,10 +60532,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68412,16 +60550,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68433,7 +60563,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68446,19 +60576,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68470,7 +60592,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68483,23 +60605,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68514,8 +60622,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68527,23 +60635,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68556,10 +60650,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68574,16 +60668,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x25, #0xffffffffffffffe4", + "sub w12, w9, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68610,15 +60696,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe0", - "str s2, [x9, w13, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68647,16 +60726,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68668,7 +60739,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68681,23 +60752,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68710,10 +60767,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68728,16 +60785,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68749,7 +60798,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68762,19 +60811,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68786,7 +60827,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68799,23 +60840,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68830,8 +60857,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68843,23 +60870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68872,10 +60885,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68890,16 +60903,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68911,7 +60916,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68924,19 +60929,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68948,7 +60945,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68961,23 +60958,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68992,8 +60975,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69005,23 +60988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69034,10 +61003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69052,16 +61021,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69073,7 +61034,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69086,19 +61047,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69110,7 +61063,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69123,23 +61076,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69154,8 +61093,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69167,23 +61106,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69196,10 +61121,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69214,16 +61139,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x12, #0xffffffffffffffe8", + "sub w13, w9, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69250,15 +61167,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe4", - "str s2, [x9, w14, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69287,16 +61197,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69308,7 +61210,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69321,23 +61223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69350,10 +61238,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69368,16 +61256,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69389,7 +61269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69402,19 +61282,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69426,7 +61298,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69439,23 +61311,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69470,8 +61328,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69483,23 +61341,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69512,10 +61356,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69530,16 +61374,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69551,7 +61387,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69564,19 +61400,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69588,7 +61416,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69601,23 +61429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69632,8 +61446,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69645,23 +61459,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69674,10 +61474,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69692,16 +61492,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69713,7 +61505,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69726,19 +61518,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69750,7 +61534,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69763,23 +61547,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69794,8 +61564,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69807,23 +61577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69836,10 +61592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69854,16 +61610,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x13, #0xffffffffffffffec", + "sub w14, w9, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69890,170 +61638,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffe8", - "str s2, [x9, w15, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x14]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70082,141 +61668,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70228,7 +61681,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70241,23 +61694,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70270,10 +61709,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70288,60 +61727,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70353,7 +61740,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70366,19 +61753,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70390,7 +61769,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70403,23 +61782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70434,8 +61799,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70447,23 +61812,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70476,10 +61827,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70494,16 +61845,244 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov x14, #0xfffffffffffffff0", + "sub w15, w9, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70530,15 +62109,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xffffffffffffffec", - "str s2, [x9, w16, sxtw]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x15]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70567,16 +62139,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70588,7 +62152,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70601,23 +62165,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70630,10 +62180,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70648,16 +62198,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70669,7 +62211,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70682,19 +62224,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70706,7 +62240,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70719,23 +62253,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70750,8 +62270,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70763,23 +62283,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70792,10 +62298,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70810,16 +62316,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70831,7 +62329,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70844,19 +62342,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70868,7 +62358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70881,23 +62371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70912,8 +62388,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70925,23 +62401,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70954,10 +62416,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70972,16 +62434,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70993,7 +62447,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71006,19 +62460,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71030,7 +62476,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71043,23 +62489,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71074,8 +62506,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71087,23 +62519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71116,10 +62534,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71134,16 +62552,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x15, #0xfffffffffffffff4", + "sub w16, w9, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71170,15 +62580,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x17, #0xfffffffffffffff0", - "str s2, [x9, w17, sxtw]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x16]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71207,16 +62610,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71228,7 +62623,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71241,549 +62636,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71798,122 +62653,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x29, #0xfffffffffffffff4", - "str s2, [x9, w29, sxtw]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71928,16 +62669,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71949,7 +62682,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71962,19 +62695,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71986,7 +62711,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71999,23 +62724,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72030,8 +62741,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72043,3443 +62754,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75494,41 +62771,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -75541,16 +62787,94 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75565,41 +62889,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -75612,16 +62905,94 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75636,41 +63007,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -75683,16 +63023,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75704,41 +63036,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75751,19 +63049,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75775,41 +63065,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75822,19 +63078,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75847,10 +63093,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -75860,15 +63108,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75880,7 +63124,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75893,19 +63137,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75917,41 +63153,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75964,19 +63166,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75989,10 +63181,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -76002,15 +63196,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76022,7 +63210,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76035,19 +63255,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76059,41 +63271,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76106,19 +63284,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76131,10 +63299,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -76144,28 +63314,1957 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x9, w20, sxtw]", + "add w20, w8, #0x40 (64)", + "str s8, [x20]", + "ldr s8, [x9, w21, sxtw]", + "add w20, w8, #0x3c (60)", + "str s8, [x20]", + "ldr s8, [x9, w22, sxtw]", + "add w20, w8, #0x38 (56)", + "str s8, [x20]", + "ldr s8, [x9, w23, sxtw]", + "add w20, w8, #0x34 (52)", + "str s8, [x20]", + "ldr s8, [x9, w24, sxtw]", + "add w20, w8, #0x30 (48)", + "str s8, [x20]", + "ldr s8, [x9, w25, sxtw]", + "add w20, w8, #0x2c (44)", + "str s8, [x20]", + "ldr s8, [x9, w12, sxtw]", + "add w20, w8, #0x28 (40)", + "str s8, [x20]", + "ldr s8, [x9, w13, sxtw]", + "add w20, w8, #0x24 (36)", + "str s8, [x20]", + "ldr s8, [x9, w14, sxtw]", + "add w20, w8, #0x20 (32)", + "str s8, [x20]", + "ldr s8, [x9, w15, sxtw]", + "add w20, w8, #0x1c (28)", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76192,27 +65291,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76225,8 +65306,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76239,27 +65320,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76272,8 +65335,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76286,15 +65349,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76307,8 +65363,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76321,15 +65377,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76342,8 +65391,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76356,15 +65405,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76377,8 +65419,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -76391,28 +65433,23 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "str w7, [x8]", "mov w20, #0x26ea", "movk w20, #0x1, lsl #16", - "mov w22, #0xd118", - "movk w22, #0x818, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd118", + "movk w21, #0x818, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "strb wzr, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block7": { - "ExpectedInstructionCount": 11002, + "ExpectedInstructionCount": 7583, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -76843,7 +65880,6 @@ "mov x8, x26", "ldr w7, [x9, #8]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76872,18 +65908,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76895,7 +65921,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76908,23 +65934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76937,10 +65949,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -76955,16 +65967,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -76976,7 +65980,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -76989,19 +65993,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77013,7 +66009,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77026,23 +66022,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77057,8 +66039,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77070,23 +66052,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77099,10 +66067,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77117,16 +66085,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77138,7 +66098,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77151,19 +66111,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77175,7 +66127,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77188,23 +66140,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77219,8 +66157,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77232,23 +66170,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77261,10 +66185,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77279,16 +66203,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77300,7 +66216,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77313,19 +66229,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77337,7 +66245,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77350,23 +66258,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77381,8 +66275,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77394,23 +66288,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77423,10 +66303,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77441,16 +66321,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xffffffffffffffd0", + "sub w21, w9, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77477,15 +66349,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd0", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77514,16 +66379,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77535,7 +66392,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77548,23 +66405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77577,10 +66420,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77595,16 +66438,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77616,7 +66451,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77629,19 +66464,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77653,7 +66480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77666,23 +66493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77697,8 +66510,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77710,23 +66523,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77739,10 +66538,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77757,16 +66556,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77778,7 +66569,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77791,19 +66582,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77815,7 +66598,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77828,23 +66611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77859,8 +66628,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77872,23 +66641,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77901,10 +66656,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77919,16 +66674,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77940,7 +66687,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77953,19 +66700,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77977,7 +66716,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77990,23 +66729,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78021,8 +66746,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78034,23 +66759,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78063,10 +66774,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78081,16 +66792,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xffffffffffffffd4", + "sub w22, w9, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78117,15 +66820,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd4", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78154,16 +66850,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78175,7 +66863,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78188,23 +66876,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78217,10 +66891,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78235,16 +66909,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78256,7 +66922,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78269,19 +66935,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78293,7 +66951,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78306,23 +66964,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78337,8 +66981,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78350,23 +66994,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78379,10 +67009,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78397,16 +67027,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78418,7 +67040,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78431,19 +67053,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78455,7 +67069,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78468,23 +67082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78499,8 +67099,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78512,23 +67112,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78541,10 +67127,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78559,16 +67145,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78580,7 +67158,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78593,19 +67171,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78617,7 +67187,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78630,23 +67200,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78661,8 +67217,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78674,23 +67230,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78703,10 +67245,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78721,16 +67263,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x22, #0xffffffffffffffd8", + "sub w23, w9, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78757,15 +67291,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffd8", - "str s2, [x9, w25, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x23]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78794,16 +67321,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78815,7 +67334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78828,23 +67347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78857,10 +67362,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78875,16 +67380,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78896,7 +67393,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78909,19 +67406,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78933,7 +67422,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78946,23 +67435,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78977,8 +67452,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78990,23 +67465,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79019,10 +67480,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79037,16 +67498,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79058,7 +67511,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79071,18 +67524,246 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", + "ldr s4, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov x23, #0xffffffffffffffdc", + "sub w24, w9, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr w4, [x9, #16]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79111,141 +67792,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79257,7 +67805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79270,23 +67818,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79299,10 +67833,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79317,20 +67851,64 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79345,8 +67923,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79361,16 +67969,244 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov x24, #0xffffffffffffffe0", + "sub w25, w9, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79397,15 +68233,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffdc", - "str s2, [x9, w12, sxtw]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79434,16 +68263,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79455,7 +68276,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79468,23 +68289,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79497,10 +68304,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79515,16 +68322,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79536,7 +68335,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79549,19 +68348,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79573,7 +68364,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79586,23 +68377,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79617,8 +68394,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79630,23 +68407,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79659,10 +68422,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79677,16 +68440,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79698,7 +68453,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79711,19 +68466,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79735,7 +68482,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79748,23 +68495,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79779,8 +68512,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79792,23 +68525,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79821,10 +68540,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79839,16 +68558,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79860,7 +68571,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79873,19 +68584,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79897,7 +68600,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79910,23 +68613,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79941,8 +68630,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79954,23 +68643,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79983,10 +68658,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80001,16 +68676,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x25, #0xffffffffffffffe4", + "sub w12, w9, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80037,15 +68704,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe0", - "str s2, [x9, w13, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80074,16 +68734,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80095,7 +68747,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80108,23 +68760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80137,10 +68775,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80155,16 +68793,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80176,7 +68806,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80189,19 +68819,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80213,7 +68835,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80226,23 +68848,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80257,8 +68865,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80270,23 +68878,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80299,10 +68893,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80317,16 +68911,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80338,7 +68924,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80351,19 +68937,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80375,7 +68953,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80388,23 +68966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80419,8 +68983,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80432,23 +68996,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80461,10 +69011,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80479,16 +69029,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80500,7 +69042,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80513,19 +69055,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80537,7 +69071,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80550,23 +69084,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80581,8 +69101,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80594,23 +69114,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80623,10 +69129,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80641,16 +69147,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x12, #0xffffffffffffffe8", + "sub w13, w9, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80677,15 +69175,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe4", - "str s2, [x9, w14, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80714,16 +69205,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80735,7 +69218,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80748,23 +69231,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80777,10 +69246,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80795,16 +69264,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80816,7 +69277,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80829,19 +69290,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80853,7 +69306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80866,23 +69319,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80897,8 +69336,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80910,23 +69349,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80939,10 +69364,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80957,16 +69382,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80978,7 +69395,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80991,19 +69408,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81015,7 +69424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81028,23 +69437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81059,8 +69454,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81072,23 +69467,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81101,10 +69482,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81119,16 +69500,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81140,7 +69513,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81153,19 +69526,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81177,7 +69542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81190,23 +69555,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81221,8 +69572,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81234,23 +69585,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81263,10 +69600,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81281,16 +69618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x13, #0xffffffffffffffec", + "sub w14, w9, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81317,170 +69646,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffe8", - "str s2, [x9, w15, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x14]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81509,141 +69676,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81655,7 +69689,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81668,23 +69702,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81697,10 +69717,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81715,60 +69735,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81780,7 +69748,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81793,19 +69761,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81817,7 +69777,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81830,23 +69790,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81861,8 +69807,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81874,23 +69820,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81903,10 +69835,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81921,16 +69853,244 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov x14, #0xfffffffffffffff0", + "sub w15, w9, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81957,15 +70117,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xffffffffffffffec", - "str s2, [x9, w16, sxtw]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x15]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81994,16 +70147,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82015,7 +70160,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82028,23 +70173,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82057,10 +70188,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82075,16 +70206,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82096,7 +70219,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82109,19 +70232,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82133,7 +70248,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82146,23 +70261,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82177,8 +70278,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82190,23 +70291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82219,10 +70306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82237,16 +70324,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82258,7 +70337,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82271,19 +70350,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82295,7 +70366,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82308,23 +70379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82339,8 +70396,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82352,23 +70409,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82381,10 +70424,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82399,16 +70442,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82420,7 +70455,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82433,19 +70468,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82457,7 +70484,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82470,23 +70497,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82501,8 +70514,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82514,23 +70527,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82543,10 +70542,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82561,16 +70560,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x15, #0xfffffffffffffff4", + "sub w16, w9, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82597,15 +70588,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x17, #0xfffffffffffffff0", - "str s2, [x9, w17, sxtw]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x16]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -82634,16 +70618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82655,7 +70631,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82668,549 +70644,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83225,122 +70661,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x29, #0xfffffffffffffff4", - "str s2, [x9, w29, sxtw]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83355,16 +70677,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83376,7 +70690,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83389,19 +70703,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83413,7 +70719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83426,23 +70732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83457,8 +70749,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83470,3443 +70762,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86921,41 +70779,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86968,16 +70795,94 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86992,41 +70897,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87039,16 +70913,94 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87063,41 +71015,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87110,16 +71031,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87131,41 +71044,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87178,19 +71057,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87202,41 +71073,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87249,19 +71086,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87274,10 +71101,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87287,15 +71116,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87307,7 +71132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87320,19 +71145,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87344,41 +71161,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87391,19 +71174,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87416,10 +71189,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87429,15 +71204,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87449,7 +71218,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87462,19 +71263,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87486,41 +71279,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87533,19 +71292,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87558,10 +71307,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87571,28 +71322,1957 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x9, w20, sxtw]", + "add w20, w8, #0x40 (64)", + "str s8, [x20]", + "ldr s8, [x9, w21, sxtw]", + "add w20, w8, #0x3c (60)", + "str s8, [x20]", + "ldr s8, [x9, w22, sxtw]", + "add w20, w8, #0x38 (56)", + "str s8, [x20]", + "ldr s8, [x9, w23, sxtw]", + "add w20, w8, #0x34 (52)", + "str s8, [x20]", + "ldr s8, [x9, w24, sxtw]", + "add w20, w8, #0x30 (48)", + "str s8, [x20]", + "ldr s8, [x9, w25, sxtw]", + "add w20, w8, #0x2c (44)", + "str s8, [x20]", + "ldr s8, [x9, w12, sxtw]", + "add w20, w8, #0x28 (40)", + "str s8, [x20]", + "ldr s8, [x9, w13, sxtw]", + "add w20, w8, #0x24 (36)", + "str s8, [x20]", + "ldr s8, [x9, w14, sxtw]", + "add w20, w8, #0x20 (32)", + "str s8, [x20]", + "ldr s8, [x9, w15, sxtw]", + "add w20, w8, #0x1c (28)", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87619,27 +73299,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87652,8 +73314,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87666,27 +73328,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87699,8 +73343,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87713,15 +73357,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87734,8 +73371,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87748,15 +73385,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87769,8 +73399,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87783,15 +73413,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87804,8 +73427,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87818,28 +73441,23 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "str w7, [x8]", "mov w20, #0x2bf5", "movk w20, #0x1, lsl #16", - "mov w22, #0xd10b", - "movk w22, #0x818, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd10b", + "movk w21, #0x818, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "strb wzr, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block8": { - "ExpectedInstructionCount": 8590, + "ExpectedInstructionCount": 8522, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -88074,7 +73692,6 @@ "add esp,0x74" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88103,6 +73720,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -88140,7 +73758,6 @@ "add w6, w5, w5, lsl #1", "add w10, w6, w5, lsl #1", "sub w7, w5, #0x2 (2)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88203,7 +73820,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88235,14 +73851,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add w11, w10, w5, lsl #1", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88305,7 +73921,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88368,7 +73983,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88399,12 +74013,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88467,7 +74082,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88530,7 +74144,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -88559,13 +74173,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88596,12 +74211,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88664,7 +74280,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88727,7 +74342,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -88756,16 +74371,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88795,14 +74411,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88864,10 +74481,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88897,25 +74513,25 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w23, #0x0", - "mov w24, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x24", + "mov w22, #0x0", + "mov w23, #0x8000", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88977,9 +74593,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w7, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w7, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89009,15 +74624,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89079,7 +74695,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89108,16 +74724,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89147,15 +74764,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89217,7 +74835,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89246,16 +74864,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89285,15 +74904,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89355,10 +74975,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89388,15 +75007,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89458,7 +75078,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89487,16 +75107,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89526,15 +75147,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89596,7 +75218,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89625,16 +75247,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89664,15 +75287,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89734,7 +75358,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89763,28 +75387,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -89820,7 +75444,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w7, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89849,26 +75473,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w7, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89931,7 +75556,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89960,30 +75586,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90019,7 +75641,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90048,29 +75671,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w25, [x28, #1298]", + "lsl w24, w21, w24", + "orr w24, w25, w24", + "strb w24, [x28, #1298]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90101,15 +75726,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90145,7 +75771,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90174,29 +75801,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90227,12 +75846,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90295,7 +75915,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90326,12 +75945,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90394,22 +76014,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90445,22 +76065,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90496,12 +76116,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90515,10 +76134,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -90533,14 +76152,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90569,30 +76191,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90628,22 +76250,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90679,12 +76301,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90716,14 +76337,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90752,43 +76376,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90819,12 +76428,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90887,7 +76497,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90918,12 +76527,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90986,7 +76596,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91017,15 +76626,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91061,7 +76671,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91092,15 +76701,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91136,12 +76746,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91173,14 +76782,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91209,15 +76821,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91248,15 +76859,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91292,7 +76904,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91323,15 +76934,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91367,12 +76979,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91386,10 +76997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -91404,14 +77015,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91440,45 +77054,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91508,14 +77107,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91577,10 +77177,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91610,23 +77209,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91688,9 +77287,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91720,14 +77318,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91789,7 +77388,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91818,16 +77417,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91857,15 +77457,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91927,7 +77528,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91956,15 +77557,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w11, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91994,14 +77596,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w6, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92063,10 +77666,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92096,15 +77698,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92166,7 +77769,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92195,15 +77798,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92233,14 +77837,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92302,7 +77907,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92331,16 +77936,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92370,15 +77976,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92440,7 +78047,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92469,28 +78076,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92526,7 +78133,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92555,26 +78162,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92637,7 +78245,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92666,30 +78275,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92725,7 +78330,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92754,28 +78359,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w25, [x28, #1298]", + "lsl w24, w21, w24", + "orr w24, w25, w24", + "strb w24, [x28, #1298]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92806,15 +78414,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92850,7 +78459,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92879,29 +78489,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92932,12 +78534,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93000,7 +78603,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93031,12 +78633,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93099,22 +78702,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93150,7 +78753,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93213,7 +78815,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93242,17 +78844,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93288,7 +78890,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93351,7 +78952,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93380,29 +78982,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93433,12 +79027,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93501,7 +79096,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93532,12 +79126,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93600,7 +79195,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93631,35 +79225,36 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93695,10 +79290,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93734,7 +79328,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93763,26 +79357,25 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w25, w20, #0x2 (2)", "and w25, w25, #0x7", "add x0, x28, x25, lsl #4", @@ -93821,10 +79414,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93860,7 +79450,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93889,46 +79480,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x8 (8)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93958,15 +79534,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94028,10 +79605,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0xc (12)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94061,23 +79637,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94139,10 +79715,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94172,15 +79747,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94242,7 +79818,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94271,16 +79847,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94310,15 +79887,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94380,7 +79958,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94409,16 +79987,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94448,15 +80027,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94518,10 +80098,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94551,15 +80130,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94621,7 +80201,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94650,16 +80230,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94689,15 +80270,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94759,7 +80341,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94788,16 +80370,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94827,15 +80410,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94897,7 +80481,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94926,28 +80510,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -94983,7 +80567,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95012,27 +80597,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95095,7 +80680,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95124,30 +80710,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95183,7 +80765,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95212,29 +80795,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95265,15 +80850,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95309,7 +80895,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95338,29 +80925,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95391,12 +80970,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95459,7 +81039,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95490,12 +81069,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95558,22 +81138,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95609,22 +81189,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95660,12 +81240,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95679,10 +81258,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -95697,14 +81276,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95733,30 +81315,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95792,19 +81370,17 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w23, w20, #0x1 (1)", "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", @@ -95843,12 +81419,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95880,26 +81453,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95928,43 +81503,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95995,12 +81555,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96063,7 +81624,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96094,12 +81654,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96162,7 +81723,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96193,15 +81753,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96237,7 +81798,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96268,15 +81828,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96312,12 +81873,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96349,14 +81909,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -96385,15 +81948,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96424,15 +81986,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96468,7 +82031,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96499,15 +82061,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96543,12 +82106,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96562,10 +82124,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -96580,14 +82142,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -96616,11 +82181,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -96628,33 +82193,19 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -96662,12 +82213,11 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", - "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block9": { - "ExpectedInstructionCount": 8488, + "ExpectedInstructionCount": 8441, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -96893,7 +82443,6 @@ "add esp,0x74" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96922,6 +82471,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -96959,7 +82509,6 @@ "add w6, w5, w5, lsl #1", "add w10, w6, w5, lsl #1", "sub w7, w5, #0x2 (2)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97022,7 +82571,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97054,14 +82602,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add w11, w10, w5, lsl #1", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97124,7 +82672,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97187,7 +82734,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97218,12 +82764,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97286,7 +82833,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97349,7 +82895,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x30 (48)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97378,13 +82924,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97415,12 +82962,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97483,7 +83031,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97546,7 +83093,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97575,16 +83122,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97614,14 +83162,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97683,10 +83232,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97716,15 +83264,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97786,9 +83335,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97818,15 +83366,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97888,7 +83437,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97917,16 +83466,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97956,15 +83506,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98026,7 +83577,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98055,16 +83606,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98094,15 +83646,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98164,10 +83717,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98197,15 +83749,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98267,7 +83820,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98296,16 +83849,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98335,15 +83889,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98405,7 +83960,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98434,16 +83989,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98473,15 +84029,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98543,7 +84100,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98572,228 +84129,226 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w22, w4, w7, lsl #2", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w24, w4, w7, lsl #2", - "str s2, [x24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98829,7 +84384,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98858,29 +84414,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98943,7 +84501,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98972,15 +84531,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99011,12 +84569,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99079,7 +84638,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99110,12 +84668,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99178,22 +84737,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99229,22 +84788,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99280,12 +84839,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99299,10 +84857,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -99317,14 +84875,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99353,30 +84914,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99412,22 +84973,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99463,12 +85024,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99500,14 +85060,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99536,43 +85099,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99603,12 +85151,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99671,7 +85220,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99702,12 +85250,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99770,7 +85319,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99801,15 +85349,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99845,7 +85394,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99876,15 +85424,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99920,12 +85469,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99957,14 +85505,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99993,15 +85544,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100032,15 +85582,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100076,7 +85627,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100107,15 +85657,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100151,12 +85702,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100170,10 +85720,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -100188,14 +85738,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100224,45 +85777,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100292,14 +85830,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100361,10 +85900,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100394,15 +85932,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100464,9 +86003,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100496,14 +86034,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100565,7 +86104,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100594,16 +86133,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100633,15 +86173,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100703,7 +86244,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100732,15 +86273,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100770,14 +86312,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100839,10 +86382,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100872,15 +86414,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100942,7 +86485,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100971,15 +86514,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101009,14 +86553,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101078,7 +86623,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101107,16 +86652,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101146,15 +86692,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101216,7 +86763,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101245,28 +86792,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101302,7 +86849,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101331,14 +86878,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101369,15 +86916,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101413,7 +86961,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101442,30 +86991,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101501,7 +87046,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101530,28 +87075,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101614,7 +87162,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101643,15 +87192,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101682,12 +87230,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101750,7 +87299,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101781,12 +87329,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101849,22 +87398,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101900,7 +87449,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101963,7 +87511,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101992,17 +87540,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102038,7 +87586,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102101,7 +87648,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102130,29 +87678,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102183,12 +87723,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102251,7 +87792,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102282,12 +87822,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102350,7 +87891,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102381,36 +87921,37 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w24, #0x8000", + "mov w22, #0x8000", "fmov d3, x23", - "mov v3.d[1], x24", + "mov v3.d[1], x22", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102446,10 +87987,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102485,7 +88025,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102514,26 +88054,25 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w23, w20, #0x2 (2)", "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", @@ -102572,10 +88111,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102611,7 +88147,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102640,46 +88177,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102709,15 +88231,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102779,10 +88302,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102812,15 +88334,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102882,10 +88405,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102915,15 +88437,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102985,7 +88508,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103014,16 +88537,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103053,15 +88577,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103123,7 +88648,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103152,16 +88677,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103191,15 +88717,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103261,10 +88788,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103294,15 +88820,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103364,7 +88891,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103393,16 +88920,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103432,15 +88960,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103502,7 +89031,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103531,16 +89060,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103570,15 +89100,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103640,7 +89171,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103669,28 +89200,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103726,7 +89257,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103755,15 +89287,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -103794,15 +89325,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103838,7 +89370,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103867,30 +89400,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103926,7 +89455,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103955,29 +89485,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104040,7 +89572,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104069,15 +89602,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104108,12 +89640,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104176,7 +89709,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104207,12 +89739,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104275,22 +89808,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104326,22 +89859,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104377,12 +89910,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104396,10 +89928,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -104414,14 +89946,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104450,30 +89985,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104509,19 +90040,17 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w23, w20, #0x1 (1)", "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", @@ -104560,12 +90089,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104597,26 +90123,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104645,43 +90173,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104712,12 +90225,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104780,7 +90294,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104811,12 +90324,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104879,7 +90393,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104910,15 +90423,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104954,7 +90468,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104985,15 +90498,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105029,12 +90543,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105066,14 +90579,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -105102,15 +90618,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105141,15 +90656,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105185,7 +90701,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105216,15 +90731,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105260,12 +90776,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105279,10 +90794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -105297,14 +90812,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -105333,11 +90851,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -105345,33 +90863,19 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -105379,12 +90883,11 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", - "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block10": { - "ExpectedInstructionCount": 8405, + "ExpectedInstructionCount": 6382, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -105813,7 +91316,6 @@ "sub w8, w8, #0x14 (20)", "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105842,19 +91344,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x38 (56)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105866,7 +91358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -105879,23 +91371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105926,16 +91404,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xfffffffffffffff8", + "sub w21, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105962,16 +91432,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xfffffffffffffff8", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106000,17 +91463,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x3c (60)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106022,7 +91477,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106035,23 +91490,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106082,16 +91523,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xfffffffffffffffc", + "sub w22, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106118,18 +91551,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xfffffffffffffffc", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", "ldr w6, [x9, #8]", "add w6, w6, #0x78 (120)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106158,17 +91584,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x38 (56)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106180,7 +91598,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106193,23 +91611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106222,10 +91626,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106240,16 +91644,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106277,16 +91671,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", "ldr w6, [x9, #8]", "add w6, w6, #0x7c (124)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106315,17 +91703,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x3c (60)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106337,7 +91717,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106350,23 +91730,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106379,10 +91745,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106397,16 +91763,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106434,22 +91790,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x38 (56)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w20, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x3c (60)", - "ldr w4, [x9, w24, sxtw]", + "ldr w4, [x9, w21, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106478,17 +91828,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106500,7 +91842,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106513,23 +91855,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106560,16 +91888,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106596,15 +91915,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106633,17 +91946,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106655,7 +91960,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106668,23 +91973,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106715,16 +92006,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106751,17 +92033,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", "ldr w6, [x9, #8]", "add w6, w6, #0x70 (112)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106790,17 +92066,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106812,7 +92080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106825,23 +92093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106854,10 +92108,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106872,16 +92126,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106909,16 +92153,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", "ldr w6, [x9, #8]", "add w6, w6, #0x74 (116)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106947,17 +92185,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106969,7 +92199,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106982,23 +92212,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107011,10 +92227,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107029,16 +92245,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107066,15 +92272,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107102,17 +92302,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x3140", - "movk w25, #0x855, lsl #16", - "ldr s2, [x25]", + "mov w22, #0x3140", + "movk w22, #0x855, lsl #16", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107124,7 +92316,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107137,23 +92329,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107166,10 +92344,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107184,15 +92362,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107204,7 +92374,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107217,20 +92387,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x3144", - "movk w12, #0x855, lsl #16", - "ldr s2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w23, #0x3144", + "movk w23, #0x855, lsl #16", + "ldr s4, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107242,7 +92404,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107255,23 +92417,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107286,8 +92434,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107299,23 +92447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107328,10 +92462,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107346,16 +92480,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107383,15 +92507,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107419,17 +92537,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x3148", - "movk w13, #0x855, lsl #16", - "ldr s2, [x13]", + "mov w24, #0x3148", + "movk w24, #0x855, lsl #16", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107441,7 +92551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107454,23 +92564,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107483,10 +92579,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107501,15 +92597,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107521,7 +92609,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107534,18 +92622,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107557,7 +92637,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107570,23 +92650,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107601,8 +92667,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107614,23 +92680,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107643,10 +92695,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107661,16 +92713,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107698,14 +92740,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107734,17 +92770,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107756,7 +92784,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107769,23 +92797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107816,16 +92830,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107852,15 +92857,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107889,17 +92888,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107911,7 +92902,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107924,23 +92915,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107971,16 +92948,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108007,17 +92975,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", "ldr w6, [x9, #8]", "add w6, w6, #0x68 (104)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108046,17 +93008,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108068,7 +93022,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108081,23 +93035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108110,10 +93050,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108128,16 +93068,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108165,16 +93095,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", "ldr w6, [x9, #8]", "add w6, w6, #0x6c (108)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108203,17 +93127,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108225,7 +93141,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108238,23 +93154,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108267,10 +93169,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108285,16 +93187,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108322,15 +93214,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108358,15 +93244,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108378,7 +93256,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108391,11 +93269,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108408,10 +93284,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -108426,12 +93302,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0x313c", - "movk w14, #0x855, lsl #16", - "ldr s2, [x14]", + "mov w25, #0x313c", + "movk w25, #0x855, lsl #16", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108443,7 +93316,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108456,23 +93329,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108485,10 +93344,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -108503,16 +93362,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108540,15 +93389,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108576,15 +93419,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108596,7 +93431,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108609,11 +93444,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108626,10 +93459,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108644,10 +93477,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108659,7 +93489,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108672,23 +93502,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108701,10 +93517,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -108719,16 +93535,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108756,14 +93562,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108792,17 +93592,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108814,7 +93606,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108827,23 +93619,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108874,16 +93652,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108910,15 +93679,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108947,17 +93710,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108969,7 +93724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108982,23 +93737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109029,16 +93770,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109065,17 +93797,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", "ldr w6, [x9, #8]", "add w6, w6, #0x60 (96)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109104,17 +93830,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109126,7 +93844,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109139,23 +93857,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109168,10 +93872,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109186,16 +93890,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109223,16 +93917,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", "ldr w6, [x9, #8]", "add w6, w6, #0x64 (100)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109261,17 +93949,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109283,7 +93963,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109296,23 +93976,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109325,10 +93991,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109343,16 +94009,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109380,15 +94036,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109416,15 +94066,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109436,7 +94078,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109449,23 +94091,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109478,10 +94106,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109496,15 +94124,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109516,7 +94136,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109529,20 +94149,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w15, #0x314c", - "movk w15, #0x855, lsl #16", - "ldr s2, [x15]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w12, #0x314c", + "movk w12, #0x855, lsl #16", + "ldr s4, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109554,7 +94166,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109567,23 +94179,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109598,8 +94196,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109611,23 +94209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109640,10 +94224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109658,16 +94242,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109695,15 +94269,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109731,15 +94299,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109751,7 +94311,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109764,23 +94324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109793,10 +94339,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109811,15 +94357,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109831,7 +94369,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109844,18 +94382,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109867,7 +94397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109880,23 +94410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109911,8 +94427,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109924,23 +94440,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109953,10 +94455,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109971,16 +94473,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110008,14 +94500,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110044,17 +94530,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x18 (24)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110066,7 +94544,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110079,23 +94557,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110126,16 +94590,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110162,15 +94617,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x1c (28)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110199,17 +94648,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x5c (92)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110221,7 +94662,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110234,23 +94675,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110281,16 +94708,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110317,17 +94735,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", "ldr w6, [x9, #8]", "add w6, w6, #0x58 (88)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110356,17 +94768,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x18 (24)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110378,7 +94782,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110391,23 +94795,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110420,10 +94810,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -110438,16 +94828,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110475,16 +94855,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x5c (92)", "ldr w6, [x9, #8]", "add w6, w6, #0x5c (92)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110513,17 +94887,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x1c (28)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110535,7 +94901,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110548,23 +94914,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110577,10 +94929,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -110595,16 +94947,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110632,22 +94974,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x18 (24)", - "ldr w4, [x9, w24, sxtw]", + "ldr w4, [x9, w21, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x1c (28)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w20, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110676,17 +95012,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x50 (80)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110698,7 +95026,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110711,23 +95039,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110758,16 +95072,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110794,15 +95099,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110831,17 +95130,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x54 (84)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110853,7 +95144,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110866,23 +95157,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110913,16 +95190,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110949,17 +95217,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x50 (80)", "ldr w6, [x9, #8]", "add w6, w6, #0x50 (80)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110988,17 +95250,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111010,7 +95264,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111023,23 +95277,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111052,10 +95292,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111070,16 +95310,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111107,16 +95337,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x54 (84)", "ldr w6, [x9, #8]", "add w6, w6, #0x54 (84)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111145,17 +95369,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x14 (20)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111167,7 +95383,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111180,23 +95396,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111209,10 +95411,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111227,16 +95429,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111264,15 +95456,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111300,15 +95486,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111320,7 +95498,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111333,23 +95511,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111362,10 +95526,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111380,15 +95544,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111400,7 +95556,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111413,18 +95569,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111436,7 +95584,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111449,23 +95597,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111480,8 +95614,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111493,23 +95627,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111522,10 +95642,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111540,16 +95660,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111577,15 +95687,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111613,15 +95717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111633,7 +95729,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111646,23 +95742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111675,10 +95757,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111693,15 +95775,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111713,7 +95787,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111726,18 +95800,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x15]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111749,7 +95815,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111762,23 +95828,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111793,8 +95845,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111806,23 +95858,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111835,10 +95873,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111853,16 +95891,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111890,14 +95918,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111926,17 +95948,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x48 (72)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111948,7 +95962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111961,23 +95975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112008,16 +96008,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112044,15 +96035,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112081,17 +96066,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x4c (76)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112103,7 +96080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112116,23 +96093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112163,16 +96126,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112199,17 +96153,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x48 (72)", "ldr w6, [x9, #8]", "add w6, w6, #0x48 (72)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112238,17 +96186,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x8 (8)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112260,7 +96200,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112273,23 +96213,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112302,10 +96228,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112320,16 +96246,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112357,16 +96273,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x4c (76)", "ldr w6, [x9, #8]", "add w6, w6, #0x4c (76)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112395,17 +96305,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0xc (12)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112417,7 +96319,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112430,23 +96332,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112459,10 +96347,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112477,16 +96365,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112514,15 +96392,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112550,15 +96422,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112570,7 +96434,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112583,11 +96447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112600,10 +96462,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112618,10 +96480,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112633,7 +96492,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112646,23 +96505,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112675,10 +96520,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -112693,16 +96538,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112730,15 +96565,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112766,15 +96595,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112786,7 +96607,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112799,11 +96620,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112816,10 +96635,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -112834,10 +96653,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112849,7 +96665,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112862,23 +96678,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112891,10 +96693,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -112909,16 +96711,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112946,13 +96738,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112981,17 +96767,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113003,7 +96781,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113016,23 +96794,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113063,16 +96827,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113099,15 +96854,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x4 (4)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113136,17 +96885,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x44 (68)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113158,7 +96899,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113171,23 +96912,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113218,16 +96945,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113254,17 +96972,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w6, w4, #0x40 (64)", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113293,16 +97005,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113314,7 +97018,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113327,23 +97031,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113356,10 +97046,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113374,16 +97064,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113411,16 +97091,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x44 (68)", "ldr w6, [x9, #8]", "add w6, w6, #0x44 (68)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113449,17 +97123,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113471,7 +97137,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113484,23 +97150,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113513,10 +97165,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113531,16 +97183,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113568,13 +97210,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113602,15 +97238,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113622,7 +97250,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113635,23 +97263,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113664,10 +97278,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113682,15 +97296,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113702,7 +97308,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113715,18 +97321,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113738,7 +97336,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113751,23 +97349,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113782,8 +97366,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113795,23 +97379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113824,10 +97394,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113842,17 +97412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113880,17 +97440,11 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "adds w26, w4, #0x4 (4)", "mov x27, x4", "mov x4, x26", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113918,15 +97472,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113938,7 +97484,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113951,23 +97497,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113980,10 +97512,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113998,15 +97530,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114018,7 +97542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -114031,18 +97555,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114054,7 +97570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -114067,23 +97583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114098,8 +97600,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -114111,23 +97613,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114140,10 +97628,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -114158,16 +97646,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114195,22 +97673,24 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "str w4, [x8]", "mov w20, #0x37f1", "movk w20, #0x1, lsl #16", - "mov w22, #0xda1c", - "movk w22, #0x816, lsl #16", - "add w22, w20, w22", + "mov w21, #0xda1c", + "movk w21, #0x816, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index 542c943de..e0ef8e381 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -19,7 +19,6 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48,6 +47,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -90,7 +90,6 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -119,6 +118,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -161,7 +161,6 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -190,6 +189,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -237,7 +237,6 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -266,6 +265,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -309,10 +309,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -321,7 +321,6 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -350,6 +349,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -392,7 +392,6 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -421,6 +420,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -463,7 +463,6 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -492,6 +491,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -534,7 +534,6 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -563,6 +562,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -600,15 +600,13 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -642,7 +640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -976,15 +974,13 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1018,7 +1014,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -1352,15 +1348,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1376,10 +1370,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1410,10 +1404,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1428,10 +1422,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1462,10 +1456,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1480,10 +1474,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1514,10 +1508,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1532,10 +1526,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1566,10 +1560,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1584,10 +1578,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1618,10 +1612,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1636,10 +1630,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1670,10 +1664,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1688,10 +1682,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1722,10 +1716,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1740,10 +1734,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1768,15 +1762,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1792,10 +1784,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1821,10 +1813,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -1834,12 +1826,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1853,10 +1845,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1881,10 +1873,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -1894,371 +1886,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st3": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdb /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st4": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdc /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st5": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdd /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st6": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xde /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st7": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdf /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fsub st0, st0": { - "ExpectedInstructionCount": 39, - "Comment": [ - "0xd8 11b 0xe0 /4" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2276,6 +1908,364 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st3": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdb /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st4": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdc /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st5": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdd /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st6": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xde /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st7": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdf /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fsub st0, st0": { + "ExpectedInstructionCount": 37, + "Comment": [ + "0xd8 11b 0xe0 /4" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2290,7 +2280,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2624,15 +2614,13 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2666,7 +2654,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2677,11 +2665,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2695,10 +2683,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2724,11 +2712,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2742,10 +2730,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2771,11 +2759,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2789,10 +2777,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2818,11 +2806,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2836,10 +2824,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2865,11 +2853,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2883,10 +2871,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2912,11 +2900,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2930,10 +2918,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2959,11 +2947,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2977,10 +2965,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3000,15 +2988,13 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3024,10 +3010,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3042,7 +3028,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3376,15 +3362,13 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3418,7 +3402,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3429,11 +3413,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3447,10 +3431,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3476,11 +3460,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3494,10 +3478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3523,11 +3507,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3541,10 +3525,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3570,11 +3554,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3588,10 +3572,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3617,11 +3601,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3635,10 +3619,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3664,11 +3648,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3682,10 +3666,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3711,11 +3695,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3729,10 +3713,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3757,7 +3741,6 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3786,16 +3769,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3876,21 +3860,22 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { - "ExpectedInstructionCount": 48, + "ExpectedInstructionCount": 50, "Comment": [ "0xd9 !11b /4" ], "ExpectedArm64ASM": [ "ldrh w20, [x4]", "strh w20, [x28, #1296]", - "ldr w20, [x4, #4]", + "add x20, x4, #0x4 (4)", + "ldr w20, [x20]", "ubfx w21, w20, #11, #3", "strb w21, [x28, #1019]", "ubfx w21, w20, #8, #1", @@ -3901,7 +3886,8 @@ "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", - "ldr w20, [x4, #8]", + "add x20, x4, #0x8 (8)", + "ldr w20, [x20]", "ubfx w21, w20, #0, #2", "mrs x22, nzcv", "cmp x21, #0x3 (3)", @@ -4029,26 +4015,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -4065,13 +4049,13 @@ "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -4088,13 +4072,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -4111,13 +4095,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -4134,13 +4118,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -4157,13 +4141,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -4180,13 +4164,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -4203,33 +4187,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -4239,17 +4212,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -4259,17 +4232,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -4279,17 +4252,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -4299,17 +4272,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -4319,17 +4292,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -4339,17 +4312,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -4359,17 +4332,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -4495,18 +4468,18 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2608]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -4515,18 +4488,18 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -4535,18 +4508,18 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2640]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2640]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -4555,18 +4528,18 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2656]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2656]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -4575,18 +4548,18 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2672]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -4595,18 +4568,18 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2688]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -4615,18 +4588,18 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -4671,22 +4644,17 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4700,10 +4668,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -4718,9 +4686,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -4730,13 +4700,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4767,32 +4730,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldr q3, [x28, #2608]", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldr q2, [x28, #2608]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4824,9 +4789,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -4836,13 +4803,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4903,9 +4863,16 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -4917,9 +4884,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4933,10 +4900,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1656]", "blr x5", "ldr w4, [x28, #1000]", @@ -4951,9 +4918,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -4989,9 +4956,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5005,10 +4972,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1664]", "blr x5", "ldr w4, [x28, #1000]", @@ -5023,30 +4990,21 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 77, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "ldr q4, [x28, #2608]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5059,10 +5017,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v4.d[0]", - "umov w4, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5077,6 +5035,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5089,10 +5055,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -5107,9 +5073,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -5160,13 +5128,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -5225,12 +5186,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -5283,9 +5251,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5299,10 +5267,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1672]", "blr x5", "ldr w4, [x28, #1000]", @@ -5358,9 +5326,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -5400,9 +5368,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -5411,8 +5379,7 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5424,7 +5391,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5440,6 +5407,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5482,8 +5450,7 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5495,7 +5462,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5511,6 +5478,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5553,8 +5521,7 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5566,7 +5533,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5582,6 +5549,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5629,8 +5597,7 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5642,7 +5609,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5658,6 +5625,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5701,10 +5669,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -5713,8 +5681,7 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5726,7 +5693,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5742,6 +5709,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5784,8 +5752,7 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5797,7 +5764,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5813,6 +5780,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5855,8 +5823,7 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5868,7 +5835,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5884,6 +5851,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5926,8 +5894,7 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5939,7 +5906,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5955,6 +5922,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5992,7 +5960,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -6000,13 +5968,11 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6022,11 +5988,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6042,11 +6008,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6062,11 +6028,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6082,11 +6048,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6102,11 +6068,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6122,11 +6088,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6142,17 +6108,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -6160,13 +6126,11 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6182,11 +6146,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6202,11 +6166,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6222,11 +6186,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6242,11 +6206,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6262,11 +6226,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6282,11 +6246,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6302,17 +6266,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -6322,13 +6286,11 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6346,11 +6308,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6368,11 +6330,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6390,11 +6352,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6412,11 +6374,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6434,11 +6396,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6456,11 +6418,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6478,17 +6440,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -6501,13 +6463,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6529,11 +6489,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6555,11 +6515,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6581,11 +6541,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6607,11 +6567,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6633,11 +6593,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6659,11 +6619,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6685,29 +6645,29 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xda 11b 0xe9 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6721,10 +6681,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6749,57 +6709,59 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6842,10 +6804,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -6926,10 +6888,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -6938,22 +6900,22 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb !11b /7" ], @@ -6963,19 +6925,20 @@ "ldr q2, [x0, #1040]", "str d2, [x4]", "mov x21, v2.d[1]", - "strh w21, [x4, #8]", + "add x22, x4, #0x8 (8)", + "strh w21, [x22]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -6983,13 +6946,11 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7005,11 +6966,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7025,11 +6986,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7045,11 +7006,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7065,11 +7026,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7085,11 +7046,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7105,11 +7066,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7125,17 +7086,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -7143,13 +7104,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7165,11 +7124,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7185,11 +7144,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7205,11 +7164,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7225,11 +7184,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7245,11 +7204,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7265,11 +7224,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7285,17 +7244,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -7304,13 +7263,11 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7327,11 +7284,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7348,11 +7305,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7369,11 +7326,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7390,11 +7347,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7411,11 +7368,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7432,11 +7389,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7453,17 +7410,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -7476,13 +7433,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7504,11 +7459,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7530,11 +7485,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7556,11 +7511,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7582,11 +7537,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7608,11 +7563,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7634,11 +7589,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7660,11 +7615,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7694,15 +7649,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 43, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7718,10 +7671,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7751,10 +7704,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7769,10 +7722,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7802,10 +7755,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7820,10 +7773,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7853,10 +7806,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7871,10 +7824,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7904,10 +7857,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7922,10 +7875,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7955,10 +7908,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7973,10 +7926,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8006,10 +7959,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8024,10 +7977,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8057,10 +8010,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8075,10 +8028,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8102,15 +8055,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 43, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8126,10 +8077,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8159,10 +8110,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8177,10 +8128,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8210,10 +8161,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8228,10 +8179,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8261,10 +8212,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8279,10 +8230,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8312,10 +8263,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8330,10 +8281,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8363,10 +8314,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8381,10 +8332,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8414,10 +8365,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8432,10 +8383,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8465,10 +8416,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8483,10 +8434,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8515,7 +8466,6 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8544,6 +8494,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8586,7 +8537,6 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8615,6 +8565,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8657,7 +8608,6 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8686,6 +8636,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8733,7 +8684,6 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8762,6 +8712,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8805,10 +8756,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -8817,7 +8768,6 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8846,6 +8796,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8888,7 +8839,6 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8917,6 +8867,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8959,7 +8910,6 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8988,6 +8938,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9030,7 +8981,6 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9059,6 +9009,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9096,7 +9047,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9104,9 +9055,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9140,7 +9089,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9151,10 +9100,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9187,7 +9136,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9198,10 +9147,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9234,7 +9183,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9245,10 +9194,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9281,7 +9230,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9292,10 +9241,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9328,7 +9277,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9339,10 +9288,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9375,7 +9324,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9386,10 +9335,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9422,7 +9371,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9433,10 +9382,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9469,12 +9418,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9482,9 +9431,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9518,7 +9465,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9529,10 +9476,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9565,7 +9512,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9576,10 +9523,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9612,7 +9559,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9623,10 +9570,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9659,7 +9606,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9670,10 +9617,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9706,7 +9653,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9717,10 +9664,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9753,7 +9700,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9764,10 +9711,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9800,7 +9747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9811,10 +9758,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9847,12 +9794,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9860,9 +9807,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9896,7 +9841,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10230,7 +10175,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10238,9 +10183,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10256,10 +10199,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10274,7 +10217,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10285,10 +10228,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10303,10 +10246,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10321,7 +10264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10332,10 +10275,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10350,10 +10293,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10368,7 +10311,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10379,10 +10322,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10397,10 +10340,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10415,7 +10358,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10426,10 +10369,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10444,10 +10387,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10462,7 +10405,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10473,10 +10416,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10491,10 +10434,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10509,7 +10452,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10520,10 +10463,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10538,10 +10481,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10556,7 +10499,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10567,10 +10510,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10585,10 +10528,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10603,12 +10546,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10616,9 +10559,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10652,7 +10593,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10986,7 +10927,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10994,9 +10935,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11012,10 +10951,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11030,7 +10969,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11041,10 +10980,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11059,10 +10998,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11077,7 +11016,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11088,10 +11027,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11106,10 +11045,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11124,7 +11063,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11135,10 +11074,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11153,10 +11092,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11171,7 +11110,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11182,10 +11121,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11200,10 +11139,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11218,7 +11157,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11229,10 +11168,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11247,10 +11186,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11265,7 +11204,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11276,10 +11215,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11294,10 +11233,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11312,7 +11251,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11323,10 +11262,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11341,10 +11280,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11359,7 +11298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11369,7 +11308,6 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11398,16 +11336,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11450,10 +11389,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -11534,10 +11473,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -11786,14 +11725,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -11914,24 +11851,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -11940,16 +11864,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -11960,16 +11884,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -11980,16 +11904,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12000,16 +11924,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12020,16 +11944,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12040,16 +11964,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12060,229 +11984,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12298,10 +12228,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12332,10 +12262,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12350,10 +12280,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12384,10 +12314,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12402,10 +12332,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12436,10 +12366,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12454,10 +12384,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12488,10 +12418,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12506,10 +12436,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12540,10 +12470,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12558,10 +12488,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12592,10 +12522,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12610,10 +12540,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12644,10 +12574,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12662,10 +12592,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12690,15 +12620,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12714,10 +12642,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12743,10 +12671,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -12756,12 +12684,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12775,10 +12703,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12803,10 +12731,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -12816,11 +12744,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12834,10 +12762,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12863,10 +12791,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -12876,11 +12804,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12894,10 +12822,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12923,10 +12851,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -12936,11 +12864,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12954,10 +12882,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12983,10 +12911,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -12996,11 +12924,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13014,10 +12942,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13043,10 +12971,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -13056,11 +12984,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13074,10 +13002,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13103,10 +13031,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -13116,11 +13044,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13134,10 +13062,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13163,10 +13091,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -13175,8 +13103,7 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13188,7 +13115,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13204,6 +13131,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13246,8 +13174,7 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13259,7 +13186,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13275,6 +13202,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13317,8 +13245,7 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13330,7 +13257,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13346,6 +13273,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13393,8 +13321,7 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13406,7 +13333,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13422,6 +13349,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13465,10 +13393,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -13477,8 +13405,7 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13490,7 +13417,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13506,6 +13433,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13548,8 +13476,7 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13561,7 +13488,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13577,6 +13504,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13619,8 +13547,7 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13632,7 +13559,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13648,6 +13575,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13690,8 +13618,7 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13703,7 +13630,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13719,6 +13646,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13756,15 +13684,13 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13798,16 +13724,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -13817,12 +13743,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13854,15 +13780,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -13872,11 +13798,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13908,16 +13834,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -13927,11 +13853,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13963,16 +13889,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -13982,11 +13908,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14018,16 +13944,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -14037,11 +13963,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14073,16 +13999,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -14092,11 +14018,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14128,16 +14054,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -14147,11 +14073,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14183,28 +14109,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14238,16 +14162,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -14257,12 +14181,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14294,15 +14218,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -14312,11 +14236,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14348,16 +14272,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -14367,11 +14291,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14403,16 +14327,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -14422,11 +14346,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14458,16 +14382,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -14477,11 +14401,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14513,16 +14437,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -14532,11 +14456,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14568,16 +14492,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -14587,11 +14511,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14623,31 +14547,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xde 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14661,10 +14585,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -14689,18 +14613,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14708,9 +14635,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14744,16 +14669,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -14800,15 +14725,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -14854,16 +14779,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -14909,16 +14834,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -14964,16 +14889,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -15019,16 +14944,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -15074,16 +14999,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -15129,20 +15054,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15150,9 +15075,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15168,10 +15091,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15186,16 +15109,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -15205,12 +15128,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15224,10 +15147,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15242,15 +15165,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -15260,11 +15183,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15278,10 +15201,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15296,16 +15219,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -15315,11 +15238,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15333,10 +15256,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15351,16 +15274,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -15370,11 +15293,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15388,10 +15311,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15406,16 +15329,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -15425,11 +15348,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15443,10 +15366,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15461,16 +15384,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -15480,11 +15403,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15498,10 +15421,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15516,16 +15439,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -15535,11 +15458,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15553,10 +15476,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15571,20 +15494,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15592,9 +15515,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15628,16 +15549,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -15684,15 +15605,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -15738,16 +15659,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -15793,16 +15714,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -15848,16 +15769,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -15903,16 +15824,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -15958,16 +15879,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -16013,20 +15934,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16034,9 +15955,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16052,10 +15971,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16070,16 +15989,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -16089,12 +16008,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16108,10 +16027,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16126,15 +16045,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -16144,11 +16063,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16162,10 +16081,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16180,16 +16099,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -16199,11 +16118,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16217,10 +16136,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16235,16 +16154,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -16254,11 +16173,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16272,10 +16191,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16290,16 +16209,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -16309,11 +16228,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16327,10 +16246,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16345,16 +16264,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -16364,11 +16283,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16382,10 +16301,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16400,16 +16319,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -16419,11 +16338,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16437,10 +16356,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16455,59 +16374,58 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "mov w23, #0x0", - "sxth x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16550,10 +16468,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -16634,10 +16552,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -16646,14 +16564,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16683,9 +16593,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16732,10 +16650,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -16854,15 +16772,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 51, + "ExpectedInstructionCount": 49, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16878,10 +16794,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16906,10 +16822,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st1": { @@ -16919,12 +16835,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16938,10 +16854,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16965,10 +16881,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st2": { @@ -16978,11 +16894,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16996,10 +16912,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17024,10 +16940,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st3": { @@ -17037,11 +16953,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17055,10 +16971,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17083,10 +16999,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st4": { @@ -17096,11 +17012,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17114,10 +17030,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17142,10 +17058,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st5": { @@ -17155,11 +17071,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17173,10 +17089,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17201,10 +17117,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st6": { @@ -17214,11 +17130,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17232,10 +17148,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17260,10 +17176,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st7": { @@ -17273,11 +17189,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17291,10 +17207,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17319,22 +17235,20 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st0": { - "ExpectedInstructionCount": 51, + "ExpectedInstructionCount": 49, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17350,10 +17264,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17378,10 +17292,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st1": { @@ -17391,12 +17305,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17410,10 +17324,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17437,10 +17351,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st2": { @@ -17450,11 +17364,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17468,10 +17382,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17496,10 +17410,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st3": { @@ -17509,11 +17423,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17527,10 +17441,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17555,10 +17469,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st4": { @@ -17568,11 +17482,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17586,10 +17500,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17614,10 +17528,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st5": { @@ -17627,11 +17541,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17645,10 +17559,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17673,10 +17587,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st6": { @@ -17686,11 +17600,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17704,10 +17618,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17732,10 +17646,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st7": { @@ -17745,11 +17659,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17763,10 +17677,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17791,14 +17705,14 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 287, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -17810,297 +17724,29 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] }, "memcpy4_64": { - "ExpectedInstructionCount": 287, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld qword [rax]", "fstp qword [rdx]", @@ -18112,293 +17758,25 @@ "fstp qword [rdx + 32]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr d2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", "ldr d2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", "ldr d2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index 600893407..7dcb374e9 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -21,9 +21,9 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -37,9 +37,9 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -53,9 +53,9 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -75,9 +75,9 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -93,10 +93,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -105,9 +105,9 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -121,9 +121,9 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -137,9 +137,9 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -153,9 +153,9 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -164,20 +164,18 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -308,20 +306,18 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -452,15 +448,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 16, + "ExpectedInstructionCount": 14, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -644,15 +638,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 24, + "ExpectedInstructionCount": 22, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -669,10 +661,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -701,10 +693,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -733,10 +725,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -765,10 +757,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -797,10 +789,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -829,10 +821,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -861,10 +853,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -893,27 +885,25 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1044,20 +1034,18 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1068,13 +1056,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1086,13 +1074,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1104,13 +1092,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1122,13 +1110,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1140,13 +1128,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1158,13 +1146,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1176,32 +1164,30 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1332,20 +1318,18 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1356,13 +1340,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1374,13 +1358,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1392,13 +1376,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1410,13 +1394,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1428,13 +1412,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1446,13 +1430,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1464,13 +1448,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1481,19 +1465,19 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1524,10 +1508,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { @@ -1693,26 +1677,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -1729,13 +1711,13 @@ "ldr d2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -1752,13 +1734,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -1775,13 +1757,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -1798,13 +1780,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -1821,13 +1803,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -1844,13 +1826,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -1867,33 +1849,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -1903,17 +1874,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -1923,17 +1894,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -1943,17 +1914,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -1963,17 +1934,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -1983,17 +1954,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -2003,17 +1974,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -2023,17 +1994,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -2094,7 +2065,7 @@ ] }, "fxam": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd9 11b 0xe5 /4" ], @@ -2107,16 +2078,14 @@ "strb w21, [x28, #1017]", "ldrb w21, [x28, #1298]", "lsr w20, w21, w20", - "mov w21, #0x1", "and w20, w20, #0x1", - "mov w22, #0x0", - "mrs x23, nzcv", + "mrs x21, nzcv", "cmp x20, #0x1 (1)", - "csel x21, x22, x21, eq", - "strb w21, [x28, #1016]", + "cset x22, ne", + "strb w22, [x28, #1016]", "strb w20, [x28, #1018]", - "strb w21, [x28, #1022]", - "msr nzcv, x23" + "strb w22, [x28, #1022]", + "msr nzcv, x21" ] }, "fld1": { @@ -2125,19 +2094,19 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x3ff0000000000000", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -2146,22 +2115,22 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0xa372", + "movk x20, #0x979, lsl #16", + "movk x20, #0x934f, lsl #32", + "movk x20, #0x400a, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0xa372", - "movk x22, #0x979, lsl #16", - "movk x22, #0x934f, lsl #32", - "movk x22, #0x400a, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -2170,22 +2139,22 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x82fe", + "movk x20, #0x652b, lsl #16", + "movk x20, #0x1547, lsl #32", + "movk x20, #0x3ff7, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x82fe", - "movk x22, #0x652b, lsl #16", - "movk x22, #0x1547, lsl #32", - "movk x22, #0x3ff7, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -2194,22 +2163,22 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x2d18", + "movk x20, #0x5444, lsl #16", + "movk x20, #0x21fb, lsl #32", + "movk x20, #0x4009, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x2d18", - "movk x22, #0x5444, lsl #16", - "movk x22, #0x21fb, lsl #32", - "movk x22, #0x4009, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -2218,22 +2187,22 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x79ff", + "movk x20, #0x509f, lsl #16", + "movk x20, #0x4413, lsl #32", + "movk x20, #0x3fd3, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x79ff", - "movk x22, #0x509f, lsl #16", - "movk x22, #0x4413, lsl #32", - "movk x22, #0x3fd3, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -2242,22 +2211,22 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x39ef", + "movk x20, #0xfefa, lsl #16", + "movk x20, #0x2e42, lsl #32", + "movk x20, #0x3fe6, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x39ef", - "movk x22, #0xfefa, lsl #16", - "movk x22, #0x2e42, lsl #32", - "movk x22, #0x3fe6, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -2266,19 +2235,19 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "mov w20, #0x0", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -2346,25 +2315,20 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2415,9 +2379,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -2427,13 +2393,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2487,33 +2446,35 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x23, #0x3ff0000000000000", - "fmov d3, x23", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "mov x21, #0x3ff0000000000000", + "fmov d2, x21", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2567,9 +2528,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -2579,28 +2542,28 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x23, v2.d[0]", - "and x24, x23, #0x7ff0000000000000", - "lsr x24, x24, #52", - "sub x24, x24, #0x3ff (1023)", - "scvtf d2, x24", - "and x23, x23, #0x800fffffffffffff", - "orr x23, x23, #0x3ff0000000000000", - "fmov d3, x23", + "mov x21, v2.d[0]", + "and x22, x21, #0x7ff0000000000000", + "lsr x22, x22, #52", + "sub x22, x22, #0x3ff (1023)", + "scvtf d2, x22", + "and x21, x21, #0x800fffffffffffff", + "orr x21, x21, #0x3ff0000000000000", + "fmov d3, x21", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -2612,12 +2575,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2668,9 +2631,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -2706,12 +2669,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2762,34 +2725,33 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr d3, [x0, #1040]", "mov x20, #0x3ff0000000000000", - "fmov d4, x20", - "fadd d2, d2, d4", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "fmov d2, x20", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "fadd d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2840,9 +2802,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -2866,13 +2830,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2977,12 +2934,19 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -3008,12 +2972,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3128,9 +3092,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -3193,9 +3157,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -3204,9 +3168,9 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -3220,9 +3184,9 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -3236,9 +3200,9 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3258,9 +3222,9 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3276,10 +3240,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -3288,9 +3252,9 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -3304,9 +3268,9 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -3320,9 +3284,9 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -3336,9 +3300,9 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -3347,7 +3311,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -3355,15 +3319,13 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st1": { @@ -3377,13 +3339,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st2": { @@ -3397,13 +3359,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st3": { @@ -3417,13 +3379,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st4": { @@ -3437,13 +3399,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st5": { @@ -3457,13 +3419,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st6": { @@ -3477,13 +3439,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st7": { @@ -3497,17 +3459,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -3515,15 +3477,13 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st1": { @@ -3537,13 +3497,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st2": { @@ -3557,13 +3517,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st3": { @@ -3577,13 +3537,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st4": { @@ -3597,13 +3557,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st5": { @@ -3617,13 +3577,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st6": { @@ -3637,13 +3597,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st7": { @@ -3657,17 +3617,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -3677,15 +3637,13 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st1": { @@ -3701,13 +3659,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st2": { @@ -3723,13 +3681,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st3": { @@ -3745,13 +3703,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st4": { @@ -3767,13 +3725,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st5": { @@ -3789,13 +3747,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st6": { @@ -3811,13 +3769,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st7": { @@ -3833,17 +3791,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -3856,15 +3814,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3884,13 +3840,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3910,13 +3866,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3936,13 +3892,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3962,13 +3918,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3988,13 +3944,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4014,13 +3970,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4040,18 +3996,18 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 28, + "ExpectedInstructionCount": 31, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4076,14 +4032,17 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { @@ -4092,19 +4051,19 @@ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "scvtf d2, w22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4122,10 +4081,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -4158,10 +4117,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -4170,7 +4129,6 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4198,16 +4156,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4253,14 +4212,14 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -4268,15 +4227,13 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st1": { @@ -4290,13 +4247,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st2": { @@ -4310,13 +4267,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st3": { @@ -4330,13 +4287,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st4": { @@ -4350,13 +4307,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st5": { @@ -4370,13 +4327,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st6": { @@ -4390,13 +4347,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st7": { @@ -4410,17 +4367,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -4428,15 +4385,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st1": { @@ -4450,13 +4405,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st2": { @@ -4470,13 +4425,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st3": { @@ -4490,13 +4445,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st4": { @@ -4510,13 +4465,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st5": { @@ -4530,13 +4485,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st6": { @@ -4550,13 +4505,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st7": { @@ -4570,17 +4525,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -4589,15 +4544,13 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st1": { @@ -4612,13 +4565,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st2": { @@ -4633,13 +4586,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st3": { @@ -4654,13 +4607,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st4": { @@ -4675,13 +4628,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st5": { @@ -4696,13 +4649,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st6": { @@ -4717,13 +4670,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st7": { @@ -4738,17 +4691,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -4761,15 +4714,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4789,13 +4740,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4815,13 +4766,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4841,13 +4792,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4867,13 +4818,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4893,13 +4844,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4919,13 +4870,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4945,13 +4896,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4987,15 +4938,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 11, + "ExpectedInstructionCount": 9, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5139,15 +5088,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 11, + "ExpectedInstructionCount": 9, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5296,8 +5243,8 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -5311,8 +5258,8 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -5326,8 +5273,8 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5347,8 +5294,8 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5364,10 +5311,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -5376,8 +5323,8 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -5391,8 +5338,8 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -5406,8 +5353,8 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -5421,8 +5368,8 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -5431,7 +5378,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5439,14 +5386,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5457,14 +5402,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5475,14 +5420,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5493,14 +5438,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5511,14 +5456,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5529,14 +5474,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5547,14 +5492,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5565,19 +5510,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5585,14 +5530,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5603,14 +5546,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5621,14 +5564,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5639,14 +5582,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5657,14 +5600,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5675,14 +5618,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5693,14 +5636,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5711,19 +5654,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5731,14 +5674,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5869,7 +5810,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5877,14 +5818,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5895,14 +5834,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5913,14 +5852,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5931,14 +5870,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5949,14 +5888,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5967,14 +5906,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5985,14 +5924,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6003,19 +5942,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6023,14 +5962,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6161,7 +6098,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6169,14 +6106,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6187,14 +6122,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6205,14 +6140,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6223,14 +6158,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6241,14 +6176,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6259,14 +6194,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6277,14 +6212,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6295,14 +6230,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6312,18 +6247,18 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6341,10 +6276,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -6373,10 +6308,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -7059,14 +6994,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -7187,24 +7120,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -7213,16 +7133,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldr d2, [x0, #1040]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -7233,16 +7153,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7253,16 +7173,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7273,16 +7193,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7293,16 +7213,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7313,16 +7233,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7333,229 +7253,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 16, + "ExpectedInstructionCount": 14, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7739,15 +7665,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 24, + "ExpectedInstructionCount": 22, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7764,10 +7688,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -7796,10 +7720,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -7828,10 +7752,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -7860,10 +7784,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -7892,10 +7816,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -7924,10 +7848,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -7956,10 +7880,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -7988,10 +7912,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -8000,10 +7924,10 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -8017,10 +7941,10 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -8034,10 +7958,10 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8057,10 +7981,10 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8076,10 +8000,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -8088,10 +8012,10 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -8105,10 +8029,10 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -8122,10 +8046,10 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -8139,10 +8063,10 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -8151,29 +8075,27 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -8183,23 +8105,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -8209,23 +8131,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -8235,23 +8157,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -8261,23 +8183,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -8287,23 +8209,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -8313,23 +8235,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -8339,49 +8261,47 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -8391,23 +8311,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -8417,23 +8337,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -8443,23 +8363,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -8469,23 +8389,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -8495,23 +8415,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -8521,23 +8441,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -8547,27 +8467,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 28, + "ExpectedInstructionCount": 31, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8592,18 +8512,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8611,23 +8534,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -8645,15 +8566,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -8670,16 +8591,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -8696,16 +8617,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -8722,16 +8643,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -8748,16 +8669,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -8774,16 +8695,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -8800,20 +8721,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8821,23 +8742,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -8847,23 +8766,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -8873,23 +8792,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -8899,23 +8818,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -8925,23 +8844,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -8951,23 +8870,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -8977,23 +8896,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -9003,27 +8922,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9031,23 +8950,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -9065,15 +8982,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -9090,16 +9007,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -9116,16 +9033,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -9142,16 +9059,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -9168,16 +9085,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -9194,16 +9111,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -9220,20 +9137,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9241,23 +9158,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -9267,23 +9182,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -9293,23 +9208,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -9319,23 +9234,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -9345,23 +9260,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -9371,23 +9286,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -9397,23 +9312,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -9423,23 +9338,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { @@ -9448,20 +9363,20 @@ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "sxth x22, w22", - "scvtf d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9479,10 +9394,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -9515,10 +9430,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -9527,14 +9442,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9590,9 +9497,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9666,10 +9581,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -9788,15 +9703,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 19, + "ExpectedInstructionCount": 17, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -9808,10 +9721,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st1": { @@ -9835,10 +9748,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st2": { @@ -9862,10 +9775,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st3": { @@ -9889,10 +9802,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st4": { @@ -9916,10 +9829,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st5": { @@ -9943,10 +9856,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st6": { @@ -9970,10 +9883,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st7": { @@ -9997,22 +9910,20 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st0": { - "ExpectedInstructionCount": 19, + "ExpectedInstructionCount": 17, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10024,10 +9935,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st1": { @@ -10051,10 +9962,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st2": { @@ -10078,10 +9989,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st3": { @@ -10105,10 +10016,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st4": { @@ -10132,10 +10043,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st5": { @@ -10159,10 +10070,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st6": { @@ -10186,10 +10097,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st7": { @@ -10213,14 +10124,14 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 83, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -10232,93 +10143,29 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "fcvt d2, s2", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", "ldr s2, [x4, #12]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] }, "memcpy4_64": { - "ExpectedInstructionCount": 75, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld qword [rax]", "fstp qword [rdx]", @@ -10330,81 +10177,25 @@ "fstp qword [rdx + 32]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr d2, [x4, #8]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", "ldr d2, [x4, #16]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", "ldr d2, [x4, #32]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 0f133c744..412dc3dcc 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -18,7 +18,6 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47,6 +46,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -89,7 +89,6 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -118,6 +117,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -160,7 +160,6 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -189,6 +188,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -236,7 +236,6 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -265,6 +264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -308,10 +308,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -320,7 +320,6 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -349,6 +348,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -391,7 +391,6 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -420,6 +419,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -462,7 +462,6 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -491,6 +490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -533,7 +533,6 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -562,6 +561,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -599,15 +599,13 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -641,7 +639,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -975,15 +973,13 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1017,7 +1013,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -1351,15 +1347,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1375,10 +1369,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1409,10 +1403,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1427,10 +1421,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1461,10 +1455,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1479,10 +1473,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1513,10 +1507,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1531,10 +1525,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1565,10 +1559,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1583,10 +1577,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1617,10 +1611,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1635,10 +1629,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1669,10 +1663,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1687,10 +1681,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1721,10 +1715,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1739,10 +1733,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1767,15 +1761,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1791,10 +1783,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1820,10 +1812,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -1833,12 +1825,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1852,10 +1844,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1880,10 +1872,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -1893,371 +1885,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st3": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdb /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st4": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdc /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st5": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdd /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st6": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xde /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fcomp st0, st7": { - "ExpectedInstructionCount": 52, - "Comment": [ - "0xd8 11b 0xdf /3" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov x21, x0", - "ubfx x22, x21, #1, #1", - "ubfx x23, x21, #0, #1", - "ubfx x21, x21, #2, #1", - "orr w22, w22, w21", - "orr w23, w23, w21", - "strb w22, [x28, #1016]", - "strb wzr, [x28, #1017]", - "strb w21, [x28, #1018]", - "strb w23, [x28, #1022]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "fsub st0, st0": { - "ExpectedInstructionCount": 39, - "Comment": [ - "0xd8 11b 0xe0 /4" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2275,6 +1907,364 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st3": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdb /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st4": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdc /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st5": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdd /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st6": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xde /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fcomp st0, st7": { + "ExpectedInstructionCount": 52, + "Comment": [ + "0xd8 11b 0xdf /3" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ldp x16, x17, [x28, #376]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "strb wzr, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fsub st0, st0": { + "ExpectedInstructionCount": 37, + "Comment": [ + "0xd8 11b 0xe0 /4" + ], + "ExpectedArm64ASM": [ + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", + "sub sp, sp, #0x70 (112)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2289,7 +2279,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2623,15 +2613,13 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2665,7 +2653,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2676,11 +2664,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2694,10 +2682,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2723,11 +2711,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2741,10 +2729,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2770,11 +2758,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2788,10 +2776,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2817,11 +2805,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2835,10 +2823,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2864,11 +2852,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2882,10 +2870,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2911,11 +2899,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2929,10 +2917,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2958,11 +2946,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2976,10 +2964,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2999,15 +2987,13 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3023,10 +3009,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3041,7 +3027,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3375,15 +3361,13 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3417,7 +3401,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3428,11 +3412,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3446,10 +3430,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3475,11 +3459,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3493,10 +3477,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3522,11 +3506,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3540,10 +3524,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3569,11 +3553,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3587,10 +3571,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3616,11 +3600,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3634,10 +3618,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3663,11 +3647,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3681,10 +3665,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3710,11 +3694,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3728,10 +3712,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3756,7 +3740,6 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3785,16 +3768,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3875,21 +3859,22 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { - "ExpectedInstructionCount": 48, + "ExpectedInstructionCount": 50, "Comment": [ "0xd9 !11b /4" ], "ExpectedArm64ASM": [ "ldrh w20, [x4]", "strh w20, [x28, #1296]", - "ldr w20, [x4, #4]", + "add x20, x4, #0x4 (4)", + "ldr w20, [x20]", "ubfx w21, w20, #11, #3", "strb w21, [x28, #1019]", "ubfx w21, w20, #8, #1", @@ -3900,7 +3885,8 @@ "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", - "ldr w20, [x4, #8]", + "add x20, x4, #0x8 (8)", + "ldr w20, [x20]", "ubfx w21, w20, #0, #2", "mrs x22, nzcv", "cmp x21, #0x3 (3)", @@ -4028,26 +4014,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -4064,13 +4048,13 @@ "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -4087,13 +4071,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -4110,13 +4094,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -4133,13 +4117,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -4156,13 +4140,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -4179,13 +4163,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -4202,33 +4186,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -4238,17 +4211,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -4258,17 +4231,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -4278,17 +4251,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -4298,17 +4271,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -4318,17 +4291,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -4338,17 +4311,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -4358,17 +4331,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -4494,18 +4467,18 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2608]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -4514,18 +4487,18 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -4534,18 +4507,18 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2640]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2640]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -4554,18 +4527,18 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2656]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2656]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -4574,18 +4547,18 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2672]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -4594,18 +4567,18 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2688]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -4614,18 +4587,18 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -4670,22 +4643,17 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4699,10 +4667,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -4717,9 +4685,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -4729,13 +4699,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4766,32 +4729,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldr q3, [x28, #2608]", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldr q2, [x28, #2608]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4823,9 +4788,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -4835,13 +4802,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4902,9 +4862,16 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -4916,9 +4883,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4932,10 +4899,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1656]", "blr x5", "ldr w4, [x28, #1000]", @@ -4950,9 +4917,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -4988,9 +4955,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5004,10 +4971,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1664]", "blr x5", "ldr w4, [x28, #1000]", @@ -5022,30 +4989,21 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 77, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "ldr q4, [x28, #2608]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5058,10 +5016,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v4.d[0]", - "umov w4, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5076,6 +5034,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5088,10 +5054,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -5106,9 +5072,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -5159,13 +5127,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -5224,12 +5185,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -5282,9 +5250,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5298,10 +5266,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1672]", "blr x5", "ldr w4, [x28, #1000]", @@ -5357,9 +5325,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -5399,9 +5367,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -5410,8 +5378,7 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5423,7 +5390,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5439,6 +5406,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5481,8 +5449,7 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5494,7 +5461,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5510,6 +5477,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5552,8 +5520,7 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5565,7 +5532,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5581,6 +5548,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5628,8 +5596,7 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5641,7 +5608,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5657,6 +5624,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5700,10 +5668,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -5712,8 +5680,7 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5725,7 +5692,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5741,6 +5708,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5783,8 +5751,7 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5796,7 +5763,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5812,6 +5779,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5854,8 +5822,7 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5867,7 +5834,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5883,6 +5850,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5925,8 +5893,7 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5938,7 +5905,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5954,6 +5921,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5991,7 +5959,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -5999,13 +5967,11 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6021,11 +5987,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6041,11 +6007,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6061,11 +6027,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6081,11 +6047,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6101,11 +6067,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6121,11 +6087,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6141,17 +6107,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -6159,13 +6125,11 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6181,11 +6145,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6201,11 +6165,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6221,11 +6185,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6241,11 +6205,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6261,11 +6225,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6281,11 +6245,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6301,17 +6265,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -6321,13 +6285,11 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6345,11 +6307,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6367,11 +6329,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6389,11 +6351,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6411,11 +6373,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6433,11 +6395,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6455,11 +6417,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6477,17 +6439,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -6500,13 +6462,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6528,11 +6488,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6554,11 +6514,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6580,11 +6540,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6606,11 +6566,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6632,11 +6592,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6658,11 +6618,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6684,29 +6644,29 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xda 11b 0xe9 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6720,10 +6680,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6748,57 +6708,59 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6841,10 +6803,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -6925,10 +6887,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -6937,22 +6899,22 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb !11b /7" ], @@ -6962,19 +6924,20 @@ "ldr q2, [x0, #1040]", "str d2, [x4]", "mov x21, v2.d[1]", - "strh w21, [x4, #8]", + "add x22, x4, #0x8 (8)", + "strh w21, [x22]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -6982,13 +6945,11 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7004,11 +6965,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7024,11 +6985,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7044,11 +7005,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7064,11 +7025,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7084,11 +7045,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7104,11 +7065,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7124,17 +7085,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -7142,13 +7103,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7164,11 +7123,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7184,11 +7143,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7204,11 +7163,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7224,11 +7183,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7244,11 +7203,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7264,11 +7223,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7284,17 +7243,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -7303,13 +7262,11 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7326,11 +7283,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7347,11 +7304,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7368,11 +7325,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7389,11 +7346,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7410,11 +7367,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7431,11 +7388,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7452,17 +7409,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -7475,13 +7432,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7503,11 +7458,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7529,11 +7484,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7555,11 +7510,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7581,11 +7536,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7607,11 +7562,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7633,11 +7588,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7659,11 +7614,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7693,15 +7648,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7717,10 +7670,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7751,10 +7704,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7769,10 +7722,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7803,10 +7756,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7821,10 +7774,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7855,10 +7808,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7873,10 +7826,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7907,10 +7860,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7925,10 +7878,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7959,10 +7912,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7977,10 +7930,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8011,10 +7964,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8029,10 +7982,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8063,10 +8016,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8081,10 +8034,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8109,15 +8062,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8133,10 +8084,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8167,10 +8118,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8185,10 +8136,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8219,10 +8170,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8237,10 +8188,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8271,10 +8222,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8289,10 +8240,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8323,10 +8274,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8341,10 +8292,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8375,10 +8326,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8393,10 +8344,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8427,10 +8378,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8445,10 +8396,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8479,10 +8430,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8497,10 +8448,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8530,7 +8481,6 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8559,6 +8509,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8601,7 +8552,6 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8630,6 +8580,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8672,7 +8623,6 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8701,6 +8651,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8748,7 +8699,6 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8777,6 +8727,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8820,10 +8771,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -8832,7 +8783,6 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8861,6 +8811,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8903,7 +8854,6 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8932,6 +8882,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8974,7 +8925,6 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9003,6 +8953,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9045,7 +8996,6 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9074,6 +9024,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9111,7 +9062,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9119,9 +9070,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9155,7 +9104,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9166,10 +9115,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9202,7 +9151,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9213,10 +9162,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9249,7 +9198,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9260,10 +9209,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9296,7 +9245,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9307,10 +9256,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9343,7 +9292,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9354,10 +9303,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9390,7 +9339,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9401,10 +9350,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9437,7 +9386,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9448,10 +9397,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9484,12 +9433,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9497,9 +9446,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9533,7 +9480,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9544,10 +9491,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9580,7 +9527,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9591,10 +9538,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9627,7 +9574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9638,10 +9585,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9674,7 +9621,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9685,10 +9632,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9721,7 +9668,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9732,10 +9679,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9768,7 +9715,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9779,10 +9726,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9815,7 +9762,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9826,10 +9773,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9862,12 +9809,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9875,9 +9822,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9911,7 +9856,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10245,7 +10190,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10253,9 +10198,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10271,10 +10214,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10289,7 +10232,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10300,10 +10243,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10318,10 +10261,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10336,7 +10279,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10347,10 +10290,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10365,10 +10308,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10383,7 +10326,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10394,10 +10337,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10412,10 +10355,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10430,7 +10373,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10441,10 +10384,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10459,10 +10402,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10477,7 +10420,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10488,10 +10431,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10506,10 +10449,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10524,7 +10467,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10535,10 +10478,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10553,10 +10496,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10571,7 +10514,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10582,10 +10525,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10600,10 +10543,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10618,12 +10561,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10631,9 +10574,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10667,7 +10608,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11001,7 +10942,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -11009,9 +10950,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11027,10 +10966,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11045,7 +10984,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11056,10 +10995,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11074,10 +11013,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11092,7 +11031,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11103,10 +11042,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11121,10 +11060,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11139,7 +11078,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11150,10 +11089,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11168,10 +11107,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11186,7 +11125,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11197,10 +11136,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11215,10 +11154,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11233,7 +11172,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11244,10 +11183,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11262,10 +11201,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11280,7 +11219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11291,10 +11230,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11309,10 +11248,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11327,7 +11266,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11338,10 +11277,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11356,10 +11295,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11374,7 +11313,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11384,7 +11323,6 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11413,16 +11351,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11465,10 +11404,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -11549,10 +11488,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -11801,14 +11740,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -11929,24 +11866,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -11955,16 +11879,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -11975,16 +11899,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -11995,16 +11919,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12015,16 +11939,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12035,16 +11959,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12055,16 +11979,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12075,229 +11999,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12313,10 +12243,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12347,10 +12277,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12365,10 +12295,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12399,10 +12329,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12417,10 +12347,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12451,10 +12381,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12469,10 +12399,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12503,10 +12433,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12521,10 +12451,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12555,10 +12485,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12573,10 +12503,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12607,10 +12537,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12625,10 +12555,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12659,10 +12589,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12677,10 +12607,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12705,15 +12635,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12729,10 +12657,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12758,10 +12686,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -12771,12 +12699,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12790,10 +12718,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12818,10 +12746,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -12831,11 +12759,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12849,10 +12777,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12878,10 +12806,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -12891,11 +12819,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12909,10 +12837,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12938,10 +12866,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -12951,11 +12879,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12969,10 +12897,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12998,10 +12926,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -13011,11 +12939,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13029,10 +12957,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13058,10 +12986,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -13071,11 +12999,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13089,10 +13017,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13118,10 +13046,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -13131,11 +13059,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13149,10 +13077,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13178,10 +13106,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -13190,8 +13118,7 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13203,7 +13130,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13219,6 +13146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13261,8 +13189,7 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13274,7 +13201,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13290,6 +13217,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13332,8 +13260,7 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13345,7 +13272,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13361,6 +13288,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13408,8 +13336,7 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13421,7 +13348,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13437,6 +13364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13480,10 +13408,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -13492,8 +13420,7 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13505,7 +13432,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13521,6 +13448,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13563,8 +13491,7 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13576,7 +13503,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13592,6 +13519,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13634,8 +13562,7 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13647,7 +13574,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13663,6 +13590,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13705,8 +13633,7 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13718,7 +13645,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13734,6 +13661,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13771,15 +13699,13 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13813,16 +13739,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -13832,12 +13758,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13869,15 +13795,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -13887,11 +13813,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13923,16 +13849,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -13942,11 +13868,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13978,16 +13904,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -13997,11 +13923,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14033,16 +13959,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -14052,11 +13978,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14088,16 +14014,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -14107,11 +14033,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14143,16 +14069,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -14162,11 +14088,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14198,28 +14124,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14253,16 +14177,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -14272,12 +14196,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14309,15 +14233,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -14327,11 +14251,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14363,16 +14287,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -14382,11 +14306,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14418,16 +14342,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -14437,11 +14361,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14473,16 +14397,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -14492,11 +14416,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14528,16 +14452,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -14547,11 +14471,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14583,16 +14507,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -14602,11 +14526,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14638,31 +14562,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xde 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14676,10 +14600,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -14704,18 +14628,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14723,9 +14650,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14759,16 +14684,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -14815,15 +14740,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -14869,16 +14794,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -14924,16 +14849,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -14979,16 +14904,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -15034,16 +14959,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -15089,16 +15014,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -15144,20 +15069,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15165,9 +15090,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15183,10 +15106,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15201,16 +15124,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -15220,12 +15143,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15239,10 +15162,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15257,15 +15180,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -15275,11 +15198,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15293,10 +15216,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15311,16 +15234,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -15330,11 +15253,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15348,10 +15271,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15366,16 +15289,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -15385,11 +15308,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15403,10 +15326,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15421,16 +15344,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -15440,11 +15363,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15458,10 +15381,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15476,16 +15399,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -15495,11 +15418,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15513,10 +15436,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15531,16 +15454,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -15550,11 +15473,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15568,10 +15491,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15586,20 +15509,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15607,9 +15530,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15643,16 +15564,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -15699,15 +15620,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -15753,16 +15674,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -15808,16 +15729,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -15863,16 +15784,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -15918,16 +15839,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -15973,16 +15894,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -16028,20 +15949,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16049,9 +15970,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16067,10 +15986,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16085,16 +16004,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -16104,12 +16023,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16123,10 +16042,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16141,15 +16060,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -16159,11 +16078,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16177,10 +16096,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16195,16 +16114,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -16214,11 +16133,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16232,10 +16151,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16250,16 +16169,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -16269,11 +16188,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16287,10 +16206,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16305,16 +16224,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -16324,11 +16243,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16342,10 +16261,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16360,16 +16279,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -16379,11 +16298,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16397,10 +16316,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16415,16 +16334,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -16434,11 +16353,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16452,10 +16371,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16470,59 +16389,58 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "mov w23, #0x0", - "sxth x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16565,10 +16483,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -16649,10 +16567,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -16661,14 +16579,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16698,9 +16608,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16747,10 +16665,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -16869,15 +16787,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16893,10 +16809,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16921,11 +16837,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st1": { @@ -16935,12 +16851,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16954,10 +16870,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16981,11 +16897,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23", - "strb w21, [x28, #1298]" + "msr nzcv, x23" ] }, "fucomip st2": { @@ -16995,11 +16911,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17013,10 +16929,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17041,11 +16957,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st3": { @@ -17055,11 +16971,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17073,10 +16989,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17101,11 +17017,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st4": { @@ -17115,11 +17031,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17133,10 +17049,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17161,11 +17077,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st5": { @@ -17175,11 +17091,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17193,10 +17109,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17221,11 +17137,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st6": { @@ -17235,11 +17151,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17253,10 +17169,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17281,11 +17197,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st7": { @@ -17295,11 +17211,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17313,10 +17229,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17341,23 +17257,21 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17373,10 +17287,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17401,11 +17315,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st1": { @@ -17415,12 +17329,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17434,10 +17348,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17461,11 +17375,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23", - "strb w21, [x28, #1298]" + "msr nzcv, x23" ] }, "fcomip st2": { @@ -17475,11 +17389,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17493,10 +17407,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17521,11 +17435,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st3": { @@ -17535,11 +17449,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17553,10 +17467,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17581,11 +17495,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st4": { @@ -17595,11 +17509,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17613,10 +17527,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17641,11 +17555,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st5": { @@ -17655,11 +17569,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17673,10 +17587,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17701,11 +17615,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st6": { @@ -17715,11 +17629,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17733,10 +17647,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17761,11 +17675,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st7": { @@ -17775,11 +17689,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17793,10 +17707,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17821,15 +17735,15 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 287, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -17841,297 +17755,29 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] }, "memcpy4_64": { - "ExpectedInstructionCount": 287, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld qword [rax]", "fstp qword [rdx]", @@ -18143,293 +17789,25 @@ "fstp qword [rdx + 32]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr d2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", "ldr d2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", "ldr d2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index 485ee0cc2..14744f988 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -20,9 +20,9 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -36,9 +36,9 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -52,9 +52,9 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -75,9 +75,9 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -94,10 +94,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -106,9 +106,9 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -122,9 +122,9 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -138,9 +138,9 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -154,9 +154,9 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -165,20 +165,18 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -309,20 +307,18 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -453,15 +449,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -653,15 +647,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -679,10 +671,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -712,10 +704,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -745,10 +737,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -778,10 +770,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -811,10 +803,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -844,10 +836,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -877,10 +869,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -910,27 +902,25 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1061,20 +1051,18 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1085,13 +1073,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1103,13 +1091,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1121,13 +1109,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1139,13 +1127,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1157,13 +1145,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1175,13 +1163,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1193,32 +1181,30 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1349,20 +1335,18 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1373,13 +1357,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1391,13 +1375,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1409,13 +1393,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1427,13 +1411,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1445,13 +1429,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1463,13 +1447,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1481,13 +1465,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1498,19 +1482,19 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1541,10 +1525,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { @@ -1710,26 +1694,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -1746,13 +1728,13 @@ "ldr d2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -1769,13 +1751,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -1792,13 +1774,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -1815,13 +1797,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -1838,13 +1820,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -1861,13 +1843,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -1884,33 +1866,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -1920,17 +1891,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -1940,17 +1911,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -1960,17 +1931,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -1980,17 +1951,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -2000,17 +1971,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -2020,17 +1991,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -2040,17 +2011,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -2112,7 +2083,7 @@ ] }, "fxam": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd9 11b 0xe5 /4" ], @@ -2125,16 +2096,14 @@ "strb w21, [x28, #1017]", "ldrb w21, [x28, #1298]", "lsr w20, w21, w20", - "mov w21, #0x1", "and w20, w20, #0x1", - "mov w22, #0x0", - "mrs x23, nzcv", + "mrs x21, nzcv", "cmp x20, #0x1 (1)", - "csel x21, x22, x21, eq", - "strb w21, [x28, #1016]", + "cset x22, ne", + "strb w22, [x28, #1016]", "strb w20, [x28, #1018]", - "strb w21, [x28, #1022]", - "msr nzcv, x23" + "strb w22, [x28, #1022]", + "msr nzcv, x21" ] }, "fld1": { @@ -2143,19 +2112,19 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x3ff0000000000000", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -2164,22 +2133,22 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0xa372", + "movk x20, #0x979, lsl #16", + "movk x20, #0x934f, lsl #32", + "movk x20, #0x400a, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0xa372", - "movk x22, #0x979, lsl #16", - "movk x22, #0x934f, lsl #32", - "movk x22, #0x400a, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -2188,22 +2157,22 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x82fe", + "movk x20, #0x652b, lsl #16", + "movk x20, #0x1547, lsl #32", + "movk x20, #0x3ff7, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x82fe", - "movk x22, #0x652b, lsl #16", - "movk x22, #0x1547, lsl #32", - "movk x22, #0x3ff7, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -2212,22 +2181,22 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x2d18", + "movk x20, #0x5444, lsl #16", + "movk x20, #0x21fb, lsl #32", + "movk x20, #0x4009, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x2d18", - "movk x22, #0x5444, lsl #16", - "movk x22, #0x21fb, lsl #32", - "movk x22, #0x4009, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -2236,22 +2205,22 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x79ff", + "movk x20, #0x509f, lsl #16", + "movk x20, #0x4413, lsl #32", + "movk x20, #0x3fd3, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x79ff", - "movk x22, #0x509f, lsl #16", - "movk x22, #0x4413, lsl #32", - "movk x22, #0x3fd3, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -2260,22 +2229,22 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x39ef", + "movk x20, #0xfefa, lsl #16", + "movk x20, #0x2e42, lsl #32", + "movk x20, #0x3fe6, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x39ef", - "movk x22, #0xfefa, lsl #16", - "movk x22, #0x2e42, lsl #32", - "movk x22, #0x3fe6, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -2284,19 +2253,19 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "mov w20, #0x0", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -2364,25 +2333,20 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2433,9 +2397,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -2445,13 +2411,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2505,33 +2464,35 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x23, #0x3ff0000000000000", - "fmov d3, x23", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "mov x21, #0x3ff0000000000000", + "fmov d2, x21", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2585,9 +2546,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -2597,28 +2560,28 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x23, v2.d[0]", - "and x24, x23, #0x7ff0000000000000", - "lsr x24, x24, #52", - "sub x24, x24, #0x3ff (1023)", - "scvtf d2, x24", - "and x23, x23, #0x800fffffffffffff", - "orr x23, x23, #0x3ff0000000000000", - "fmov d3, x23", + "mov x21, v2.d[0]", + "and x22, x21, #0x7ff0000000000000", + "lsr x22, x22, #52", + "sub x22, x22, #0x3ff (1023)", + "scvtf d2, x22", + "and x21, x21, #0x800fffffffffffff", + "orr x21, x21, #0x3ff0000000000000", + "fmov d3, x21", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -2630,12 +2593,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2686,9 +2649,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -2724,12 +2687,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2780,34 +2743,33 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr d3, [x0, #1040]", "mov x20, #0x3ff0000000000000", - "fmov d4, x20", - "fadd d2, d2, d4", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "fmov d2, x20", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "fadd d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2858,9 +2820,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -2884,13 +2848,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2995,12 +2952,19 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -3026,12 +2990,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3146,9 +3110,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -3211,9 +3175,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -3222,9 +3186,9 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -3238,9 +3202,9 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -3254,9 +3218,9 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3277,9 +3241,9 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3296,10 +3260,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -3308,9 +3272,9 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -3324,9 +3288,9 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -3340,9 +3304,9 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -3356,9 +3320,9 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -3367,7 +3331,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -3375,15 +3339,13 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st1": { @@ -3397,13 +3359,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st2": { @@ -3417,13 +3379,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st3": { @@ -3437,13 +3399,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st4": { @@ -3457,13 +3419,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st5": { @@ -3477,13 +3439,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st6": { @@ -3497,13 +3459,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st7": { @@ -3517,17 +3479,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -3535,15 +3497,13 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st1": { @@ -3557,13 +3517,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st2": { @@ -3577,13 +3537,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st3": { @@ -3597,13 +3557,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st4": { @@ -3617,13 +3577,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st5": { @@ -3637,13 +3597,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st6": { @@ -3657,13 +3617,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st7": { @@ -3677,17 +3637,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -3697,15 +3657,13 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st1": { @@ -3721,13 +3679,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st2": { @@ -3743,13 +3701,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st3": { @@ -3765,13 +3723,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st4": { @@ -3787,13 +3745,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st5": { @@ -3809,13 +3767,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st6": { @@ -3831,13 +3789,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st7": { @@ -3853,17 +3811,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -3876,15 +3834,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3904,13 +3860,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3930,13 +3886,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3956,13 +3912,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3982,13 +3938,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4008,13 +3964,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4034,13 +3990,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4060,18 +4016,18 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 32, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4097,14 +4053,17 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { @@ -4113,19 +4072,19 @@ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "scvtf d2, w22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4143,10 +4102,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -4179,10 +4138,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -4191,7 +4150,6 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4219,16 +4177,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4274,14 +4233,14 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -4289,15 +4248,13 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st1": { @@ -4311,13 +4268,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st2": { @@ -4331,13 +4288,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st3": { @@ -4351,13 +4308,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st4": { @@ -4371,13 +4328,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st5": { @@ -4391,13 +4348,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st6": { @@ -4411,13 +4368,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st7": { @@ -4431,17 +4388,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -4449,15 +4406,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st1": { @@ -4471,13 +4426,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st2": { @@ -4491,13 +4446,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st3": { @@ -4511,13 +4466,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st4": { @@ -4531,13 +4486,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st5": { @@ -4551,13 +4506,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st6": { @@ -4571,13 +4526,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st7": { @@ -4591,17 +4546,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -4610,15 +4565,13 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st1": { @@ -4633,13 +4586,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st2": { @@ -4654,13 +4607,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st3": { @@ -4675,13 +4628,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st4": { @@ -4696,13 +4649,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st5": { @@ -4717,13 +4670,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st6": { @@ -4738,13 +4691,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st7": { @@ -4759,17 +4712,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -4782,15 +4735,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4810,13 +4761,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4836,13 +4787,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4862,13 +4813,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4888,13 +4839,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4914,13 +4865,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4940,13 +4891,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4966,13 +4917,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -5008,15 +4959,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5208,15 +5157,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5413,8 +5360,8 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -5428,8 +5375,8 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -5443,8 +5390,8 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5465,8 +5412,8 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5483,10 +5430,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -5495,8 +5442,8 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -5510,8 +5457,8 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -5525,8 +5472,8 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -5540,8 +5487,8 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -5550,7 +5497,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5558,14 +5505,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5576,14 +5521,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5594,14 +5539,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5612,14 +5557,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5630,14 +5575,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5648,14 +5593,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5666,14 +5611,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5684,19 +5629,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5704,14 +5649,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5722,14 +5665,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5740,14 +5683,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5758,14 +5701,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5776,14 +5719,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5794,14 +5737,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5812,14 +5755,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5830,19 +5773,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5850,14 +5793,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5988,7 +5929,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5996,14 +5937,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6014,14 +5953,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6032,14 +5971,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6050,14 +5989,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6068,14 +6007,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6086,14 +6025,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6104,14 +6043,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6122,19 +6061,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6142,14 +6081,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6280,7 +6217,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6288,14 +6225,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6306,14 +6241,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6324,14 +6259,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6342,14 +6277,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6360,14 +6295,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6378,14 +6313,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6396,14 +6331,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6414,14 +6349,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6431,18 +6366,18 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6460,10 +6395,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -6492,10 +6427,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -7178,14 +7113,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -7306,24 +7239,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -7332,16 +7252,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldr d2, [x0, #1040]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -7352,16 +7272,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7372,16 +7292,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7392,16 +7312,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7412,16 +7332,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7432,16 +7352,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7452,229 +7372,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7866,15 +7792,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7892,10 +7816,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -7925,10 +7849,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -7958,10 +7882,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -7991,10 +7915,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -8024,10 +7948,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -8057,10 +7981,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -8090,10 +8014,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -8123,10 +8047,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -8135,10 +8059,10 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -8152,10 +8076,10 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -8169,10 +8093,10 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8193,10 +8117,10 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8213,10 +8137,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -8225,10 +8149,10 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -8242,10 +8166,10 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -8259,10 +8183,10 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -8276,10 +8200,10 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -8288,29 +8212,27 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -8320,23 +8242,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -8346,23 +8268,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -8372,23 +8294,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -8398,23 +8320,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -8424,23 +8346,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -8450,23 +8372,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -8476,49 +8398,47 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -8528,23 +8448,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -8554,23 +8474,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -8580,23 +8500,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -8606,23 +8526,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -8632,23 +8552,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -8658,23 +8578,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -8684,27 +8604,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 32, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8730,18 +8650,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8749,23 +8672,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -8783,15 +8704,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -8808,16 +8729,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -8834,16 +8755,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -8860,16 +8781,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -8886,16 +8807,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -8912,16 +8833,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -8938,20 +8859,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8959,23 +8880,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -8985,23 +8904,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -9011,23 +8930,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -9037,23 +8956,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -9063,23 +8982,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -9089,23 +9008,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -9115,23 +9034,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -9141,27 +9060,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9169,23 +9088,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -9203,15 +9120,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -9228,16 +9145,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -9254,16 +9171,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -9280,16 +9197,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -9306,16 +9223,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -9332,16 +9249,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -9358,20 +9275,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9379,23 +9296,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -9405,23 +9320,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w23, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x22, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -9431,23 +9346,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -9457,23 +9372,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -9483,23 +9398,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -9509,23 +9424,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -9535,23 +9450,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -9561,23 +9476,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { @@ -9586,20 +9501,20 @@ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "sxth x22, w22", - "scvtf d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9617,10 +9532,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -9653,10 +9568,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -9665,14 +9580,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9728,9 +9635,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9804,10 +9719,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -9926,15 +9841,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -9951,11 +9864,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st1": { @@ -9984,11 +9897,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st2": { @@ -10017,11 +9930,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st3": { @@ -10050,11 +9963,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st4": { @@ -10083,11 +9996,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st5": { @@ -10116,11 +10029,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st6": { @@ -10149,11 +10062,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st7": { @@ -10182,23 +10095,21 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10215,11 +10126,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st1": { @@ -10248,11 +10159,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st2": { @@ -10281,11 +10192,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st3": { @@ -10314,11 +10225,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st4": { @@ -10347,11 +10258,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st5": { @@ -10380,11 +10291,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st6": { @@ -10413,11 +10324,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st7": { @@ -10446,15 +10357,15 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 83, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -10466,93 +10377,29 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "fcvt d2, s2", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", "ldr s2, [x4, #12]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] }, "memcpy4_64": { - "ExpectedInstructionCount": 75, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld qword [rax]", "fstp qword [rdx]", @@ -10564,81 +10411,25 @@ "fstp qword [rdx + 32]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr d2, [x4, #8]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", "ldr d2, [x4, #16]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", "ldr d2, [x4, #32]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } }