From dba0a1d09ea688c436ad1e2ee103cc59ca2981d0 Mon Sep 17 00:00:00 2001
From: Billy Laws <blaws05@gmail.com>
Date: Fri, 12 Jul 2024 17:31:45 +0100
Subject: [PATCH] ARM64EC: Initialize x86 control registers on thread start

---
 Source/Windows/ARM64EC/Module.cpp | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/Source/Windows/ARM64EC/Module.cpp b/Source/Windows/ARM64EC/Module.cpp
index ea835ada9..39d2da8a7 100644
--- a/Source/Windows/ARM64EC/Module.cpp
+++ b/Source/Windows/ARM64EC/Module.cpp
@@ -63,6 +63,10 @@ struct ThreadCPUArea {
     return Area->EmulatorStackBase;
   }
 
+  ARM64EC_NT_CONTEXT& ContextAmd64() const {
+    return *Area->ContextAmd64;
+  }
+
   FEXCore::Core::CpuStateFrame*& StateFrame() const {
     return reinterpret_cast<FEXCore::Core::CpuStateFrame*&>(Area->EmulatorData[0]);
   }
@@ -572,6 +576,19 @@ NTSTATUS ThreadInit() {
   uint64_t EnterECFillSRA = Thread->CurrentFrame->Pointers.Common.DispatcherLoopTopEnterECFillSRA;
   CPUArea.DispatcherLoopTopEnterECFillSRA() = EnterECFillSRA;
 
+  CPUArea.ContextAmd64() = {.ContextFlags = CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT,
+                            .AMD64_SegCs = 0x33,
+                            .AMD64_SegDs = 0x2b,
+                            .AMD64_SegEs = 0x2b,
+                            .AMD64_SegFs = 0x53,
+                            .AMD64_SegGs = 0x2b,
+                            .AMD64_SegSs = 0x2b,
+                            .AMD64_EFlags = 0x202,
+                            .AMD64_MxCsr = 0x1f80,
+                            .AMD64_MxCsr_copy = 0x1f80,
+                            .AMD64_ControlWord = 0x27f};
+  Exception::LoadStateFromECContext(Thread, CPUArea.ContextAmd64().AMD64_Context);
+
   {
     std::scoped_lock Lock(ThreadCreationMutex);
     Threads.emplace(GetCurrentThreadId(), Thread);