From fbf5325bdd4ff3a7e5b7b71e6c130e3b2463e3d2 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Thu, 18 Mar 2021 00:15:48 -0700 Subject: [PATCH] Enables Invariant TSC CPUID bit I keep forgetting to enable this bit. Fixes #855 --- External/FEXCore/Source/Interface/Core/CPUID.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/External/FEXCore/Source/Interface/Core/CPUID.cpp b/External/FEXCore/Source/Interface/Core/CPUID.cpp index ce753ee7b..75a64b741 100644 --- a/External/FEXCore/Source/Interface/Core/CPUID.cpp +++ b/External/FEXCore/Source/Interface/Core/CPUID.cpp @@ -448,6 +448,8 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0006h() { FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0007h() { FEXCore::CPUID::FunctionResults Res{}; Res.eax = (1 << 2); // APIC timer not affected by p-state + Res.edx = + (1 << 8); // Invariant TSC return Res; }