From e194aa28e4474a6d3361760bbb539e91c0dd8df2 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Fri, 11 Sep 2020 16:23:00 -0700 Subject: [PATCH] Removes a couple of unnecessary variables to improve reentrancy chances We still aren't 100% reentrant safe in the case that the cores are interrupted while running, but this is a step in the right direction --- .../Source/Interface/Core/JIT/Arm64/JIT.cpp | 13 ++++++------ .../Interface/Core/JIT/Arm64/JITClass.h | 1 - .../Source/Interface/Core/JIT/x86_64/JIT.cpp | 20 ++++++------------- .../Interface/Core/JIT/x86_64/JITClass.h | 2 -- 4 files changed, 12 insertions(+), 24 deletions(-) diff --git a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp index 55fdd45aa..9944f1056 100644 --- a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp +++ b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp @@ -575,10 +575,9 @@ aarch64::VRegister JITCore::GetDst(uint32_t Node) { void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const *IR, [[maybe_unused]] FEXCore::Core::DebugData *DebugData) { using namespace aarch64; JumpTargets.clear(); - CurrentIR = IR; - uint32_t SSACount = CurrentIR->GetSSACount(); + uint32_t SSACount = IR->GetSSACount(); - auto HeaderOp = CurrentIR->GetHeader(); + auto HeaderOp = IR->GetHeader(); if (HeaderOp->ShouldInterpret) { return reinterpret_cast(InterpreterFallbackHelperAddress); } @@ -626,13 +625,13 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const stp(TMP1, lr, MemOperand(sp, -16, PreIndex)); } - for (auto [BlockNode, BlockHeader] : CurrentIR->GetBlocks()) { + for (auto [BlockNode, BlockHeader] : IR->GetBlocks()) { using namespace FEXCore::IR; auto BlockIROp = BlockHeader->CW(); LogMan::Throw::A(BlockIROp->Header.Op == IR::OP_CODEBLOCK, "IR type failed to be a code block"); { - uint32_t Node = CurrentIR->GetID(BlockNode); + uint32_t Node = IR->GetID(BlockNode); auto IsTarget = JumpTargets.find(Node); if (IsTarget == JumpTargets.end()) { IsTarget = JumpTargets.try_emplace(Node).first; @@ -641,8 +640,8 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const bind(&IsTarget->second); } - for (auto [CodeNode, IROp] : CurrentIR->GetCode(BlockNode)) { - uint32_t ID = CurrentIR->GetID(CodeNode); + for (auto [CodeNode, IROp] : IR->GetCode(BlockNode)) { + uint32_t ID = IR->GetID(CodeNode); // Execute handler OpHandler Handler = OpHandlers[IROp->Op]; diff --git a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h index 5f457f871..8160234b7 100644 --- a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h +++ b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h @@ -103,7 +103,6 @@ public: private: FEXCore::Context::Context *CTX; FEXCore::Core::InternalThreadState *State; - FEXCore::IR::IRListView const *CurrentIR; std::map JumpTargets; diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp index 0a2927066..75c30ad67 100644 --- a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp +++ b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp @@ -263,7 +263,6 @@ JITCore::JITCore(FEXCore::Context::Context *ctx, FEXCore::Core::InternalThreadSt , InitialCodeBuffer {Buffer} { CurrentCodeBuffer = &InitialCodeBuffer; - Stack.resize(9000 * 16 * 64); RAPass = Thread->PassManager->GetRAPass(); @@ -417,10 +416,9 @@ Xbyak::Xmm JITCore::GetDst(uint32_t Node) { void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const *IR, [[maybe_unused]] FEXCore::Core::DebugData *DebugData) { JumpTargets.clear(); - CurrentIR = IR; - uint32_t SSACount = CurrentIR->GetSSACount(); + uint32_t SSACount = IR->GetSSACount(); - auto HeaderOp = CurrentIR->GetHeader(); + auto HeaderOp = IR->GetHeader(); if (HeaderOp->ShouldInterpret) { return InterpreterFallbackHelperAddress; } @@ -432,11 +430,6 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const ThreadState->CTX->ClearCodeCache(ThreadState, HeaderOp->Entry); } - uint64_t ListStackSize = SSACount * 16; - if (ListStackSize > Stack.size()) { - Stack.resize(ListStackSize); - } - void *Entry = getCurr(); LogMan::Throw::A(RAPass->HasFullRA(), "Needs RA"); @@ -507,14 +500,13 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const ret(); }; - for (auto [BlockNode, BlockHeader] : CurrentIR->GetBlocks()) { + for (auto [BlockNode, BlockHeader] : IR->GetBlocks()) { using namespace FEXCore::IR; - { auto BlockIROp = BlockHeader->CW(); LogMan::Throw::A(BlockIROp->Header.Op == IR::OP_CODEBLOCK, "IR type failed to be a code block"); - uint32_t Node = CurrentIR->GetID(BlockNode); + uint32_t Node = IR->GetID(BlockNode); auto IsTarget = JumpTargets.find(Node); if (IsTarget == JumpTargets.end()) { IsTarget = JumpTargets.try_emplace(Node).first; @@ -523,9 +515,9 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView const L(IsTarget->second); } - for (auto [CodeNode, IROp] : CurrentIR->GetCode(BlockNode)) { + for (auto [CodeNode, IROp] : IR->GetCode(BlockNode)) { uint8_t OpSize = IROp->Size; - uint32_t Node = CurrentIR->GetID(CodeNode); + uint32_t Node = IR->GetID(CodeNode); #ifdef DEBUG_RA if (IROp->Op != IR::OP_BEGINBLOCK && diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h index a091f9d5f..4c52352ab 100644 --- a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h +++ b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h @@ -73,10 +73,8 @@ public: private: FEXCore::Context::Context *CTX; FEXCore::Core::InternalThreadState *ThreadState; - FEXCore::IR::IRListView const *CurrentIR; std::unordered_map JumpTargets; - std::vector Stack; bool MemoryDebug = false; /**