From 7eb8ceafbe3846692146ecba44c35406082b2c8f Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Fri, 17 Apr 2020 15:23:44 -0700
Subject: [PATCH 1/3] Ensures IRList doesn't store stale aliased data in cache

---
 External/FEXCore/Source/Interface/Core/Core.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/External/FEXCore/Source/Interface/Core/Core.cpp b/External/FEXCore/Source/Interface/Core/Core.cpp
index b43634818..ba1ac6b10 100644
--- a/External/FEXCore/Source/Interface/Core/Core.cpp
+++ b/External/FEXCore/Source/Interface/Core/Core.cpp
@@ -468,6 +468,12 @@ namespace FEXCore::Context {
     auto BlockMapPtr = Thread->BlockCache->AddBlockMapping(Address, Ptr);
     if (BlockMapPtr == 0) {
       Thread->BlockCache->ClearCache();
+
+      // Pull out the current IR we added and store it back after we cleared the rest of the list
+      // Needed in the case the the block mapping has aliased
+      auto IR = Thread->IRLists.find(Address)->second.release();
+      Thread->IRLists.clear();
+      Thread->IRLists.try_emplace(Address, IR);
       BlockMapPtr = Thread->BlockCache->AddBlockMapping(Address, Ptr);
       LogMan::Throw::A(BlockMapPtr, "Couldn't add mapping after clearing mapping cache");
     }

From e74c168aa752b9dba206b158a57864ee69e0f20e Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Fri, 17 Apr 2020 15:24:20 -0700
Subject: [PATCH 2/3] Ensures we still get debug data when IR for code already
 exists

---
 External/FEXCore/Source/Interface/Core/Core.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/External/FEXCore/Source/Interface/Core/Core.cpp b/External/FEXCore/Source/Interface/Core/Core.cpp
index ba1ac6b10..74cc69e86 100644
--- a/External/FEXCore/Source/Interface/Core/Core.cpp
+++ b/External/FEXCore/Source/Interface/Core/Core.cpp
@@ -601,6 +601,10 @@ namespace FEXCore::Context {
     }
     else {
       IRList = IR->second.get();
+      auto Debugit = Thread->DebugData.find(GuestRIP);
+      if (Debugit != Thread->DebugData.end()) {
+        DebugData = &Debugit->second;
+      }
     }
 
     // Attempt to get the CPU backend to compile this code

From 74578d3ef4b3b8c6d3e6824c39fa41ff5d33e94f Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Fri, 17 Apr 2020 15:25:18 -0700
Subject: [PATCH 3/3] Ensure the Interpreter and x86 JIT doesn't crash if
 DebugData isn't provided

---
 .../Source/Interface/Core/Interpreter/InterpreterCore.cpp   | 6 ++++--
 External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp   | 4 +++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp
index 3199eebca..b77c0d5ab 100644
--- a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp
+++ b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp
@@ -110,7 +110,6 @@ void *InterpreterCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView<true
 
 void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
   auto IR = Thread->IRLists.find(Thread->State.State.rip);
-  auto DebugData = Thread->DebugData.find(Thread->State.State.rip);
   CurrentIR = IR->second.get();
 
   TmpOffset = 0; // Reset where we are in the temp data range
@@ -3838,7 +3837,10 @@ void InterpreterCore::ExecuteCode(FEXCore::Core::InternalThreadState *Thread) {
     }
   }
 
-  Thread->Stats.InstructionsExecuted.fetch_add(DebugData->second.GuestInstructionCount);
+  auto DebugData = Thread->DebugData.find(Thread->State.State.rip);
+  if (DebugData != Thread->DebugData.end()) {
+    Thread->Stats.InstructionsExecuted.fetch_add(DebugData->second.GuestInstructionCount);
+  }
 }
 
 FEXCore::CPU::CPUBackend *CreateInterpreterCore(FEXCore::Context::Context *ctx) {
diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
index daab28cd3..1d990a00b 100644
--- a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
+++ b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
@@ -4465,7 +4465,9 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView<true> const
 
   ready();
 
-  DebugData->HostCodeSize = reinterpret_cast<uintptr_t>(Exit) - reinterpret_cast<uintptr_t>(Entry);
+  if (DebugData) {
+    DebugData->HostCodeSize = reinterpret_cast<uintptr_t>(Exit) - reinterpret_cast<uintptr_t>(Entry);
+  }
   return Entry;
 }