Ryan Houdek
0e0f3f9290
LookupCache: Use a PMR map for our Blocklinks with monotonic allocator
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We generate a /lot/ of block links which causes our shutdown time to
take a while for this map. For short running applications this shutdown
time can take a statistically significant amount of time, and this has
been haunting us for a while.
Using a monotonic buffer resource, we can cut the dellocation time down
to effectively zero on cache clear and shutdown.
For short running applications this basically means we clear their
shutdown time, for long running applications this means a cache clear is
less painful.
I've measured up to 2ms , but more often this takes ~0.5ms before
optimization. Now it is consistently ~0.25ms on a short running
application.
Times will vary /greatly/ depending on how full it has filled this map.
2022-12-23 09:41:54 -08:00
Mai
bf7d0f7ed9
Merge pull request #2287 from Sonicadvance1/rename_getreg
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Arm64: Rename GetSrcPair, GetDst, and GetSrc
2022-12-22 08:40:10 +00:00
lioncash
94cb2ddae7
OpcodeDispatcher: Handle VPMULHRSW
2022-12-22 08:21:35 +00:00
lioncash
0496f8d5c1
OpcodeDispatcher: Move PMULHRSW impl to helper
2022-12-22 08:13:43 +00:00
Ryan Houdek
37a9588855
Arm64: Rename GetSrcPair to GetRegPair
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This matches the other handler's names and isn't only for source
registers, but also destination registers.
2022-12-22 00:03:41 -08:00
Ryan Houdek
24f72b5f30
Arm64: Rename GetDst & GetSrc to GetVReg
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These only resolved to getting vector registers now and having
duplicating handlers for it was just confusing.
2022-12-21 23:59:21 -08:00
lioncash
d927c4a903
OpcodeDispatcher: Handle VPMULHUW
2022-12-22 07:52:27 +00:00
lioncash
12afe95602
OpcodeDispatcher: Handle VPMULHW
2022-12-22 07:52:24 +00:00
lioncash
7e715b9e04
OpcodeDispatcher: Move PMULHW impl to helper
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This can be used with AVX variants.
2022-12-22 07:33:26 +00:00
lioncash
4f9402e5dd
OpcodeDispatcher: Handle VPHMINPOSUW
2022-12-22 02:46:08 +00:00
lioncash
789093d158
OpcodeDispatcher: Move VPHMINPOSUW impl to separate function
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This will be used with the AVX variant.
2022-12-22 02:38:31 +00:00
lioncash
d672528e62
OpcodeDispatcher: Handle VPMULUDQ
2022-12-22 02:18:37 +00:00
lioncash
d7c959090d
OpcodeDispatcher: Handle VPMULDQ
2022-12-22 02:08:53 +00:00
lioncash
0a4846a524
OpcodeDispatcher: Factor PMULLOp impl to regular function
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This can be reused for the AVX implementations.
2022-12-22 01:30:06 +00:00
lioncash
2d9cb65d5c
OpcodeDispatcher: Handle VCMPSD
2022-12-21 20:46:07 +00:00
lioncash
e21002e0d7
OpcodeDispatcher: Handle VCMPSS
2022-12-21 20:39:13 +00:00
Ryan Houdek
ce351282f2
Merge pull request #2282 from lioncash/debug
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OpcodeDispatcher: Remove lingering debug log from VPFCMPOp
2022-12-21 00:53:13 -08:00
lioncash
ab41856328
OpcodeDispatcher: Remove lingering debug log from VPFCMPOp
2022-12-21 08:40:27 +00:00
Ryan Houdek
345e9b97bf
Merge pull request #2281 from lioncash/assert
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OpcodeDispatcher: Convert runtime assert to static_assert in SHUFOps
2022-12-21 00:23:24 -08:00
lioncash
f850a02d3f
OpcodeDispatcher: Convert runtime assert to static_assert in SHUFOps
2022-12-21 08:05:32 +00:00
lioncash
983b53a0c2
OpcodeDispatcher: Handle VCMPPD
2022-12-21 06:12:14 +00:00
lioncash
10a6b5794b
OpcodeDispatcher: Handle VCMPPS
2022-12-21 05:57:24 +00:00
lioncash
2c5aceb9b6
OpcodeDispatcher: Factor out VFCMPOp impl into a regular function
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This can be used with AVX implementations.
2022-12-21 05:27:10 +00:00
Ryan Houdek
1668db046d
Merge pull request #2279 from lioncash/psrldq
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OpcodeDispatcher: Handle VPSRLDQ
2022-12-20 21:06:57 -08:00
lioncash
825e921940
OpcodeDispatcher: Handle VPSRLDQ
2022-12-21 04:51:49 +00:00
lioncash
c06f0b7cb3
OpcodeDispatcher: Remove usage of VMov in VPSLLDQOp
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The extract operation essentially does this for us.
2022-12-21 04:13:26 +00:00
Ryan Houdek
4aed60ee3d
Merge pull request #2277 from lioncash/cvt
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OpcodeDispatcher: Handle VCVTDQ2PD/VCVTDQ2PS
2022-12-20 20:02:12 -08:00
lioncash
da9f7ec31f
OpcodeDispatcher: Handle VCVTDQ2PD
2022-12-21 03:45:00 +00:00
lioncash
8ec932fc4c
OpcodeDispatcher: Handle VCVTDQ2PS
2022-12-21 03:44:56 +00:00
lioncash
6f35a23161
x86_64/ConversionOps: Don't clear upper lane in Vector_SToF
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If Dst and Vector are the same, this will obliterate the top lane data
that needs to be operated on in the 128-bit case.
2022-12-21 03:40:38 +00:00
lioncash
bd70af9724
OpcodeDispatcher: Move Vector_CVT_Int_To_Float impl to regular function
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This can be used with the AVX implementation as well.
2022-12-21 02:23:04 +00:00
lioncash
bdba062f72
VEXTables: Amend VCVTTPS2DQ name
2022-12-21 02:17:31 +00:00
lioncash
d591b1ed8c
Interpreter: Prevent overrun with 256-bit VExtr
2022-12-21 01:51:25 +00:00
lioncash
3bae4a225c
OpcodeDispatcher: Handle VPSLLDQ
2022-12-21 01:46:17 +00:00
Ryan Houdek
d0cb329608
Merge pull request #2275 from lioncash/sha1
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OpcodeDispatcher: Simplify SHA1MSG1 implementation
2022-12-20 12:49:41 -08:00
lioncash
bb80e7d45c
OpcodeDispatcher: Simplify SHA1MSG1 implementation
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We can just arrange the elements into a vector and XOR them all at once
2022-12-20 19:49:08 +00:00
lioncash
109ed7d112
OpcodeDispatcher: Handle VPSRLQ (immediate)
2022-12-20 19:24:58 +00:00
lioncash
133a644231
OpcodeDispatcher: Handle VPSRLD (immediate)
2022-12-20 19:12:16 +00:00
lioncash
666f8bfbd9
OpcodeDispatcher: Handle VPSRLW (immediate)
2022-12-20 19:07:47 +00:00
Ryan Houdek
1800451251
Merge pull request #2273 from lioncash/keygen
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OpcodeDispatcher: Handle 128-bit AVX AES instructions
2022-12-20 10:52:53 -08:00
lioncash
7931bd1004
OpcodeDispatcher: Handle VAESDECLAST (128-bit)
2022-12-20 17:34:17 +00:00
lioncash
58978dd047
OpcodeDispatcher: Handle VAESDEC (128-bit)
2022-12-20 17:26:19 +00:00
lioncash
25fb243ac7
OpcodeDispatcher: Handle VAESENCLAST (128-bit)
2022-12-20 17:11:47 +00:00
lioncash
84f1e7ad4c
OpcodeDispatcher: Handle VAESENC (128-bit)
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Only 128-bit is required to be handled by base-level AVX.
The VAES feature flag indicates support for 256-bit VAESENC
2022-12-20 16:58:01 +00:00
lioncash
3fb5835453
OpcodeDispatcher: Handle VAESIMC
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VAESIMC behaves exactly like AESIMC, except the upper lane of the vector
is always cleared.
2022-12-20 16:49:03 +00:00
lioncash
bcb6726b22
OpcodeDispatcher: Handle VAESKEYGENASSIST
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This does the exact same thing as AESKEYGENASSIST, except that the upper
lane gets cleared.
2022-12-20 16:15:42 +00:00
lioncash
2bed562eb6
OpcodeDispatcher: Extract AESKeyGenAssist impl to helper function
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This can be reused for the AVX variant.
2022-12-20 16:01:25 +00:00
lioncash
bae7209224
OpcodeDispatcher: Handle VPSRAD (immediate)
2022-12-20 15:49:38 +00:00
lioncash
b53f8944ac
OpcodeDispatcher: Handle VPSRAW (immediate)
2022-12-20 15:40:49 +00:00
Ryan Houdek
0d7c086b69
Arm64: Enables debug option for disassembling the JIT code
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This is useful as a debug option and will be useful to have in upstream
while comparing output between current vixl emitter and the new emitter.
With this in place I can easily do binary comparisons to see where I
have mistakes in the new emitter.
We don't want this enabled in release builds as it is a debug feature.
This has already caught a bunch of mistakes, so make it easier by
upstreaming.
It'll likely be useful in the future as well when we are inspecting code
running in the vixl simulator.
2022-12-18 14:56:40 -08:00
Ryan Houdek