Commit Graph
2362 Commits
Author SHA1 Message Date
Ryan Houdek 21fbcef0bd Merge pull request #2453 from lioncash/explicit
ARMEmitter: Make VRegister constructor explicit
2023-03-01 17:54:49 -08:00
Ryan Houdek ef02083767 Merge pull request #2452 from lioncash/consecutive
ARMEmitter: Handle sequential registers in lists nicer
2023-03-01 17:53:47 -08:00
Lioncache 11f65df554 ARMEmitter: Make VRegister constructor explicit
All other parameter taking constructors for the other register types are
explicit, so this just makes behavior more consistent.
2023-03-01 16:48:10 -05:00
Lioncache 29ff642499 ARMEmitter: Make use of sequential register helper
Fixes assertion behavior on quite a bit of ASIMD load-store operations
as well as a few SVE ops as well
2023-03-01 15:25:46 -05:00
Lioncache d36517a9d3 ARMEmitter: Add helper for determining if vectors are sequential
A few vector instructions that take register lists often require
vector registers within the list to be sequential in the form of an
increasing list modulo the register file size.

For example:

v1,  v2, v3, v4
v31, v0, v1, v2

both fit these requirements.

This will be used to enforce this restriction within the asserts from a
single place.
2023-03-01 15:24:07 -05:00
Lioncache 83419b410d ARMEmitter: Simplify size handling Advanced SIMD 3 different group
A large amount of size handling in this category is just decrementing
the size by 1, so we can tidy up a bunch of conditionals by just doing
that instead.
2023-03-01 11:04:40 -05:00
Ryan Houdek 5b9fe8f26b CPUID: Adds an config option to hide hypervisor bit
This is known to cause issues in some cases. We hit the first game that
checks for this bit and early exits if it is found.

Lets the MMORPG Tibia run in non-VM situations.
Looks like they have more checks for VMs other than hypervisor bit, so
running under Parallels still won't work. Running on bare Linux is fine.
2023-02-27 23:11:23 -08:00
Lioncache dd290f129f ARMEmitter: Simplify advanced SIMD copy
Same behavior, but collapses some if statements.
2023-02-27 22:32:39 -05:00
Ryan Houdek 1832cc80d6 Merge pull request #2445 from lioncash/unsigned
ARMEmitter: Centralize handling for unsigned offset load-stores
2023-02-27 18:18:30 -08:00
Ryan Houdek fe1faf9ebe Merge pull request #2444 from lioncash/scalar
ARMEmitter: Handle SVE Integer Compare - Scalars group
2023-02-27 18:16:31 -08:00
Lioncache 12d0a7fa98 ARMEmitter: Use constants for unsigned offset encoding limits
Allows us to give some names to these constants that are used in the
JIT instead of writing them by hand.
2023-02-27 17:44:17 -05:00
Lioncache c1b08079f3 ARMEmitter: Strengthen unsigned immediate load/store helper
Centralizes all the shifting behavior and whatnot into a single
function, making everything much more localized.

Also gets rid of a lot of magic constants related to the encoding limits
of immediates.
2023-02-27 17:44:13 -05:00
Lioncache 1c388b455a ARMEmitter: Move missed SVE public helpers into private section 2023-02-27 14:45:59 -05:00
Lioncache 9426abc98d ARMEmitter: Handle SVE pointer conflict compare group 2023-02-27 14:27:29 -05:00
Lioncache 5ee2db34a7 ARMEmitter: Handle SVE conditionally terminate scalars group 2023-02-27 14:22:57 -05:00
Lioncache ad37c19043 ARMEmitter: Handle SVE integer compare scalar count and limit group 2023-02-27 14:09:40 -05:00
Ryan Houdek 0e6c5911b8 Dispatcher: Fixes crash with misalign stack returning from signal
When we were taking a signal that had a misaligned stack, we would store
the host stack at a weird offset.

After that point when we were trying to sigreturn we wouldn't know the
alignment of the stack coming back and we would try loading the host
stack from the wrong offset. Easy fix is to just align the host stack
location.

Fixes Ender Lilies, which was consistently crashing from a SIGCHLD due
to having a misaligned stack.

Side-change: Move the cookie check to the start of the restore. Doesn't
make sense to check the cookie after restoring state since it could be
quite wrong.
2023-02-26 19:58:22 -08:00
Ryan Houdek f2aa0026b5 Merge pull request #2439 from lioncash/log
Emitter/ALUOps: Fix typos in log messages
2023-02-23 16:44:19 -08:00
Lioncache 553efbeb29 Emitter/ALUOps: Fix typos in log messages
Fixes a few incorrect instruction names in the logs.
2023-02-23 19:14:45 -05:00
Lioncache 85f7f8e6c0 OpcodeDispatcher: Restrict partial XMM stores to FPRs in StoreResult_WithOpSize
As far as I know, nothing actually uses this path. Partially resolves
the TODO of dealing with partial writes.
2023-02-23 18:48:24 -05:00
Ryan Houdek 4d25de31de Merge pull request #2437 from lioncash/dup
OpcodeDispatcher: Remove now unused _VDupElement path in LoadSource_WithOpSize
2023-02-23 13:58:09 -08:00
Ryan Houdek 9e01730c6c Merge pull request #2436 from lioncash/builtin
Arm64Emitter: Use bit utils wrapper over __builtin_ffs
2023-02-23 13:51:24 -08:00
Lioncache fea3ee1298 OpcodeDispatcher: Remove now unused _VDupElement path in LoadSource_WithOpSize
XMM instances can't use high indices anymore, since we've gotten rid of
the only flag that allows this scenario to occur.
2023-02-23 16:09:03 -05:00
Lioncache e1c42315ed Arm64Emitter: Use bit utils wrapper over __builtin_ffs
Just keeps the use of builtins contained to one place.
2023-02-23 15:23:07 -05:00
Ryan Houdek 165db37c8d Merge pull request #2434 from lioncash/predmisc
ARMEmitter: Finish off SVE Predicate Misc group
2023-02-23 12:20:03 -08:00
Ryan Houdek 9b23ae9133 Merge pull request #2433 from lioncash/subsw
OpcodeDispatcher: Handle VPHSUBSW
2023-02-23 12:17:58 -08:00
Lioncache 497b5c0561 X86Tables: Reclaim FLAGS_SF_HIGH_XMM_REG as an unused flag
Now that we've moved MOVHPS over to sharing the implementation of
MOVHPD, the FLAGS_SF_HIGH_XMM_REG is now unused.

Since we're supporting AVX, this flag is kind of weird in terms of
behavior, since what determines the high part of a register is now
situationally different.

Also it's much more explicit to perform the insert directly in the
implementation of instructions, than relying on a flag to do it for us.

So, instead of keeping it around, we can reclaim it as unused for use
with any necessary behavior that we would require in the future.
2023-02-23 14:22:25 -05:00
Lioncache 95393b07fb OpcodeDispatcher: Share MOVHPD implementation with MOVHPS
These instructions essentially have the same behavior. This also allows
us to remove the only used instance of FLAGS_SF_HIGH_XMM_REG, which,
given that we now support AVX, has ambiguous use.

While we're at it, we can expand the tests to make use of the store to
memory variant.

Also removes an erroneous copy-pasted comment about ZEXTing. This is
from the MOVQ implementation function. MOVHPS/MOVHPD don't do any
ZEXTing, they either store to memory or insert into a register.
2023-02-23 14:07:22 -05:00
Lioncache 372da1b820 ARMEmitter: Handle PNEXT
Now, with the helper in place, we can implement PNEXT and finish off the
SVE Predicate Misc group.
2023-02-23 11:59:39 -05:00
Lioncache 61a59d0314 ARMEmitter: Unify SVE Predicate Misc group under single helper
Centralizes the implementations and also gets rid of some code in the
process.
2023-02-23 11:51:03 -05:00
Lioncache 1045e05870 OpcodeDispatcher: Handle VPHSUBSW 2023-02-23 10:55:57 -05:00
Lioncache 052872725c OpcodeDispatcher: Factor out PHSUBS implementation into helper
This will allow it to be shared in the AVX implementation.
2023-02-23 10:32:48 -05:00
Lioncache 78ba195b66 ARMEmitter: Handle SVE partition break condition category 2023-02-22 22:49:37 -05:00
Lioncache ae2b28716d ARMEmitter: Handle SVE propagate break to next partition category 2023-02-22 22:41:55 -05:00
Lioncache 326e5e8d57 ARMEmitter: Handle propagate break from previous partition category 2023-02-22 22:35:31 -05:00
Lioncache 552293b226 ARMEmitter: Handle SVE integer compare with wide elements category
We can piggy-back on top of the existing SVEIntegerCompareVector to make
these trivial to implement.
2023-02-22 21:03:35 -05:00
Lioncache 751a4c8019 ARMEmitter: Move assertion into SVEIntegerCompareVector
Same behavior, but centralizes the assertion. While we're at it, we can
also add another assert to ensure that only predicates p0-p7 are used.
2023-02-22 20:14:49 -05:00
Lioncache e3cac40b1b OpcodeDispatcher: Fix SSE MOVAPS variants being treated as MOVUPS
0x10/0x11 in the two byte op table corresponds to MOVUPS
0x28/0x29 in the two byte op table corresponds to MOVAPS
2023-02-22 15:56:15 -05:00
Ryan Houdek 9b123353b3 Merge pull request #2428 from lioncash/hsub
OpcodeDispatcher: Handle VHSUBPD/VHSUBPS
2023-02-22 11:43:10 -08:00
Lioncache f2c0c55b9c OpcodeDispatcher: Handle VHSUBPS 2023-02-22 14:27:51 -05:00
Lioncache 1eb722dea7 OpcodeDispatcher: Handle VHSUBPD 2023-02-22 14:12:11 -05:00
Lioncache a6746988d7 x86_64/VectorOps: Fix behavior of UnZip2 with 64-bit element 256-bit vectors
The 256-bit variant of vshufpd uses extra immediate bits rather than the
same bits for the lower lane.
2023-02-22 14:12:11 -05:00
Lioncache 0a1707f1bd OpcodeDispatcher: Factor HSUBP implementation into helper
Will be used for implementing the AVX variants of the same instructions.
2023-02-22 12:12:55 -05:00
Lioncache 23b9d8e108 ARMEmitter: Add check for registers being consecutive in constructive SPLICE
Will catch cases where registers aren't consecutive in the constructive
variant. While we're at it, we can also amend EXT's similar but slightly wrong
consecutive check.

Also adds tests to ensure these corner-cases hold.
2023-02-22 11:59:58 -05:00
Lioncache 3fa44604ba ARMEmitter: Make SPLICE use SVEPermuteVectorPredicated
These are in the same instruction category, so we can use the helper to
simplify the implementation.
2023-02-22 11:48:11 -05:00
Lioncache d3bc0c084d ARMEmitter: Make CPY (SIMD&FP) and CPY (scalar) use SVEPermuteVectorPredicated
These fall under the same instruction category, so we can use the helper
to simplify the implementation.
2023-02-22 11:29:07 -05:00
Lioncache e206414919 ARMEmitter: Make COMPACT use SVEPermuteVectorPredicated
This falls under the same category of instructions, so we can use it to
simplify the implementation.
2023-02-22 11:23:37 -05:00
Lioncache e635cc5404 ARMEmitter: Use predicated helper with revb/revh/revw/rbit
Since these are under the same category, we can merge these and get rid
of a now unnecessary helper.
2023-02-22 11:17:12 -05:00
Lioncache 822d67467b ARMEmitter: Handle SVE conditionally extract element to GPR/scalar categories 2023-02-22 11:10:13 -05:00
Lioncache e043d2c0f5 ARMEmitter: Handle SVE conditionally broadcast element to vector category 2023-02-22 10:55:34 -05:00