Commit Graph
15 Commits
Author SHA1 Message Date
Ryan Houdek e4bb0df486 IR: Convert all Move+Atomic+ALU ops from implicit to explicit size
The number of times the implicit size calculation in GPR operations has
bit us is immeasurable and was a mistake from the start of the project.
The vector based operations never had this problem since they were
explicitly sized for a long time now.

This converts the base IR operations to be explicitly sized, but adds
implicit sized helpers for the moment while we work on removing implicit
usage from the OpcodeDispatcher.

Should be NFC at this moment but it is a big enough change that I want
it in before the "real" work starts.
2023-08-27 01:35:08 -07:00
Ryan Houdek b1a3f82923 FEXCore: Fixes Arm64 stats disassembly
Requires the IR headerop to house the number of host instructions this
code is translating for the stats.

Fixes compiling with disassembly enabled, will be used with the
instruction count CI.
2023-08-10 03:23:25 -07:00
Alyssa Rosenzweig 491e4e2c23 IR: Print SSA values as %123 instead of %ssa123
This is less noisy with no loss of clarity, and follows the notation
used by both LLVM IR and NIR. (So, it should be familiar.)

Change done with:

    sed -i -e 's/%ssa/%/g' $(git grep -l '%ssa')

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2023-07-13 11:52:36 -04:00
Ryan Houdek b57a8ac086 IR: Update tests for new GPR offsets 2023-01-13 19:35:12 -08:00
Ryan Houdek c9622f6fd4 unittests/IR: Update tests for new IR semantics 2022-11-22 23:06:18 -08:00
Ryan Houdek 7814be7467 Update IR tests for new break op 2022-07-17 20:56:31 -07:00
Ryan Houdek 7f6e9d3dae unittests/IR: Resolves fallout from recent JSON changes 2022-03-04 16:39:11 -08:00
Ryan Houdek e68d4c52f7 unittests: Updates IR tests for new Break argument
Textual rather than numerical
2021-11-19 12:49:36 -08:00
Ryan Houdek 1f4a10ef1f unittests: Update tests for new IR operand ordering 2021-11-02 22:51:38 -07:00
Stefanos Kornilios Mitsis Poiitidis b45b7c3441 IR: Remove Entry from OP_HEADER, pass as parameter to CompileCode 2021-04-25 13:15:23 +03:00
Stefanos Kornilios Mitsis Poiitidis 8b025d4c26 IRLoader: Actually set EntryRIP if the IR was parsed 2021-01-21 22:19:16 +02:00
Stefanos Kornilios Mitsis Poiitidis 1073d4053d IR Tests: Update LoadMem to use extended syntax 2020-11-17 16:23:50 +02:00
Scott Mansell 69703af624 Add some ir tests to formalize ALU truncation 2020-08-26 00:47:40 +12:00
Scott Mansell cb6dcf62eb Add MemoryData to IR and ASM Tests 2020-08-21 01:29:37 +12:00
Ryan Houdek 6cdd3916c0 Adds IR based unit test support.
Now that everything is punched through that is necessary, we can now
have IR based unit tests that will be used to ensure the IR is working
correctly.
Specifically this is necessary for quick iterating on RA testing.
2020-05-09 12:19:36 -07:00