Commit Graph
392 Commits
Author SHA1 Message Date
Ryan Houdek 2acf22f15b Fixes cvtps2dq instruction
This must of have been a copy and paste error, I didn't even have this
instruction on my list of implemented instructions.
It definitely isn't converting to a GPR
2020-06-15 20:25:13 -07:00
Stefanos Kornilios Mitsis Poiitidis 77b63760be Merge pull request #235 from Sonicadvance1/32bit_remove_64bit_size
Removes 64bit size from frontend when in 32bit mode
2020-06-14 03:15:48 +03:00
Ryan Houdek 5b9de1675f Removes 64bit size from frontend when in 32bit mode
64bit mode doesn't exist when we are operating in 32bit mode, so this
needs to be disabled.
This forces a fallback to a 32bit size for those ops
2020-06-12 15:19:40 -07:00
Ryan Houdek 7bfe127fcb Ensures the core saves the entry cache to the correct folder
We should store this in XDG_CACHE_HOME, not DATA_HOME.
Also fallback the HOME and PWD directories correctly
2020-06-12 15:08:16 -07:00
Ryan Houdek b262b59916 Fixes up prefix handling for 32bit
Moves REX to a 64bit only table entry. This allows the missing INC/DEC
instructions to exist in 32bit space
2020-06-10 16:49:06 -07:00
Stefanos Kornilios Mitsis Poiitidis 8ca73a63cc Merge pull request #174 from Sonicadvance1/enter_inst
Enter inst
2020-06-11 00:41:18 +03:00
Stefanos Kornilios Mitsis Poiitidis 4953a620d5 Merge pull request #230 from Sonicadvance1/virtual_cores
Adds new FEX config for telling the guest how many CPU cores it can have
2020-06-08 19:34:06 +03:00
Ryan Houdek 97070ea548 Implements ENTER instruction 2020-06-06 11:52:51 -07:00
Ryan Houdek 7302ad1996 Adds new FEX config for telling the guest how many CPU cores it can have
This is just a virtual number that the guest can query through the
various means. Will affect mesa with how many helper threads it
generates at the very least
2020-06-04 00:03:41 -07:00
Ryan Houdek b25f1c4e3b Fixes a case of the BT ops failing to test the correct bit
When the `BT mem` operation was accessing memory where the bit offset
wasn't a multiple of the access size, then we were dividing the offset
by bytes and accessing bits at `mem[byteOffset] &= (BitOffset)`.
BitOffset wasn't adjusted to compensate for the access size being added
to the address.
Causing a mismatch of testing the wrong bits. Unit tests didn't capture
this.
Trying to run glxgears on i965/iris showed extensive corruption because
of it though.
2020-06-03 23:48:28 -07:00
Stefanos Kornilios Mitsis Poiitidis 2c8fccdcf2 syscalls/x64: Add fchdir 2020-06-03 16:01:06 +03:00
Ryan Houdek 7717425201 Merge pull request #224 from FEX-Emu/skmp/add-accept4
x64/syscalls: Add accept, accept4
2020-05-31 14:40:29 -07:00
Ryan Houdek efa26b3bf4 Merge pull request #223 from FEX-Emu/skmp/unhandled-syscall-show-number
x64/syscalls: Change HandleSyscall/Unimplemented Syscall to include syscall number
2020-05-31 14:39:47 -07:00
Stefanos Kornilios Mitsis Poiitidis 63ea0358bd syscalls/x64: Add pselect6 2020-05-31 15:31:16 +03:00
Stefanos Kornilios Mitsis Poiitidis 1f243f14be x64/syscalls: Add accept, accept4 2020-05-31 15:28:23 +03:00
Stefanos Kornilios Mitsis Poiitidis c200952cc6 x64/syscalls: Change HandleSyscall/Unimplemented Syscall to include syscall number 2020-05-31 14:14:10 +03:00
Stefanos Kornilios Mitsis Poiitidis f1173a3bca Merge pull request #218 from Sonicadvance1/implements_lods
Implements LODS instruction
2020-05-31 12:02:11 +03:00
Stefanos Kornilios Mitsis Poiitidis a659024547 Merge pull request #220 from Sonicadvance1/psadbw
Implements psadbw for MMX and SSE2
2020-05-31 12:00:36 +03:00
Ryan Houdek a147e5eca1 Implements psadbw for MMX and SSE2
Saw this when running Freedreno on x86-64
2020-05-31 03:22:11 +01:00
Ryan Houdek 3dae3f4b84 Fixes bug that cropped up in cvtpi2ps from previous changes 2020-05-31 03:22:11 +01:00
Ryan Houdek 2ba797a992 Implements new IR ops in the CPU backends 2020-05-31 03:22:11 +01:00
Ryan Houdek 2f1d7f70a2 Adds new IR ops that PSADBW will need 2020-05-30 18:49:09 -07:00
Ryan Houdek 111b0624ca Implements LODS instruction
Theoretically the REP case can be optimized if it is known not to fault,
but that is one legitimate use case of this instruction.
This is just to ensure that we have this instruction covered, it hasn't
been encountered in a real program yet.
2020-05-29 23:35:36 -07:00
Ryan Houdek c0711404e9 Forces LLVM backend to use the native CPU architecture
Better than relying on a hardcoded CPU target
Should fix a crash on x86 host cpus that don't support BMI1
2020-05-29 17:51:37 -07:00
Stefanos Kornilios Mitsis Poiitidis 6cc3b6b0ea Syscalls/x64: Hook up SYSCALL_MSYNC, remove fixed tests from known failures 2020-05-29 12:43:52 +03:00
Ryan Houdek 3759cbdb65 Interpreter based x87 support!
This implements support for 130 of the 132 x87 ops as interpreter
fallbacks.

The two missing ops are the BCD load and BCD store instructions and can
be implemented another time.

This allows us to no longer have to rely on a libstdc++ modification to
handle their usage of long double. This instead works entirely through
using `long double` directly in the interpreter. Which will either use
real x87 on an x86 host. Or in the case of ARM devices, fall down
glibc's long double soft float path.

This doesn't necessarily need to be quick right now. It's more important
to have the compatibility improvement from this.
2020-05-28 14:47:43 -07:00
Stefanos Kornilios Mitsis Poiitidis 8206aa0413 Add ERROR_AND_DIE, use it on unhandled syscalls 2020-05-28 18:47:24 +03:00
Ryan Houdek 1d6aac1a5d Implements two handle_at syscalls 2020-05-27 18:32:17 -07:00
Ryan Houdek c78520c526 Implements symlink syscall 2020-05-27 18:32:17 -07:00
Ryan Houdek fd857e4966 Makes threaded compilation not rely on a global mutex
As we run more threaded applications it is becoming apparent that this
needs to be fixed now.
This duplicates the FrontendDecoder and Passmanager per thread so they
no longer block each other while compiling.
Increases a bit of memory usage but completely worth it.
2020-05-27 10:18:02 -07:00
Stefanos Kornilios Mitsis Poiitidis 6669bcfffd Merge pull request #209 from Sonicadvance1/minor_opts
Minor memory allocation optimizations in the IR passes.
2020-05-27 14:27:08 +03:00
Stefanos Kornilios Mitsis Poiitidis 2fd8e617ff Merge pull request #207 from Sonicadvance1/interpreter_fallback
Adds support for interpreter fallback
2020-05-27 14:20:58 +03:00
Stefanos Kornilios Mitsis Poiitidis 22a4c5185d Merge pull request #208 from Sonicadvance1/fence_ops
Implements fence ops
2020-05-27 14:18:21 +03:00
Ryan Houdek 77e444e8a5 Fixes SCAS
Adds a couple of assets in the other repeat instructions.
Jump targets were accidently inverted.
SCAS and LODS are the two repeat instructions we don't have unit tests
for.
Unit tests are forthcoming for this
2020-05-26 22:51:11 -07:00
Ryan Houdek b3b6727a8e Minor optimization in IRCompaction pass
Codeblock array was constantly being reallocated.
Changes the remap array over to a allocate in multiples of the alignment
size.
Was hitting a pedantic case where the compaction would hit slightly
increasing function sizes so large numbers of reallocations occured
quickly.
2020-05-26 22:25:15 -07:00
Ryan Houdek f8579d5458 Minor optimization in the RCLSE pass
We already have an unmodified classification struct. Just memcpy it to
reset the state. Reduces a bunch of temporary allocations.
Also disables the CFG calculation since we aren't using it currently
2020-05-26 22:23:10 -07:00
Ryan Houdek 38ff936c81 Adds support for interpreter fallback
The IRHeader itself contains a flag for if a block should fallback to
the interpreter.
This is necessary for the case that an IR is loaded and the Frontend
object no longer has the data necessary to know if it should do an
interpreter fallback.
This is super useful for bisecting JIT versus Intepreter failures, and
also cases where falling back to intepreter for compatibility is a lot
more simple than wiring things through the JIT (ala x87)

This isn't currently utilized, but will be once x87 work lands
2020-05-26 19:08:18 -07:00
Ryan Houdek 5569894d81 Implements fence ops
These map directly to x86 fence instructions, which have equivalent ARM
versions as well.
2020-05-26 19:04:35 -07:00
Stefanos Kornilios Mitsis Poiitidis 66a0293cdb Merge pull request #201 from Sonicadvance1/fix_file_flags
Fixes FD flags mismatch between x86 and ARM64
2020-05-26 12:52:26 +03:00
Ryan Houdek f23a0997e7 Merge pull request #200 from Sonicadvance1/finish_x87_table
Finishes x87 instruction table flags
2020-05-26 01:31:32 -07:00
Ryan Houdek 56128d98b0 Merge pull request #202 from Sonicadvance1/fix_pid_tid_problem
Forces the primary application thread to be host primary thread
2020-05-26 00:41:07 -07:00
Stefanos Kornilios Mitsis Poiitidis 25ddef17c1 Merge pull request #203 from Sonicadvance1/fix_includes
Fixes some missing includes
2020-05-26 10:04:08 +03:00
Stefanos Kornilios Mitsis Poiitidis 7799cd43a4 Merge pull request #199 from Sonicadvance1/ir_has_sideeffects
Implements HasSideEffects IR option
2020-05-26 09:36:02 +03:00
Stefanos Kornilios Mitsis Poiitidis 7a9a95583c Merge pull request #190 from Sonicadvance1/fix_128bit_div
Fixes 128bit divisions on AArch64
2020-05-26 09:34:32 +03:00
Stefanos Kornilios Mitsis Poiitidis 6c2b66894b Merge pull request #196 from Sonicadvance1/fix_32bit_gdt_classification_dse
Fixes RCLSE CPUState classification
2020-05-26 09:32:59 +03:00
Ryan Houdek 7c8f7c732f Fixes some missing includes 2020-05-25 20:04:17 -07:00
Ryan Houdek 0130b41a10 Forces the primary application thread to be host primary thread
This is a bit of a peculiar one, we want to ensure a single threaded
application is running on the emulator's primary thread.
This mitigates the problem that an application can do a getpid versus
gettid comparison and notice a problem.
Some games rely on getpid being the actual process ID and will spin
forever if it isn't the case.

This is also necessary for wine bringup since thread creation needs a
bit more finesse there.

Fixes #186
2020-05-25 19:56:05 -07:00
Ryan Houdek 160da69c21 Fixes FD flags mismatch between x86 and ARM64
AArch64 redefines these four flags so they don't match between
architectures.
This is what was actually causing ls to fail, the x86 side was passing
in O_DIRECTORY which the AArch64 side was interpreting at O_DIRECT.
This made it return EINVAL
2020-05-26 02:44:11 +01:00
Ryan Houdek 566d83e334 Finishes x87 instruction table flags 2020-05-25 18:02:27 -07:00
Ryan Houdek f41700cd58 Lets DCE pass use the new HasSideEffects IR attribute
This will be less prone to breaking since you should have the sideeffect
described in the IR
2020-05-25 17:55:26 -07:00