Commit Graph
5 Commits
Author SHA1 Message Date
Ryan Houdek f89ef01578 Implements the COMISS instructions
These are fairly popular so not having them around is causing headaches.
We will really want these in the future to use the host register, btu
that is more time consuming than I want to dedicate to at the moment.

So the FCMP instruction must be told which flags to generate up front,
then it generates the flags in to a GPR which are then tracked and
pulled out with a specific IR op.

This can be augmented in the future to more easily RA the host flag
register
2020-03-21 22:52:46 -07:00
Ryan Houdek 4692a761b6 Implements two new IR Op codes
Extracts a vector element to a scalar value
Inserts a scalar element in to a vector
2020-03-17 13:49:47 -07:00
Ryan Houdek 79ffd11c1d Cleans up and renames the CVT ops
Fixes issue #14.

A lot of these were named in very confusing ways.
Makes them very explicit about what the operation is doing
2020-03-13 17:42:39 -07:00
Scott Mansell 99d1dcad98 Fix Neg IR_OP, Add Not IR_OP
In some places, Neg meant logical one's complement negation.
In others it meant arithmetic two's complement negation.

As both x87 and aarch64 have neg instructions that do
two's complement negations, we will standardise on that.

Additionally we will add a Not_IR op for one's complement
2020-03-13 17:53:57 +13:00
Stefanos Kornilios Mitsis Poiitidis e9ea4cbb76 FEXCore: Move to Externals/FEXCore 2020-03-06 09:07:37 +02:00