Commit Graph
2297 Commits
Author SHA1 Message Date
Lioncache add775c5cd OpcodeDispatcher: Handle VPHADDSW 2023-02-20 12:25:28 -05:00
Lioncache f3e6f62356 OpcodeDispatcher: Factor PHADDS implementation into helper
This will be used to also handle the VEX variant of PHADDSW
2023-02-20 12:00:38 -05:00
Mai f71f2445db Merge pull request #2389 from Sonicadvance1/remove_context_c_interface
FEXCore: Removes C wrapper interface
2023-02-20 10:08:07 -05:00
Mai f6e2fe1515 Merge pull request #2420 from Sonicadvance1/fix_syscall_race
Arm64: Fixes a race condition on syscall spilling SRA
2023-02-20 10:06:53 -05:00
Ryan Houdek 273f5e1f26 Arm64: Fixes a race condition on syscall spilling SRA
When executing a non-inlined syscall, we spill all static registers.
We weren't storing in to the thread context that we have done this.
If a signal occured between FEX returning from the syscall (after the
blr) and before the `FillStaticRegs` then the signal handler would get
the incorrect register state.

This typically manifested as Steam getting a SIGCHLD, trying to recover
the guest stack pointer, and it that pointer would be zero or some other
corrupt value. Thus crashing inside of the signal handler.

Surprising that we hadn't hit this way more before this point, must have
needed hardware that tickled the race condition *just* right.
2023-02-19 16:12:06 -08:00
Ryan Houdek 35af4bd42a FEXCore: Removes C wrapper interface
This has been a long time coming. The C interface has been a thorn in
our side for no reason for a long time.

The purpose of this step is to remove the C interface without changing
behaviour as much as possible. This means that with this commit there
are still some bad practices but the remaining issues will be solved
with followup PRs.

Primarily, we still have a `DestroyContext(CTX)` static function which calls
the Context implementation's `DestroyContext` and does a raw C++ delete.

Follow up PR will remove that, but I didn't want to touch it yet since
it'll require checking to ensure the unique_ptr changes play nice with
our allocator hooking. Which this is already a huge PR without trying to
change behaviour.
2023-02-19 11:59:11 -08:00
Ryan Houdek e594b2c4c7 OpcodeDispatcher: Optimize ALUOp handler
Take a leaf from the Vector ops and have the jump entry choose the IR
op.
Also generate one atomic op and modify the IR type in the locked memory
type just like the non locked memory path.

This class of instructions in the number one instruction type percentage
wise, so making this more optimal will be a win.

It's a fairly minor optimization so it should be a small impact.
2023-02-18 03:32:43 -08:00
Ryan Houdek 9c256bfe96 Merge pull request #2413 from lioncash/unpred
ARMEmitter: Handle a few more vector permutation categories
2023-02-15 14:51:59 -08:00
Lioncache e78b573610 VectorOps: Remove unnecessary mov in VUShrNI2/VSQXTN2/VSQXTUN2
We can move the initial move down by SPLICE, which not only lets us turn
it into a MOVPRFX, but also we can safely move into the final
destination register directly, since we can be sure there's no
potential dependencies at this point
2023-02-15 17:14:26 -05:00
Mai 81a89ab747 Merge pull request #2415 from Sonicadvance1/spillsra_fix
Dispatcher: Fixes guest stack register usage
2023-02-15 15:51:49 -05:00
Ryan Houdek fd17a3de50 Dispatcher: Fixes guest stack register usage
Fixes #2410

We were pulling the guest RSP before spilling static registers back to
the state.
Move this to after we spill SRA state to fix this bug.

Thanks to @ifquant for diving in, identifying, and finding the exact bug.
2023-02-15 12:21:11 -08:00
Lioncache bf7118fc85 Arm64/VectorOps: Use SVE only with 256-bit op sizes
Keeps all of the IR ops consistent with each other. Also removes some
redundant scalar checks that weren't really necessary.
2023-02-15 14:46:05 -05:00
Ryan Houdek a90f5363dd Merge pull request #2412 from lioncash/ptest
OpcodeDispatcher: Handle VPTEST
2023-02-15 10:31:12 -08:00
Lioncache a59d700bbe ARMEmitter: Handle SVE Permute Predicate category 2023-02-15 12:56:39 -05:00
Lioncache 7cf27a7c26 ARMEmitter: Handle SVE Permute Vector - Unpredicated category 2023-02-15 12:18:42 -05:00
Lioncache 14e1d16710 OpcodeDispatcher: Handle VPTEST 2023-02-15 11:24:37 -05:00
Lioncache 203f29a91f OpcodeDispatcher: Use VectorZero over VectorImm in InsertPSOpImpl
A little more straightforward than using VectorImm for the same purpose.
2023-02-15 09:37:54 -05:00
Lioncache 3ced41414e OpcodeDispatcher: Handle VMOVSD 2023-02-15 01:18:54 -05:00
Lioncache 1a64b26d03 OpcodeDispatcher: Handle VMOVSS 2023-02-15 01:18:15 -05:00
Ryan Houdek efafe0e6e9 Merge pull request #2408 from lioncash/pmaddwd
OpcodeDispatcher: Handle VPMADDWD
2023-02-14 17:52:57 -08:00
Lioncache 4a69b87cb9 OpcodeDispatcher: Handle VPMADDWD 2023-02-14 18:50:37 -05:00
Lioncache fb2de47e73 OpcodeDispatcher: Factor out PMADDWD implementation to helper
This will be used to centralize code to also implement the AVX variant.
2023-02-14 18:38:12 -05:00
Lioncache bcee3e9374 OpcodeDispatcher: Handle VSHUFPS 2023-02-14 16:46:03 -05:00
Lioncache 6d87154ac8 OpcodeDispatcher: Handle VSHUFPD 2023-02-14 16:46:03 -05:00
Lioncache c5d799df8c OpcodeDispatcher: Make SHUFOpImpl suitable for AVX
Drops in the AVX-specific bits into the helper in preparation for
implementing VSHUFPD and VSHUFPS
2023-02-14 16:45:32 -05:00
Lioncache 449645669a OpcodeDispatcher: Move SHUFOp implementation to helper function
Will be useful for handling both the SSE and AVX variants in the same
place.
2023-02-14 16:43:33 -05:00
Lioncache 504d409cf6 OpcodeDispatcher: Handle VPSHUFD 2023-02-14 13:13:09 -05:00
Lioncache 29a6d584a9 OpcodeDispatcher: Handle VPSHUFHW 2023-02-14 12:48:42 -05:00
Lioncache 310fcf969c OpcodeDispatcher: Handle VPSHUFLW 2023-02-14 12:32:47 -05:00
Ryan Houdek b329442c09 Merge pull request #2404 from lioncash/dup
IR: Add VDupFromGPR
2023-02-13 14:37:59 -08:00
Lioncache f4d799abdd OpcodeDispatcher: Make use of VDupFromGPR where applicable
Simplifies some of the IR usage.
2023-02-13 16:52:51 -05:00
Lioncache 4bb7f49c2a IR: Add VDupFromGPR
Allows broadcasting constants into vectors from GPRs. Resolves the only
remaining TODOs within our vector ops.
2023-02-13 16:52:47 -05:00
Ryan Houdek f7f2dc2210 Merge pull request #2403 from lioncash/err
ARMEmitter/ASIMDOps: Amend a few error logs
2023-02-13 12:31:52 -08:00
Lioncache c381185a7d ARMEmitter/ASIMDOps: Amend a few error logs
A few were logging out the wrong instruction name on a precondition
failure.
2023-02-13 15:17:09 -05:00
Lioncache ac5d09885e OpcodeDispatcher: Handle VPSHUFB 2023-02-13 14:47:37 -05:00
Lioncache d9a505e22e OpcodeDispatcher: Factor PSHUFB implementation into helper
Will let us centralize the implementation for PSHUFB and VPSHUFB
2023-02-13 12:39:27 -05:00
Lioncache 9268a356f6 OpcodeDispatcher: Handle VPALIGNR 2023-02-13 10:53:02 -05:00
Lioncache 92141d3edc OpcodeDispatcher: Factor PALIGNR code into helper
Will allow us to centralize the implementation of PALIGNR and VPALIGNR.
2023-02-13 09:49:26 -05:00
Lioncache 504be62a92 ARMEmitter: Handle SVE2 integer absolute difference and accumulate 2023-02-11 00:27:07 -05:00
Lioncache 62e2f1b45d ARMEmitter: Handle SVE2 bitwise shift and insert category 2023-02-11 00:27:04 -05:00
Lioncache 880cc72842 ARMEmitter: Handle SVE2 bitwise shift right and accumulate 2023-02-11 00:24:18 -05:00
Lioncache feacd897fc ARMEmitter: Handle SVE2 integer add/sub long with carry category 2023-02-11 00:24:18 -05:00
Lioncache fdd950e1d1 ARMEmitter: Handle SVE2 integer absolute difference and accumulate long category 2023-02-11 00:24:17 -05:00
Lioncache b02af95629 ARMEmitter: Handle SVE2 complex add category 2023-02-10 22:31:45 -05:00
Lioncache fa95a823c9 ARMEmitter: Handle SVE2 bitwise shift left long category 2023-02-09 06:30:43 -05:00
Lioncache 399ed61380 ARMEmitter: Handle SVE2 integer add/sub interleaved long 2023-02-09 05:44:44 -05:00
Lioncache 71550e29eb ARMEmitter: Handle SVE integer matrix multiply accumulate 2023-02-09 05:34:11 -05:00
Lioncache 1b8d8f8280 ARMEmitter: Handle SVE2 interleaved XOR category 2023-02-09 05:16:59 -05:00
Lioncache ff6c70f5e1 ARMEmitter: Handle SVE2 bitwise permute category 2023-02-09 05:11:48 -05:00
Lioncache 13ee2b5ec4 ARMEmitter: Handle SVE2 add/sub narrow high part 2023-02-09 05:01:14 -05:00