steam-frame/FEX-Emu--FEX
1
0 Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2026-10-27 03:00:52 +01:00
Code Issues Packages Projects Releases 67 Wiki Activity
2,082 Commits 11 Branches 71 Tags
b29121c71a76b95cbca16d26e49882b5980bdfdf
Commit Graph
1116 Commits
Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis b29121c71a AOTIR: Rename AOTCache to AOTIRCache 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis a5ee4bdf3c AOTIR: Fix double free issues 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 56d10dcbbb IR: Make OP_THUNK use an inline sha256 hash of the thunk name, update thunk scripts 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 1f919949cc JIT: Fix arm64 build 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 63507f5ece IR: Fix int64_t parsing 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis dbc8b8e8e9 AOTIR: Append optimization flags to fileid 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 681deca4eb IR: Make entrypoint implicit, Add InlineEntrypointOffset, make ValidateCode Entrypoint-relative 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis b3d12fbb7b AOTIR: Cleanup interface 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis fafc987eab AOTIR: Rename Generate to Capture 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis d825ed2b03 AOTIR: Reduce map lookup 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis f2f62c5f2c AOTIR: Implement EntrypointOffset for aarch64 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 3e1e093b24 AOTIR: Store in ~/.fex-emu/aotir, per so 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 71dceb5339 Fix relocation support for FinishOp 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis be40d1604a Improve aotir format 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 47d4481a75 AOTIR: Support relocations via new ir op 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis fc30efe040 AOTIR: Add hashing of code bytes 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 57680a8614 AOTIR: Add --aotir-generate and --aotir-load to FEXLoader & Config 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 66bdface49 AOTIR: Make copies for insertions, only cache RA'd blocks 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 816c4656df IR: Add AOT Cache 2021-02-23 12:08:57 +02:00
Ryan Houdek bb0850eab8 Adds assert checks on missing LOCK support 
These usually don't get hit, but Geekbench4 DOES manage to hit LOCK on
BTS.

Which we just don't support right now.
 2021-02-22 23:20:18 -08:00
Ryan Houdek 232eeff483 Implements BTC, BTR, BTS atomic variants 
BTS specifically is being used for threading related tasks. Which could
be why our threading has been unstable.
 2021-02-22 22:27:10 -08:00
Stefanos Kornilios Mitsis Poiitidis 9b360e66dc Threading: Workaround exit_group bug 2021-02-22 14:24:42 +02:00
Stefanos Kornilios Mitsis Poiitidis 3bc12de017 OpDisp: Imm SAR OpSize < 32 needs sign extension 2021-02-17 08:17:20 +02:00
Stefanos Kornilios Mitsis Poiitidis 5ae6a64800 Merge pull request #778 from FEX-Emu/skmp/x87-round-trunc 
x87: Round, Truncate & Precision control
 2021-02-17 05:27:56 +02:00
Stefanos Kornilios Mitsis Poiitidis 6615d5972f x87: Support for FCW, rounding, truncation, precision control 2021-02-17 05:16:53 +02:00
Stefanos Kornilios Mitsis Poiitidis eb60bda1d3 OpDisp: Fix cvt/cvtt mapping to dispatcher handlers 2021-02-16 11:19:28 +02:00
Stefanos Kornilios Mitsis Poiitidis 82367f49e2 X87: FPERM needs to set C2 to 0 to indicate finished iteration 2021-02-16 02:34:52 +02:00
Stefanos Kornilios Mitsis Poiitidis 9f2d49026e Merge pull request #768 from FEX-Emu/skmp/fix-csgo 
Fixes for Counter Strike Global Offensive
 2021-02-15 03:47:14 +02:00
Stefanos Kornilios Mitsis Poiitidis 07bd2244c7 IR: Remove ShouldInterpret & related logic 2021-02-12 14:21:47 +02:00
Stefanos Kornilios Mitsis Poiitidis 077093eacc JIT/x64: Use xmm0 as temp instead of xmm11, add xmm11 to RA list 2021-02-12 14:15:22 +02:00
Stefanos Kornilios Mitsis Poiitidis 428111b44b JIT/arm64: fallback support 2021-02-12 01:23:15 +02:00
Stefanos Kornilios Mitsis Poiitidis b564927825 IprOps: Add BCDLOAD, BCDSTORE fallbacks 2021-02-11 19:24:57 +02:00
Stefanos Kornilios Mitsis Poiitidis b0a046dfcb JIT/IPR: Add fallbacks for almost all x87 ops 2021-02-11 18:52:05 +02:00
Stefanos Kornilios Mitsis Poiitidis 8f5bbde4dd JIT/x86: Implement VBSL 2021-02-11 18:51:05 +02:00
Stefanos Kornilios Mitsis Poiitidis 7dc0c275cf Add some basic infrastructure + a few fpr ops 2021-02-11 17:20:29 +02:00
Stefanos Kornilios Mitsis Poiitidis 4e31c1d1ce RA: Remove erratic assert 2021-02-11 14:31:53 +02:00
Stefanos Kornilios Mitsis Poiitidis df1c38908c JIT: Support edge case in CreateElementPair 2021-02-11 14:31:32 +02:00
Stefanos Kornilios Mitsis Poiitidis fc4b875ff1 Frontend: Only return error if invalid op in first block 2021-02-11 14:31:02 +02:00
Scott Mansell c4dda4a3f3 arm64: Fix blocks with over 256 spill slots. 
With multiblock and -n4000, at least one block in geekbench5's camera
benchmark was spilling 324 values. This meant the required stack
adjustment was 5184 bytes, which is larger than can fit into a 12bit
immediate.

Now, it's probally a bug that our RA is spilling that many values, and
we probally should be packing our spill slots closer together, but we
still shouldn't fail to run in this edge case.

So this commit adds a fallback path which uses a temp register to load
the stack adjustment.
 2021-02-09 12:08:32 +13:00
Scott Mansell 5b0ade0bd8 Fix power of 2 OP_MUL optimisation 
The new left-shift that replaced the multiply takes
it's size from arg[0]. If arg[0] was 64bit and the original
OP_MUL was 32bit, then the original code would truncate
upper bits, and the replacement code wouldn't.

This bug broke the SSL cert checking code in geekbench,
causing it to fail to upload results.
Fixes #647
 2021-02-07 18:49:47 +13:00
Scott Mansell 4fad9a8c0b Assert on unreachable 2021-02-02 17:12:43 +13:00
Scott Mansell ef043f10ed Remove std::unexpected 
It's deprecated in c++17, and android's bionic has removed it
 2021-02-01 21:08:45 +13:00
Scott Mansell 93d5cdde1f Fix missing libc++ includes 
gnu's libc++ is lenient and allows you to miss includes at times.

Android's binoic is more strict and needs these fixes to build.
 2021-02-01 21:08:45 +13:00
Scott Mansell ebb05b56e4 Merge pull request #739 from Sonicadvance1/remove_warnings_10 
Removes warning from Static Register Allocation Pass
 2021-02-01 17:31:39 +13:00
Scott Mansell f5dd0fea5d Merge pull request #742 from Sonicadvance1/remove_warnings_8 
Removes warning from IRCompaction
 2021-02-01 17:31:28 +13:00
Scott Mansell 2e5f59cdc1 Merge pull request #734 from Sonicadvance1/remove_warnings_4 
Removes warnings from OpcodeDispatcher
 2021-02-01 16:45:37 +13:00
Scott Mansell 767813eb97 Merge pull request #735 from Sonicadvance1/remove_warnings_5 
Removes warning from X86Tables
 2021-02-01 16:44:24 +13:00
Scott Mansell 9c81fbb2fd Merge pull request #736 from Sonicadvance1/remove_warnings_6 
Removes warning from IRDumper
 2021-02-01 16:42:52 +13:00
Scott Mansell 5f624bec05 Merge pull request #733 from Sonicadvance1/remove_warnings_3 
Removes warnings from x86-64 JIT.cpp
 2021-02-01 16:42:10 +13:00
Scott Mansell a156210064 Merge pull request #738 from Sonicadvance1/remove_warnings_9 
Removes warnings from Register Allocation Pass
 2021-02-01 16:32:05 +13:00