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Author SHA1 Message Date
Ryan Houdek 0bcd1c7df5 Merge pull request #816 from Sonicadvance1/cpuid_80000005 
Implements CPUID 0x8000'0005 for L1 cacheline information
 2021-03-08 23:15:03 -08:00
Ryan Houdek a3ba1ae199 Deduplicates some configuration data 
Configuration mapping was duplicated between three different tables.
Additionally default configuration values were strewn about. Making it confusing as to what the default value would end up being

Adds a new ConfigValues.inl header that defines a few things right next to each other.
Defines the enum name as usual.
Defines the JSON config option name.
Defines the Environment config option name
Defines the default value that the configuration should be
 2021-03-08 22:53:41 -08:00
Ryan Houdek a2278cfb1e Adds StrConv type for enum conversion 2021-03-08 22:50:42 -08:00
Scott Mansell 98cb54e3e4 Merge pull request #812 from phire/both_sides 
Allow both ARM64 and X86_64 jits to be compiled at the same time
 2021-03-09 14:59:11 +13:00
Scott Mansell cb17127ccb Remove last traces of vixl simulator mode 2021-03-08 16:30:25 +13:00
Scott Mansell 93b6dbdc2b Fix Arm64JitCore instantiation on x86 2021-03-08 16:30:25 +13:00
Scott Mansell bea0adc3d1 Allow both jitcores to be enabled simultaneously 2021-03-08 16:30:25 +13:00
Scott Mansell 9c339c85c6 Cmake: allow independant control of both jits 2021-03-08 16:30:25 +13:00
Scott Mansell 9cf7545f8d Abstract mcontext out of JITs 
This will help with unification of common code later
 2021-03-08 16:30:25 +13:00
Ryan Houdek c657165e56 Implements CPUID 0x8000'0005 for L1 cacheline information 
@skmp commented about this in the L2 cacheline information PR.
Quickly implement it since it also has cacheline information.

Fairly trivial since every piece of information is just some 8bit variables.
 2021-03-06 08:32:47 -08:00
Ryan Houdek 05ae7d3c5e Merge pull request #814 from Sonicadvance1/cacheline_cpuid 
Implements CPUID 0x8000'0006 for cacheline information
 2021-03-06 08:23:03 -08:00
Ryan Houdek f94529ebb2 Implements CPUID 0x8000'0006 for cacheline information 
This exposes some cache information including cacheline information.

Fills out this data structure as well just incase we hit another cacheline size bug
 2021-03-06 07:30:25 -08:00
Ryan Houdek 852ab4e245 Merge pull request #815 from Sonicadvance1/sse4_1_movnt 
Implements MOVNTDQA
 2021-03-06 07:25:56 -08:00
Ryan Houdek bb6e7360a2 Merge pull request #813 from Sonicadvance1/disable_python_dev_check 
Disabled cmake check for python development
 2021-03-06 07:25:16 -08:00
Ryan Houdek 50ae18cbaf Adds MOVNTDQA unit test 2021-03-06 06:23:27 -08:00
Ryan Houdek 1adbf66fee Implements MOVNTDQA 
Found this when running Steamlink under FEX on my laptop.
Turns out the Iris video driver now uses this unconditionally in a couple of locations.
Makes sense there since all the Iris targets are expected to support SSE4.1 atm.
 2021-03-06 06:23:18 -08:00
Ryan Houdek 8222acdf20 Disabled cmake check for python development 
We only need the interpreter
 2021-03-06 06:06:59 -08:00
Stefanos Kornilios Mitsis Poiitidis 3978097f15 Merge pull request #705 from FEX-Emu/skmp/mmap-cache-flushing 
Flush IR/Code cache on mmap, mmunmap & mprot
FEX-2103 		2021-03-03 12:59:29 +02:00
Stefanos Kornilios Mitsis Poiitidis 613e5b66ba SMC: Expand --smc-checks options to 'none', 'mman', 'full' 2021-03-03 12:49:23 +02:00
Ryan Houdek e95d1bd761 Merge pull request #811 from phire/remove-operator-names 
X64_64 JIt: Remove -fno-operator-names
 2021-03-02 18:55:53 -08:00
Scott Mansell ec95610587 X64_64 JIt: Remove -fno-operator-names 
Some IDEs didn't recognize this flag and threw
phantom errors when these files were open.

Lets lean towards a smoother developer experience
 2021-03-03 15:47:58 +13:00
Ryan Houdek b57cf78cc7 Merge pull request #810 from phire/fix_include 
Add missing unordered_map include
 2021-03-02 18:00:39 -08:00
Scott Mansell f5ac5d1667 Add missing unordered_map include 
It's really unhelpful that libstdc++ includes this by default
 2021-03-03 14:06:16 +13:00
Stefanos Kornilios Mitsis Poiitidis e92578817d SMC: Flush IR/Code cache on mmap, mmunmap & mprot 2021-02-26 13:22:05 +02:00
Stefanos Kornilios Mitsis Poiitidis 5b4696976d Merge pull request #805 from FEX-Emu/skmp/asm-thunks 
Thunks: Convert guest thunk to asm, to avoid issues with older gcc versions
 2021-02-26 12:57:14 +02:00
Stefanos Kornilios Mitsis Poiitidis aecea294d5 Merge pull request #792 from Sonicadvance1/implemented_unaligned_memory_ops 
Implements unaligned atomic memory ops for ARMv8.1+
 2021-02-26 12:50:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 70a98cd465 Thunks: Convert guest thunk to asm, to avoid issues with older gcc verions 2021-02-26 12:43:37 +02:00
Stefanos Kornilios Mitsis Poiitidis 2071bab238 Merge pull request #803 from Sonicadvance1/faccessat2 
Implements support for faccessat2 in syscallhandler
 2021-02-25 23:58:11 +02:00
Ryan Houdek 9746e0175e Change unsupported faccessat2 to use safe syscall unsupported 2021-02-25 13:45:24 -08:00
Ryan Houdek d78a3784fb Guards SYS_faccessat2 define for new enough glibc defines 2021-02-25 13:44:40 -08:00
Ryan Houdek 7dd5252d68 Implements support for faccessat2 in syscallhandler 
Only exists if the host kernel is >= 5.8.0.
 2021-02-24 09:52:30 -08:00
Ryan Houdek ac92a103df Adds support for faccessat2 to FileManager 2021-02-24 09:51:29 -08:00
Ryan Houdek 74a00fee0f Updates syscall definitions enums 2021-02-24 09:51:03 -08:00
Ryan Houdek ebe447f86a Merge pull request #801 from Sonicadvance1/fix_cmpxchg_flags 
Fixes CMPXCHG flags being incorrect aside from ZF
 2021-02-24 09:01:01 -08:00
Ryan Houdek ebac071ae1 Adds cmpxchg to register zext and flags unit test 2021-02-23 23:22:24 -08:00
Ryan Houdek 68db163efc Adds cmpxchg to memory zext and flag unit test 2021-02-23 23:22:00 -08:00
Ryan Houdek 6c469c21db Fixes Zext and flags behaviour of CMPXCHG to register 2021-02-23 23:21:28 -08:00
Ryan Houdek 9798522bc5 Fixes Zext behaviour of CMPXCHG to memory 2021-02-23 23:21:05 -08:00
Ryan Houdek 55ddc5b6e4 Adds unit tests to ensure cmpxchg flag correctness 2021-02-23 22:02:39 -08:00
Ryan Houdek 373f4275f6 Fixes CMPXCHG flags being incorrect aside from ZF 
Almost everything only checks ZF but we had the arguments reversed for
the rest of the comparison flag results.
 2021-02-23 22:01:52 -08:00
Scott Mansell 6fee5b9ca2 Merge pull request #789 from FEX-Emu/skmp/add-cacheinfo-cpuid 
CPUID: Add cache information, function 0x2
 2021-02-24 03:06:20 +13:00
Stefanos Kornilios Mitsis Poiitidis aaa63a2409 Merge pull request #730 from FEX-Emu/skmp/ir-cache 
AOTIR: Initial implementation
 2021-02-23 13:10:37 +02:00
Stefanos Kornilios Mitsis Poiitidis 6d0d3eaf04 AOTIR: Review feedback 2021-02-23 12:23:56 +02:00
Stefanos Kornilios Mitsis Poiitidis 075cd423ed AOTIR: Review feedback 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 8e06966ddc AOTIR: Make OP_REMOVECODEENTRY relocatable 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis bdcf3ff606 AOTIR: Merge IRLists, RALists and DebugDataLists to LocalIRCache; cleanups and fixups 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis b29121c71a AOTIR: Rename AOTCache to AOTIRCache 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis a5ee4bdf3c AOTIR: Fix double free issues 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis abb2e09c20 AOTIR: Add support for 32-bit process 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 56d10dcbbb IR: Make OP_THUNK use an inline sha256 hash of the thunk name, update thunk scripts 2021-02-23 12:08:57 +02:00