Commit Graph
9533 Commits
Author SHA1 Message Date
Ryan Houdek ce16ce887b Implements PHADD/PHSUB XMM unit tests 2020-09-27 10:32:13 -07:00
Ryan Houdek 5547b3aa92 Implements PHADD/PHSUB MMX unit tests 2020-09-27 10:32:13 -07:00
Ryan Houdek 6b3e1bd75b Implements PHADD and PHSUB in the OpDispatcher 2020-09-27 10:32:10 -07:00
Ryan Houdek 72d0dd30a6 Fixes 8byte register VAddP in the x86 JIT 2020-09-27 10:31:35 -07:00
Ryan Houdek 4f73897a7f Fixes 8byte register VaddP on AArch64 JIT 2020-09-27 10:31:35 -07:00
Stefanos Kornilios Mitsis Poiitidis cdd28f9ada Merge pull request #432 from Sonicadvance1/pshufb
Implements PSHUFB
2020-09-27 14:16:50 +03:00
Ryan Houdek afa4f0df38 Enables SSSE3 in CPUID 2020-09-26 20:40:22 -07:00
Ryan Houdek 7b5892b0d5 Implements PMULHRSW unit test 2020-09-26 15:33:19 -07:00
Ryan Houdek da16b40e12 Implements PMULHRSW in the opdispatcher
Both the MMX and XMM versions
2020-09-26 15:32:21 -07:00
Ryan Houdek 315e909ed0 Implements new VectorImm in the x86 JIT 2020-09-26 15:31:18 -07:00
Ryan Houdek b30e517a0b Implements new VectorImm op in the AArch64 JIT 2020-09-26 15:31:05 -07:00
Ryan Houdek 820c10b439 Implements new VectorImm op in the interpreter 2020-09-26 15:30:43 -07:00
Ryan Houdek 62158d4f8c Implements new VectorImm IR op 2020-09-26 15:30:20 -07:00
Ryan Houdek b38f0a8043 Implements XMM pshufb unit test 2020-09-26 13:08:31 -07:00
Ryan Houdek 93b9340ed7 Implements MMX pshufb unit test 2020-09-26 13:08:31 -07:00
Ryan Houdek 58425637e2 Implements pshufb in the opdispatcher
This hits both the MMX and XMM variants
2020-09-26 13:08:31 -07:00
Ryan Houdek 91229c8ea2 Implements new VTBL1 IR op in x86 JIT 2020-09-26 12:59:34 -07:00
Ryan Houdek 59bffc7431 Implements new VTBL1 instruction in AArch64 JIT 2020-09-26 12:59:34 -07:00
Ryan Houdek a5f6a5b26e Implements new VTBL1 op in the interpreter 2020-09-26 12:59:34 -07:00
Ryan Houdek 83ac23be21 Implements new VTBL1 IR op
This perfectly matches the AArch64 variant and almost perfectly matches
x86's pshufb instruction
2020-09-26 12:59:34 -07:00
Ryan Houdek e1560bd68b Merge pull request #431 from Sonicadvance1/palignr
Implements MMX register based palignr
2020-09-26 12:59:10 -07:00
Ryan Houdek 3465021721 Implements a MMX palignr unit test 2020-09-26 12:53:51 -07:00
Ryan Houdek 55077cfa55 Implements MMX register based palignr
We had already implemented the XMM variant
2020-09-26 12:53:51 -07:00
Ryan Houdek 9cdd0c4776 Fixes an edge case in our palignr implementation
When the shift amount is greater than the size of both the registers
then it'll set the resulting register to zero
2020-09-26 12:53:51 -07:00
Ryan Houdek 12a4dd6d2d Fixes VExtr in the ARM64 JIT for 8byte registers
We only expected 16byte registers before
2020-09-26 12:52:26 -07:00
Ryan Houdek bd37d007c9 Fixes 64bit register usage in VExtr on x86_64
We would need to fall back to MMX if we wanted to handle that cleanly
there.
Just emulate instead of using MMX
2020-09-26 12:52:26 -07:00
Ryan Houdek a11aed2f47 Removes some undefined behaviour in the interpreter VExtr implementation 2020-09-26 12:52:26 -07:00
Ryan Houdek ddd7b8f406 Adds a mixxing VXor op to the IREmitter helper 2020-09-26 12:52:26 -07:00
Ryan Houdek 5b96dd04f0 Updates XMM PAlignr test to test more cases
One larger than the first register, then another that would zero
everything
2020-09-26 12:52:02 -07:00
Ryan Houdek d8d50e8200 Merge pull request #430 from Sonicadvance1/pabs
Implements support for SSSE3 PABS{B,W,D}
2020-09-26 12:51:10 -07:00
Ryan Houdek e09a9fb651 Adds XMM register PABS unit tests
verified with host runner
2020-09-26 12:47:01 -07:00
Ryan Houdek 854c2f259a Adds MMX register PABS unit tests
verified with host runner
2020-09-26 12:47:01 -07:00
Ryan Houdek ec06806244 Implements support for SSSE3 PABS{B,W,D}
For both MMX and XMM registers
2020-09-26 12:47:01 -07:00
Stefanos Kornilios Mitsis Poiitidis 83db01f505 Merge pull request #429 from Sonicadvance1/psign
Implements support for SSSE3 PSIGN{B,W,D}
2020-09-26 20:20:06 +03:00
Stefanos Kornilios Mitsis Poiitidis de62124b95 Merge pull request #428 from Sonicadvance1/lzcnt
Implements ABM's LZCNT instruction
2020-09-26 20:11:47 +03:00
Stefanos Kornilios Mitsis Poiitidis ca676e324d Merge pull request #427 from Sonicadvance1/duplicated_ops
Implements the couple of duplicated ops
2020-09-26 20:09:58 +03:00
Stefanos Kornilios Mitsis Poiitidis 5cb3a9df9d Merge pull request #426 from Sonicadvance1/addsub
Implements ADDSUB{PS, PD}
2020-09-26 20:09:48 +03:00
Stefanos Kornilios Mitsis Poiitidis cf6b07fc16 Merge pull request #425 from Sonicadvance1/remove_direct_widening_use
Removes some direct usage of widening flag
2020-09-26 20:09:35 +03:00
Stefanos Kornilios Mitsis Poiitidis 1f24fefdff Merge pull request #422 from Sonicadvance1/host_runner_enable
Adds and enables the x86 host runner when building on x86 host!
2020-09-26 20:09:15 +03:00
Ryan Houdek 42c6eacfc5 Adds and enables the x86 host runner when building on x86 host!
Disables the thunking unit test on host because obviously it won't work
there

Also disables the SSE4a unit tests on host because Intel doesn't support
SSE4a and technically neither does FEX
2020-09-25 21:17:54 -07:00
Ryan Houdek 7c14619346 Support disabling ASM and IR tests per runner type
Allows us to disable specific tests for interpreter, jit, or host.
No architecture specific disabling yet
2020-09-25 21:17:54 -07:00
Stefanos Kornilios Mitsis Poiitidis 8662fb0db7 Merge pull request #424 from Sonicadvance1/mmx_cvt
Implements missing mmx conversion ops
2020-09-25 18:21:16 +03:00
Stefanos Kornilios Mitsis Poiitidis e145876898 Merge pull request #404 from Sonicadvance1/x87_bcd
Adds support for BCD x87 intructions
2020-09-25 18:07:49 +03:00
Ryan Houdek f9cf8344e8 Adds MMX register PSIGN unit tests
verified with host runner
2020-09-24 19:46:39 -07:00
Ryan Houdek 5c339d605e Adds XMM register PSIGN unit tests
verified with host runner
2020-09-24 19:46:15 -07:00
Ryan Houdek faa06771ef Implements support for SSSE3 PSIGN{B,W,D}
For both MMX and XMM registers
2020-09-24 19:45:39 -07:00
Ryan Houdek b68832f31b Adds the IR ops to the IREmitter helper 2020-09-24 19:45:17 -07:00
Ryan Houdek 7c73920a2c Implements the new IR ops in the x86-64 JIT 2020-09-24 19:44:55 -07:00
Ryan Houdek 6254d15f02 Implements the new IR ops in the ARM64 JIT 2020-09-24 19:36:15 -07:00
Ryan Houdek 2079e3ca31 Implements the new IR ops in the interpreter 2020-09-24 19:35:18 -07:00