Commit Graph
24 Commits
Author SHA1 Message Date
Ryan Houdek 9b19d23977 Fixes FindMSB in Interpreter and Arm64 JIT 2020-03-06 07:56:14 +02:00
Ryan Houdek 2889c860d4 Adds new vector IR ops 2020-03-06 07:56:14 +02:00
Ryan Houdek a8d7549b13 Fixes CPUID call in Arm64 JIT 2020-03-06 07:56:13 +02:00
Ryan Houdek 69d6c09436 Fixes AArch64 JIT compiling 2020-03-06 07:56:13 +02:00
Ryan Houdek 92e4be828f Implements new RA pass that supports PHI nodes
Has a heuristic that changes from a map lookup and a linear scan
depending on the number of SSA values. Map lookup is faster for larger
blocks while for smaller blocks linear scan is faster.

Block scan is 1.5x - 2x faster for a 30k SSA value block I was looking
at.
2020-03-06 07:56:13 +02:00
Scott Mansell 26141e426a Fix unsigned/signed compare conditions
Also, rename to match the LLVM naming style, which is less confusing.
2020-03-06 07:56:07 +02:00
Ryan Houdek 3d0c11c770 Fixes VSLI and VSRI on AArch64
I misunderstood these instructions on the AArch64 side.
VSLI/VSRI doesn't operate on 128bit wide vectors. Its scalar version
only works on 64bit.
We have to move the vector to GPRs and do some bit twiddling then move
the full 128bit vector back after the fact
2020-03-06 07:56:07 +02:00
Ryan Houdek e3bbb8a580 Fixes a couple AArch64 JIT Atomic Fetches
Swap wasn't storing in to destinationo
And and Sub weren't using the right registers
2020-03-06 07:56:07 +02:00
Ryan Houdek 520d098e23 Implements VCastFromGPR in AArch64 JIT 2020-03-06 07:56:07 +02:00
Ryan Houdek 96b0214bc1 Add new atomic ops to the AArch64 JIT 2020-03-06 07:56:05 +02:00
Ryan Houdek e2b30d9c02 Adds REV IR op to x86 JIT and AArch64 JIT 2020-03-06 07:56:03 +02:00
Ryan Houdek fc0ce3d1dc Adds new IR ops to the AArch64 JIT 2020-03-06 07:56:02 +02:00
Ryan Houdek afdbd9ebdc Fixes issues with PSLLDQ and PSRLDQ
These are whole vector shift instructions and they shift by bytes rather
than bits.
You only get an immediate offset for the instruction.
Implements two new IR ops to account for these instructions

This also doesn't match AArch64 behaviour 100%, requires two
instructions to emulate rather than the single one on the x86-side
2020-03-06 07:55:59 +02:00
Ryan Houdek b58b5687e0 Fixes AArch64 custom ASM dispatcher 2020-03-06 07:55:46 +02:00
Ryan Houdek 6e72a365d9 Fixes for the AArch64 JIT
Custom dispatcher isn't fully working yet, but fixes a few other bugs.
2020-03-06 07:55:46 +02:00
Ryan Houdek cb81d0a1af Fixes CondJump on AArch64 JIT 2020-03-06 07:55:46 +02:00
Ryan Houdek f8b858e7fc Removes the EndFunction IR Op 2020-03-06 07:55:45 +02:00
Ryan Houdek 0a959475c5 Removes support for non-RA path on x86-64 JIT
RA is now fully working, so this path is no longer necessary
2020-03-06 07:55:35 +02:00
Ryan Houdek 668d392eb7 Adds support for spilling in the AArch64 JIT 2020-03-06 07:55:35 +02:00
Ryan Houdek 012805fd72 Fixes multiblock and a few bugs in RA.
This makes it so multiblock can now be enabled with the JITs.
Results in a decent performance increase by itself.
2020-03-06 07:55:35 +02:00
Ryan Houdek f27f9485f6 Changes IR::CondJump's condition to dump textually. 2020-03-06 07:55:33 +02:00
Ryan Houdek db5467211c Fixes the AArch64 JIT
Moves it to the new IR iterating style.
Forgot to clear icache after generation.
Fixes overly aggressive struct packing causing a fault
2020-03-06 07:55:16 +02:00
Ryan Houdek 199cfd76d8 Refactor IR and other changes that are hard to split
I had to change how blocks are represented to make it easier to parse
This required a fairly substantial refactor that makes it so blocks are
represented differently and we can walk them sequentially.

This will make future analysis easier to deal with.
Had to rewrite the passes and core's parsing of the IR afterwards.

Moved RA in to a optimization pass to be shared between the JIT backends
This works because x86-64 and AArch64 RA can be identical.

Still doesn't support PHI nodes or spilling correctly, this is the first
step in the process of getting there.
2020-03-06 07:55:13 +02:00
Ryan Houdek 7252050e42 Initial commit 2020-03-06 07:48:39 +02:00