Ryan Houdek
df0ecad15b
Merge pull request #3933 from bylaws/arm64-suspend
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Support cooperative suspend on ARM64EC
2024-08-15 01:22:28 -07:00
Ryan Houdek
aa5d2ff31c
Merge pull request #3951 from alyssarosenzweig/opt/pops
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Add a hack for multiple destinations & make good use of it
2024-08-14 12:03:00 -07:00
Alyssa Rosenzweig
c70e44cf05
OpcodeDispatcher: extract Push helper
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Mirrors the Pop helper we added. This cleans up a bunch
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
ede13e37d9
OpcodeDispatcher: optimize Thunk
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
a7dada457a
OpcodeDispatcher: optimize POPF
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
6367554d30
OpcodeDispatcher: optimize LEAVE
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
81969a684e
OpcodeDispatcher: optimize pop segment
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
ee339b5960
OpcodeDispatcher: optimize POPA
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
881c940693
OpcodeDispatcher: optimize POP
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
900c62fa7b
OpcodeDispatcher: add Pop helpers
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hide away the allocate dance
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
200c6c054f
IR: introduce POP operation
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rmw on a source, kind of terrible.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
bc0927b7b1
JIT: optimize moves for cmpxchg
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
64a45c0d29
IR: remove pairs
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They're now unused. And won't be missed.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
cab02be637
IR: remove unused pair create/extract
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
74f341bc0e
IR: remove pair from cpuid
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
feaa1af1a8
IR: remove pair from XGetBV
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:37:06 -04:00
Alyssa Rosenzweig
a9c26cbf71
IR: add coalescing heuristics for pair replacements
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
f4b5c4e69a
OpcodeDispatcher: allow upper garbage for cmpxchg
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
b8cac9f7d5
JIT: avoid some moves with caspal
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
13974df204
IR: drop CASPair pair result
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
fa6fe9bf06
IR: drop cmppairz pairs
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
746be0824e
IR: drop CASPair source pairs
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
93120cabbb
IR: drop pair from memcpy
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Alyssa Rosenzweig
04ae05f4ce
IR: add hack for multiple destinations
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-14 09:17:23 -04:00
Billy Laws
890e5e1f0f
FEXCore: Support disabling host cacheline clean/clear operations
2024-08-13 13:25:34 +00:00
Alyssa Rosenzweig
40812efaae
OpcodeDispatcher: better handle SIB indexing
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if we have shift and a constant, we can save an instruction
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
3429321d59
OpcodeDispatcher: allow upper garbage for MOVGPR
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
6cddd6cbe7
OpcodeDispatcher: allow upper garbage for a2/a3
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stores mask.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
23d07d7d0c
OpcodeDispatcher: fix folding negative offsets for 32-bit
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I don't know what I was thinking when I wrote that code. Drop the silly logic
and let ConstProp inline the immediates. This fixes a lot of silly code
generated for 32-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-13 08:41:16 -04:00
Alyssa Rosenzweig
91f4c54768
OpcodeDispatcher: optimize RDRAND on flagm
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 15:21:08 -04:00
Alyssa Rosenzweig
d9c779289c
OpcodeDispatcher: simplify RDRAND
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 15:18:00 -04:00
Alyssa Rosenzweig
5631ff4fd5
OpcodeDispatcher: optimize variable shifts
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
34301319bf
OpcodeDispatcher: optimize IncrementByCarry
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
8eac3198b6
OpcodeDispatcher: use carry increment for ADC
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
832edd4da3
OpcodeDispatcher: use carry increment for SBC
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
5823e74bcd
OpcodeDispatcher: use increment carry for atomics
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
a4545f493e
OpcodeDispatcher: add IncrementByCarry helper
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
3b8cd44ca4
IR: add NZCVSelectIncrement
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:43 -04:00
Alyssa Rosenzweig
f138d7d9b8
OpcodeDispatcher: optimize JA/JNA
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
3bb9d44bf5
OpcodeDispatcher: optimize SetCFDirect
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generally same # of instructions, but potentially fewer cycles:
old:
"rmif x4, #63 , #nzCv",
"cfinv"
new:
"xor x20, x4, #1 ",
"rmif x20, #63 , #nzCv"
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
06e6a1b19e
OpcodeDispatcher: optimize logic ops
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
256d166126
OpcodeDispatcher: optimize DAA
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
630285c589
OpcodeDispatcher: optimize SetPackedRFLAG
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
9621eca677
OpcodeDispatcher: fix setrflag masking
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
7eee50d929
OpcodeDispatcher: optimize mul/umul
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
1dc22e33ae
OpcodeDispatcher: inline some flag calculations
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
0ef8aaebeb
OpcodeDispatcher: optimize BZHI
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
d17c427e47
OpcodeDispatcher: optimize non-flagm2 comiss
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
f73fb62c6e
OpcodeDispatcher: optimize V(P)TEST
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00
Alyssa Rosenzweig
5976b712ca
OpcodeDispatcher: optimize bl*
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-08-10 13:06:42 -04:00