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1761 Commits
Author SHA1 Message Date
Ryan Houdek d81d5e21ba Merge pull request #1378 from Sonicadvance1/remove_jit_signalframe 
Dispatcher: Removes usage of SignalFrame stack on JITs
 2021-11-18 20:23:34 -08:00
Tony Wasserka 730ba42cf3 Dispatcher: Use std::vector as the underlying container for std::stack 
By default std::stack uses the heavyweight std::deque container for storage,
but std::vector is perfectly suitable for our purposes and it has better
performance characteristics.
 2021-11-18 19:15:11 +01:00
Ryan Houdek ef3338ec0d Dispatcher: Removes usage of SignalFrame stack on JITs 
Only the interpreter requires this currently since the stack register
doesn't match.
The JITs correctly set up their stack register and matches what the API
wants.

This is guaranteed to work. signal + rt_sigreturn is a handshake with
the kernel to return the data that the kernel wants.
Only time this doesn't align is when the guest signal handler longjumps
out of the signal handler. Which leaves a dangling entry in the
SignalFrame stack on the interpreter.
 2021-11-18 03:10:14 -08:00
Ryan Houdek d47182b631 Merge pull request #1376 from lioncash/vex 
Frontend: Handle VEX RXB bits
 2021-11-18 01:48:24 -08:00
Ryan Houdek 50c8d9edab Merge pull request #1375 from lioncash/bzhi 
OpcodeDispatcher: Implement BZHI
 2021-11-18 00:31:15 -08:00
lioncash 77c969b424 Frontend: Handle VEX RXB bits 
These are equivalent to the REX prefix's RXB bits, except that they're
in 1's complement form.

These are trivial to handle and fix usages of the upper range of
registers for ModRM encoded fields.

To ensure that we have coverage for this, I've altered the BEXTR test to
make use of R14 and R15.
 2021-11-17 14:50:21 -05:00
lioncash 95aabc0947 OpcodeDispatcher: Implement BZHI 2021-11-17 13:44:57 -05:00
Ryan Houdek a04cc4dc96 Merge pull request #1373 from lioncash/unused 
InterpreterCore/Dispatcher: Resolve unused variable warnings
 2021-11-17 07:49:11 -08:00
Ryan Houdek f746870356 Merge pull request #1371 from Sonicadvance1/inline_syscall 
Arm64: Adds an inline syscall optimization
 2021-11-17 07:48:51 -08:00
lioncash 70f8779793 Dispatcher: Mark guest_siginfo as [[maybe_unused]] 2021-11-17 08:43:44 -05:00
lioncash 1615ed9ed7 InterpreterCore: Remove unused variable 
This became unused once SIGBUS handling was centralized in one location.
 2021-11-17 08:38:48 -05:00
Ryan Houdek c63c5fb664 Merge pull request #1369 from lioncash/cast 
OpcodeDispatcher: Amend return types of BitSize helpers
 2021-11-17 02:00:50 -08:00
Ryan Houdek ec8e24e84a IR: Adds documentation description for syscall and inlinesyscall 2021-11-16 22:53:44 -08:00
Ryan Houdek c6b26739db Interpreter: Implements the InlineSyscall for the interpreter 
This isn't optimal, just here to work
 2021-11-16 22:53:44 -08:00
Ryan Houdek f9e22432d2 Arm64: Adds an inline syscall optimization 
In a syscall microbench this improves performance by ~19% on my
Snapdragon 888.
Going from ~9.6 million syscalls per second to ~11.5 million.

Macbook Pro is less effective here due to high syscall overhead due to
VM. Going form  7.2M/s to 7.6M/s, ~6% improvement

We can also inline some 32-bit syscalls but that will need some more
work which isn't done yet. Even though the op in the JIT supports it.
 2021-11-16 22:53:44 -08:00
Ryan Houdek d54b9cd272 IREmitter: ReplaceAllWith can't remove sideeffect nodes 
Ran in to this when removing syscall nodes. If an IR op has side-effects
then this generic helper can not remove them.
First time this was encountered and it was confusing
 2021-11-15 14:37:25 -08:00
Ryan Houdek 92b29138ba Linux: Describes syscalls that can be passed through without change 
~0 is used as an invalid syscall indicator to signify that it can be
passed through
 2021-11-15 14:36:33 -08:00
lioncash e1cf60c2ab EnumUtils: Remove shift operators from helper macro 
These aren't strictly necessary for enum flags and through discussion in
\#1363, would lead to an awkward to use overload.

If these are ever needed, they can be added back at a later date.
 2021-11-15 12:03:43 -05:00
lioncash 44f27c81d3 OpcodeDispatcher: Mark size retrieval functions as nodiscard 
Allows the compiler to warn about obvious bug cases.
 2021-11-15 11:56:21 -05:00
lioncash c9c8c38d86 OpcodeDispatcher: Increase BitSize helper return vals to uint32_t 
Pointed out by neobrain in #1362 that there are some cases where this
will overflow and not fit into 8 bits.
 2021-11-15 11:51:09 -05:00
lioncash 5c8c36c5d2 OpcodeDispatcher: Amend cast in GPROffset 
There's no bug here, but it definitely looks weird to not be aligned
with the return type.
 2021-11-15 11:48:18 -05:00
Ryan Houdek 77093a7f4d Merge pull request #1358 from Sonicadvance1/signal_rip_adjust 
Dispatcher: Partial support for RIP adjust in signal handler
 2021-11-12 21:49:25 -08:00
Ryan Houdek 2f28548ce4 Dispatcher: Partial support for RIP adjust in signal handler 
When the context structure is adjusted in the signal handler then this
updates the state of the CPU on sigreturn.

We check to see if the RIP was adjusted and in this case we will update
the JIT in a potentially unsafe fashion.
This works well enough with signal handlers that effectively just long
jump and not much else.

Fixes wine initial prefix setup where rundl32 expects to do a try-catch
fault capture but infinite loops without this.
 2021-11-12 21:22:07 -08:00
Ryan Houdek 498a845c0b Merge pull request #1365 from lioncash/mulx 
OpcodeDispatcher: Implement MULX
 2021-11-12 21:17:25 -08:00
Ryan Houdek 59ed91c50a Merge pull request #1366 from lioncash/enumreg 
OpcodeDecoder: Shorten up GPR and MM base offset retrieval
 2021-11-12 20:56:01 -08:00
lioncash 9849aef5bc Frontend: Handle ignoring of widening modes if not 64-bit mode 2021-11-12 17:00:43 -05:00
lioncash 11c3ae19b4 OpcodeDispatcher: Add helper for retrieving MM base offset 
Shortens up some lines to make them easier to read.
 2021-11-12 16:52:20 -05:00
lioncash 4351ec9f4e OpcodeDispatcher: Add helper for retrieving GPR offsets 
Greatly shortens the length of multiple lines. This makes it nicer to
see which register is being loaded or stored.
 2021-11-12 16:52:13 -05:00
lioncash 59469705e4 OpcodeDispatcher: Implement MULX 2021-11-12 16:46:38 -05:00
lioncash 763e7c5e08 OpcodeDispatcher: Resolve sign mismatches in loops 
Silences compiler warnings
 2021-11-12 13:59:46 -05:00
lioncash 2edb5d3004 X86Enums: Convert constants into enums 
Allows for parameters and functions to make use of the enum type for
enforcing type checking.
 2021-11-12 13:34:55 -05:00
Ryan Houdek c6662a46b5 Merge pull request #1364 from lioncash/fptr 
Frontend: Mark modrm function LUT as static
 2021-11-12 06:02:08 -08:00
Ryan Houdek d1fa8bcfba Merge pull request #1363 from lioncash/enum 
OpcodeDecoder: Convert enums into enum classes where applicable
 2021-11-12 05:56:23 -08:00
Ryan Houdek 3a3cbf2b5f Merge pull request #1362 from lioncash/bit 
OpcodeDispatcher: Add helper for getting bit sizes
 2021-11-12 05:53:05 -08:00
lioncash a0eb2eb2e2 Frontend: Mark modrm function LUT as static 
This doesn't need to be constructed on a by-instance basis.
 2021-11-12 08:48:49 -05:00
lioncash d58952d1ef OpcodeDispatcher: Make selection flag enum an enum class 
Makes the enum and member variable strongly typed, so that it's harder
to implicitly use incorrect values.
 2021-11-12 08:41:07 -05:00
lioncash 05ce65322f OpcodeDispatcher: Make X87Tag an enum class 
Makes the tag parameter strongly-typed and prevents implicitly passing
it an incorrect value.
 2021-11-12 08:31:50 -05:00
lioncash 3e5037042f OpcodeDispatcher: Make Segment enum an enum class 
Avoids polluting the surrounding scope.
 2021-11-12 08:24:21 -05:00
lioncash 6d82410f44 OpcodeDispatcher: Convert OpType enum into enum class 
Prevents pollution of the surrounding scope a little.
 2021-11-12 08:19:14 -05:00
lioncash 49966f2954 Utils: Add header for enum-based utilities 
Adds a header with a few utilities that make working with strongly typed
enums a little more convenient, especially when working with enum
classes.
 2021-11-12 08:15:08 -05:00
lioncash 6a79b5cf56 OpcodeDispatcher: Add helper for getting bit sizes 
Allows expressing what we're directly getting instead of needing to
repeat it in several places, given how common this is.
 2021-11-12 08:01:43 -05:00
lioncash 1d88b499e0 OpcodeDispatcher: Handle RORX 2021-11-12 07:28:28 -05:00
lioncash 5d707cf831 OpcodeDecoder: Add support for ADX 
Another CPU extension we can cross off the list.

Addresses #1355
 2021-11-10 12:11:01 -05:00
lioncash 9df8245ef2 OpcodeDispatcher: Implement BMI2 SARX/SHLX/SHRX 
Gets the basic BMI2 shifts out of the way.
 2021-11-07 02:12:06 -05:00
lioncash 7d2b3d0846 CPUID: Signify support for BMI1 
Now that all of BMI1's instructions are implemented, we can signify that
we support it in CPUID.
 2021-11-06 23:37:54 -04:00
lioncash e0973e19fc OpcodeDispatcher: Implement handling for BLSMSK 2021-11-06 23:36:52 -04:00
lioncash ff9190204c OpcodeDispatcher: Implement handling for BLSR 2021-11-06 23:28:23 -04:00
Ryan Houdek 8b64546579 Merge pull request #1349 from Sonicadvance1/fix_paranoid 
Arm64: Fixes paranoid TSO mode
 2021-11-06 17:24:41 -07:00
Ryan Houdek a9d31227bf Merge pull request #1347 from Sonicadvance1/cpuid_hybrid_flag 
CPUID: Adds support for hybrid flag
 2021-11-06 17:24:29 -07:00
Ryan Houdek 61a0508ff6 Arm64: Fixes paranoid TSO mode 
Vector loadstores were crashing. Now we emulate on load and backpatch on
store.

Store can't effectively emulate so it's better to backpatch.
 2021-11-06 04:03:37 -07:00