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The current implementation uses orr excessively. This has FEX missing hardware optimization opportunities where some CPU cores will zero-cycle move constants that fit in to the 16-bits of movz/movk. First evaluate up front if the number of 16-bit segments is > 1, in those cases we should check if it is a bitfield that can be moved in one instruction with orr. After that point we will use movz for 16-bit constant moves. Additionally this optimizes the case where a constant of zero is loaded to be a `mov <reg>, zr` which gets renamed in most hardware.