Files
FEX-Emu--FEX/External/FEXCore/Source/Interface/Core
lioncash 2f5643ae6b Arm64/VectorOps: Amend half-precision case in VFAddP
Noticed that I forgot to change the Zn register over to VTMP1.
This would have been caught by a vixl internal assert anyway.

Also make the behavior equal with VAddP, where we clear and only copy
over the exact amount of bytes instead of the whole register.
2022-09-28 15:10:49 +00:00
..
2022-09-28 15:01:31 +00:00
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2020-03-06 09:07:37 +02:00
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2020-03-06 09:07:37 +02:00
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