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FEX-Emu--FEX/unittests/InstructionCountCI/VEX_map3.json
T
Ryan Houdek 9c44e295fa InstCountCI: Update for recovering two vector temps 
All the changes are RA changes and spilling/filling taking another
instruction.
2023-09-11 16:50:52 -07:00

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{
"Features": {
"Bitness": 64,
"EnabledHostFeatures": [
"SVE256"
],
"DisabledHostFeatures": []
},
"Instructions": {
"vpermq ymm0, ymm1, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x00 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, d2",
"mov z16.d, p7/m, z2.d"
]
},
"vpermq ymm0, ymm1, 01010101b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x00 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, z2.d[1]",
"mov z16.d, p7/m, z2.d"
]
},
"vpermq ymm0, ymm1, 10101010b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x00 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, z2.d[2]",
"mov z16.d, p7/m, z2.d"
]
},
"vpermq ymm0, ymm1, 11111111b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x00 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, z2.d[3]",
"mov z16.d, p7/m, z2.d"
]
},
"vpermpd ymm0, ymm1, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x01 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, d2",
"mov z16.d, p7/m, z2.d"
]
},
"vpermpd ymm0, ymm1, 01010101b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x01 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, z2.d[1]",
"mov z16.d, p7/m, z2.d"
]
},
"vpermpd ymm0, ymm1, 10101010b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x01 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, z2.d[2]",
"mov z16.d, p7/m, z2.d"
]
},
"vpermpd ymm0, ymm1, 11111111b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x01 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.d, z2.d[3]",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0001b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v0.16b, v4.16b",
"mov v0.s[0], v3.s[0]",
"mov v3.16b, v0.16b",
"mov v3.s[1], v2.s[1]",
"mov v3.s[2], v2.s[2]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0010b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v2.s[0]",
"mov v0.16b, v4.16b",
"mov v0.s[1], v3.s[1]",
"mov v3.16b, v0.16b",
"mov v3.s[2], v2.s[2]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0011b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v3.s[0]",
"mov v0.16b, v4.16b",
"mov v0.s[1], v3.s[1]",
"mov v3.16b, v0.16b",
"mov v3.s[2], v2.s[2]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0100b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v2.s[0]",
"mov v4.s[1], v2.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v3.s[2]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0101b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v3.s[0]",
"mov v4.s[1], v2.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v3.s[2]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0110b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v2.s[0]",
"mov v4.s[1], v3.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v3.s[2]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 0111b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v3.s[0]",
"mov v4.s[1], v3.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v3.s[2]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1000b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v2.s[0]",
"mov v4.s[1], v2.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v2.s[2]",
"mov v2.16b, v0.16b",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1001b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v3.s[0]",
"mov v4.s[1], v2.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v2.s[2]",
"mov v2.16b, v0.16b",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1010b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v2.s[0]",
"mov v4.s[1], v3.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v2.s[2]",
"mov v2.16b, v0.16b",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1011b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v3.s[0]",
"mov v4.s[1], v3.s[1]",
"mov v0.16b, v4.16b",
"mov v0.s[2], v2.s[2]",
"mov v2.16b, v0.16b",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1100b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v2.s[0]",
"mov v0.16b, v4.16b",
"mov v0.s[1], v2.s[1]",
"mov v2.16b, v0.16b",
"mov v2.s[2], v3.s[2]",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1101b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v4.s[0], v3.s[0]",
"mov v0.16b, v4.16b",
"mov v0.s[1], v2.s[1]",
"mov v2.16b, v0.16b",
"mov v2.s[2], v3.s[2]",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1110b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov v0.16b, v4.16b",
"mov v0.s[0], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.s[1], v3.s[1]",
"mov v2.s[2], v3.s[2]",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd xmm0, xmm1, 1111b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd ymm0, ymm1, 00000000b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd ymm0, ymm1, 01010101b": {
"ExpectedInstructionCount": 38,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.s, s3",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z3.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z3.s[4]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[5]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z3.s[6]",
"mov z3.d, z4.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[7]",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd ymm0, ymm1, 10101010b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z3.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z3.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[4]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z3.s[5]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[6]",
"mov z2.d, z4.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z2.s, p0/m, z1.s",
"mov z1.s, z3.s[7]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendd ymm0, ymm1, 11111111b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x02 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps xmm0, xmm1, 00000000b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.s[0], v2.s[0]",
"mov v3.s[1], v2.s[0]",
"mov v3.s[2], v2.s[0]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps xmm0, xmm1, 01010101b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.s[0], v2.s[1]",
"mov v3.s[1], v2.s[1]",
"mov v3.s[2], v2.s[1]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[1]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps xmm0, xmm1, 10101010b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.s[0], v2.s[2]",
"mov v3.s[1], v2.s[2]",
"mov v3.s[2], v2.s[2]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[2]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps xmm0, xmm1, 11111111b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.s[0], v2.s[3]",
"mov v3.s[1], v2.s[3]",
"mov v3.s[2], v2.s[3]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps ymm0, ymm1, 00000000b": {
"ExpectedInstructionCount": 36,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[4]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[4]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[4]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[4]",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps ymm0, ymm1, 01010101b": {
"ExpectedInstructionCount": 36,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.s, z2.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[5]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[5]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[5]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[5]",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps ymm0, ymm1, 10101010b": {
"ExpectedInstructionCount": 36,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.s, z2.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[6]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[6]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[6]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[6]",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilps ymm0, ymm1, 11111111b": {
"ExpectedInstructionCount": 36,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x03 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.s, z2.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[7]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[7]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[7]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, z2.s[7]",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd xmm0, xmm1, 00b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.d[0], v2.d[0]",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd xmm0, xmm1, 01b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.d[0], v2.d[1]",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd xmm0, xmm1, 10b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.d[0], v2.d[0]",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[1]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd xmm0, xmm1, 11b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov v3.d[0], v2.d[1]",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[1]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0000b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0001b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0010b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0011b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0100b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0101b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0110b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 0111b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1000b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1001b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1010b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1011b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1100b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1101b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1110b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpermilpd ymm0, ymm1, 1111b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x05 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 000000b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 000001b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 000010b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, q3",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 000011b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, z3.q[1]",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 010000b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 010001b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 010010b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, q3",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 010011b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, z3.q[1]",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 100000b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, q2",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, q3",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 100001b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, q3",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 100010b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 100011b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 110000b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, q2",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 110001b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov z3.d, p7/m, z17.d",
"movi v4.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 110010b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2f128 ymm0, ymm1, 110011b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x06 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps xmm0, xmm1, 00000000b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x08 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintn v2.4s, v2.4s",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps xmm0, xmm1, 00000001b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x08 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintm v2.4s, v2.4s",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps xmm0, xmm1, 00000010b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x08 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintp v2.4s, v2.4s",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps xmm0, xmm1, 00000011b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x08 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintz v2.4s, v2.4s",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps xmm0, xmm1, 00000100b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x08 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frinti v2.4s, v2.4s",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps ymm0, ymm1, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x08 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintn z2.s, p7/m, z2.s",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps ymm0, ymm1, 00000001b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x08 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintm z2.s, p7/m, z2.s",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps ymm0, ymm1, 00000010b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x08 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintp z2.s, p7/m, z2.s",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps ymm0, ymm1, 00000011b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x08 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintz z2.s, p7/m, z2.s",
"mov z16.d, p7/m, z2.d"
]
},
"vroundps ymm0, ymm1, 00000100b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x08 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frinti z2.s, p7/m, z2.s",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd xmm0, xmm1, 00000000b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x09 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintn v2.2d, v2.2d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd xmm0, xmm1, 00000001b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x09 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintm v2.2d, v2.2d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd xmm0, xmm1, 00000010b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x09 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintp v2.2d, v2.2d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd xmm0, xmm1, 00000011b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x09 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintz v2.2d, v2.2d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd xmm0, xmm1, 00000100b": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x09 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frinti v2.2d, v2.2d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd ymm0, ymm1, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x09 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintn z2.d, p7/m, z2.d",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd ymm0, ymm1, 00000001b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x09 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintm z2.d, p7/m, z2.d",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd ymm0, ymm1, 00000010b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x09 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintp z2.d, p7/m, z2.d",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd ymm0, ymm1, 00000011b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x09 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintz z2.d, p7/m, z2.d",
"mov z16.d, p7/m, z2.d"
]
},
"vroundpd ymm0, ymm1, 00000100b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x09 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frinti z2.d, p7/m, z2.d",
"mov z16.d, p7/m, z2.d"
]
},
"vroundss xmm0, xmm1, 00000000b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x0a 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintn s2, s2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.s[0], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundss xmm0, xmm1, 00000001b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x0a 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintm s2, s2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.s[0], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundss xmm0, xmm1, 00000010b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x0a 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintp s2, s2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.s[0], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundss xmm0, xmm1, 00000011b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x0a 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintz s2, s2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.s[0], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundss xmm0, xmm1, 00000100b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x0a 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frinti s2, s2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.s[0], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundsd xmm0, xmm1, 00000000b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x0b 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintn d2, d2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.d[0], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundsd xmm0, xmm1, 00000001b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x0b 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintm d2, d2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.d[0], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundsd xmm0, xmm1, 00000010b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x0b 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintp d2, d2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.d[0], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundsd xmm0, xmm1, 00000011b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x0b 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frintz d2, d2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.d[0], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vroundsd xmm0, xmm1, 00000100b": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x0b 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"frinti d2, d2",
"mov z3.d, p7/m, z16.d",
"mov v0.16b, v3.16b",
"mov v0.d[0], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendps xmm0, xmm1, xmm2, 0000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0c 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendps xmm0, xmm1, xmm2, 0001b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0c 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov v0.16b, v4.16b",
"mov v0.s[0], v3.s[0]",
"mov v3.16b, v0.16b",
"mov v3.s[1], v2.s[1]",
"mov v3.s[2], v2.s[2]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[3]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendps xmm0, xmm1, xmm2, 1111b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0c 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendps ymm0, ymm1, ymm2, 00000000b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0c 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendps ymm0, ymm1, ymm2, 10000001b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0c 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.s, s3",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[1]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[2]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[3]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[4]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[5]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z4.s, p0/m, z1.s",
"mov z1.s, z2.s[6]",
"mov z2.d, z4.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z2.s, p0/m, z1.s",
"mov z1.s, z3.s[7]",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vblendps ymm0, ymm1, ymm2, 11111111b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0c 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd xmm0, xmm1, xmm2, 00b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd xmm0, xmm1, xmm2, 01b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov v0.16b, v4.16b",
"mov v0.d[0], v3.d[0]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[1]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd xmm0, xmm1, xmm2, 10b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov v0.16b, v4.16b",
"mov v0.d[0], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.d[1], v3.d[1]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd xmm0, xmm1, xmm2, 11b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0000b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0001b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0010b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0011b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0100b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0101b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0110b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 0111b": {
"ExpectedInstructionCount": 22,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"mov z3.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z3.d, p0/m, z1.d",
"mov z1.d, z2.d[3]",
"mov z2.d, z3.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1000b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1001b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1010b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1011b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[2]",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1100b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1101b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d3",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z4.d, p0/m, z1.d",
"mov z1.d, z2.d[1]",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1110b": {
"ExpectedInstructionCount": 21,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.d, d2",
"mov z2.d, z4.d",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-2",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[1]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #-1",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[2]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #0",
"mov z2.d, p0/m, z1.d",
"mov z1.d, z3.d[3]",
"index z0.d, #-2, #1",
"cmpeq p0.d, p7/z, z0.d, #1",
"mov z2.d, p0/m, z1.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendpd ymm0, ymm1, ymm2, 1111b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0d 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendw xmm0, xmm1, xmm2, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0e 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendw xmm0, xmm1, xmm2, 00000001b": {
"ExpectedInstructionCount": 17,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0e 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov v0.16b, v4.16b",
"mov v0.h[0], v3.h[0]",
"mov v3.16b, v0.16b",
"mov v3.h[1], v2.h[1]",
"mov v3.h[2], v2.h[2]",
"mov v3.h[3], v2.h[3]",
"mov v3.h[4], v2.h[4]",
"mov v3.h[5], v2.h[5]",
"mov v3.h[6], v2.h[6]",
"mov v0.16b, v3.16b",
"mov v0.h[7], v2.h[7]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendw xmm0, xmm1, xmm2, 11111111b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0e 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendw ymm0, ymm1, ymm2, 00000000b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0e 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendw ymm0, ymm1, ymm2, 00000001b": {
"ExpectedInstructionCount": 70,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0e 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.h, h3",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-8",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[1]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-7",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[2]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-6",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[3]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-5",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[4]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-4",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[5]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-3",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[6]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-2",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z2.h[7]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #-1",
"mov z4.h, p0/m, z1.h",
"mov z1.h, z3.h[8]",
"mov z3.d, z4.d",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #0",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[9]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #1",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[10]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #2",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[11]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #3",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[12]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #4",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[13]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #5",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[14]",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #6",
"mov z3.h, p0/m, z1.h",
"mov z1.h, z2.h[15]",
"mov z2.d, z3.d",
"index z0.h, #-8, #1",
"cmpeq p0.h, p7/z, z0.h, #7",
"mov z2.h, p0/m, z1.h",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendw ymm0, ymm1, ymm2, 11111111b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0e 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr xmm0, xmm1, xmm2, 0": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"ext v2.16b, v3.16b, v2.16b, #0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr xmm0, xmm1, xmm2, 1": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"ext v2.16b, v3.16b, v2.16b, #1",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr xmm0, xmm1, xmm2, 15": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"ext v2.16b, v3.16b, v2.16b, #15",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr xmm0, xmm1, xmm2, 16": {
"ExpectedInstructionCount": 6,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v0.2d, #0x0",
"ext v2.16b, v2.16b, v0.16b, #0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr ymm0, ymm1, ymm2, 0": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"ext v4.16b, v3.16b, v2.16b, #0",
"mov z1.q, z2.q[1]",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"mov z3.b, p6/m, z1.b",
"ext v2.16b, v3.16b, v2.16b, #0",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr ymm0, ymm1, ymm2, 1": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"ext v4.16b, v3.16b, v2.16b, #1",
"mov z1.q, z2.q[1]",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"mov z3.b, p6/m, z1.b",
"ext v2.16b, v3.16b, v2.16b, #1",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr ymm0, ymm1, ymm2, 15": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"ext v4.16b, v3.16b, v2.16b, #15",
"mov z1.q, z2.q[1]",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"mov z3.b, p6/m, z1.b",
"ext v2.16b, v3.16b, v2.16b, #15",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vpalignr ymm0, ymm1, ymm2, 16": {
"ExpectedInstructionCount": 15,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x0f 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v0.2d, #0x0",
"ext v4.16b, v2.16b, v0.16b, #0",
"mov z1.q, z2.q[1]",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"mov z3.b, p6/m, z1.b",
"movi v0.2d, #0x0",
"ext v2.16b, v2.16b, v0.16b, #0",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vpextrb rax, xmm0, 0": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x14 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"umov w20, v2.b[0]",
"uxtb x4, w20"
]
},
"vpextrb rax, xmm0, 15": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x14 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"umov w20, v2.b[15]",
"uxtb x4, w20"
]
},
"vpextrw rax, xmm0, 0": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x15 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"umov w20, v2.h[0]",
"uxth x4, w20"
]
},
"vpextrw rax, xmm0, 7": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x15 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"umov w20, v2.h[7]",
"uxth x4, w20"
]
},
"vpextrd rax, xmm0, 0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x16 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov w4, v2.s[0]"
]
},
"vpextrd rax, xmm0, 3": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x16 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov w4, v2.s[3]"
]
},
"vextractps eax, xmm0, 0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x17 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov w4, v2.s[0]"
]
},
"vextractps eax, xmm0, 3": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x17 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z16.d",
"mov w4, v2.s[3]"
]
},
"vinsertf128 ymm0, ymm1, xmm2, 0": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x18 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z1.q, q3",
"mov z2.b, p6/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vinsertf128 ymm0, ymm1, xmm2, 1": {
"ExpectedInstructionCount": 6,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x18 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z1.q, q3",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vextractf128 xmm0, ymm1, 0": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x19 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vextractf128 xmm0, ymm1, 1": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x19 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.q, z2.q[1]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vcvtps2ph xmm0, xmm1, 00000000b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x1D 128-bit"
]
},
"vcvtps2ph xmm0, xmm1, 00000001b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x1D 128-bit"
]
},
"vcvtps2ph xmm0, xmm1, 00000010b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x1D 128-bit"
]
},
"vcvtps2ph xmm0, xmm1, 00000011b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x1D 128-bit"
]
},
"vcvtps2ph xmm0, xmm1, 00000100b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x1D 128-bit"
]
},
"vcvtps2ph xmm0, ymm1, 00000000b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x1D 256-bit"
]
},
"vcvtps2ph xmm0, ymm1, 00000001b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"-inf rounding",
"Map 3 0b01 0x1D 256-bit"
]
},
"vcvtps2ph xmm0, ymm1, 00000010b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"+inf rounding",
"Map 3 0b01 0x1D 256-bit"
]
},
"vcvtps2ph xmm0, ymm1, 00000011b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"truncate rounding",
"Map 3 0b01 0x1D 256-bit"
]
},
"vcvtps2ph xmm0, ymm1, 00000100b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"host mode rounding",
"Map 3 0b01 0x1D 256-bit"
]
},
"vpinsrb xmm0, xmm1, eax, 0": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x20 128-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w4, #0",
"mov z2.d, p7/m, z17.d",
"mov v2.b[0], w20",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpinsrb xmm0, xmm1, eax, 15": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x20 128-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w4, #0",
"mov z2.d, p7/m, z17.d",
"mov v2.b[15], w20",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vinsertps xmm0, xmm1, xmm2, ((0b00 << 6) | (0b00 << 4) | (0b0000))": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x21 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov v2.s[0], v3.s[0]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vinsertps xmm0, xmm1, xmm2, ((0b00 << 6) | (0b00 << 4) | (0b1111))": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x21 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vinsertps xmm0, xmm1, xmm2, ((0b11 << 6) | (0b11 << 4) | (0b0000))": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x21 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov v2.s[3], v3.s[3]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpinsrd xmm0, xmm1, eax, 0": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x22 128-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w4, #0",
"mov z2.d, p7/m, z17.d",
"mov v2.s[0], w20",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpinsrd xmm0, xmm1, eax, 3": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x22 128-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w4, #0",
"mov z2.d, p7/m, z17.d",
"mov v2.s[3], w20",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpinsrq xmm0, xmm1, rax, 0": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x22 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.d[0], x4",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpinsrq xmm0, xmm1, rax, 1": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"nearest rounding",
"Map 3 0b01 0x22 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.d[1], x4",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vinserti128 ymm0, ymm1, xmm2, 0": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x38 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z1.q, q3",
"mov z2.b, p6/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vinserti128 ymm0, ymm1, xmm2, 1": {
"ExpectedInstructionCount": 6,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x38 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z1.q, q3",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vextracti128 xmm0, ymm1, 0": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x39 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vextracti128 xmm0, ymm1, 1": {
"ExpectedInstructionCount": 4,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x39 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z2.q, z2.q[1]",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps xmm0, xmm1, xmm2, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps xmm0, xmm1, xmm2, 00001111b": {
"ExpectedInstructionCount": 20,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"fmul v2.4s, v2.4s, v3.4s",
"mov v2.s[0], v4.s[0]",
"mov v2.s[1], v4.s[0]",
"mov v2.s[2], v4.s[0]",
"mov v2.s[3], v4.s[0]",
"faddp v2.4s, v2.4s, v4.4s",
"faddp v2.4s, v2.4s, v4.4s",
"mov v0.16b, v4.16b",
"mov v0.s[0], v2.s[0]",
"mov v3.16b, v0.16b",
"mov v3.s[1], v2.s[0]",
"mov v3.s[2], v2.s[0]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps xmm0, xmm1, xmm2, 11110000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps xmm0, xmm1, xmm2, 11111111b": {
"ExpectedInstructionCount": 16,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"fmul v2.4s, v2.4s, v3.4s",
"faddp v2.4s, v2.4s, v4.4s",
"faddp v2.4s, v2.4s, v4.4s",
"mov v0.16b, v4.16b",
"mov v0.s[0], v2.s[0]",
"mov v3.16b, v0.16b",
"mov v3.s[1], v2.s[0]",
"mov v3.s[2], v2.s[0]",
"mov v0.16b, v3.16b",
"mov v0.s[3], v2.s[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps ymm0, ymm1, ymm2, 00000000b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps ymm0, ymm1, ymm2, 00001111b": {
"ExpectedInstructionCount": 81,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"fmul z2.s, z2.s, z3.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z2.s, p0/m, z1.s",
"mov z1.s, s4",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"movprfx z0, z2",
"faddp z0.s, p7/m, z0.s, z4.s",
"uzp1 z2.s, z0.s, z0.s",
"uzp2 z1.s, z0.s, z0.s",
"splice z2.d, p6, z2.d, z1.d",
"movprfx z0, z2",
"faddp z0.s, p7/m, z0.s, z4.s",
"uzp1 z2.s, z0.s, z0.s",
"uzp2 z1.s, z0.s, z0.s",
"splice z2.d, p6, z2.d, z1.d",
"mov z1.s, s2",
"mov z3.d, z4.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps ymm0, ymm1, ymm2, 11110000b": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov z16.d, p7/m, z2.d"
]
},
"vdpps ymm0, ymm1, ymm2, 11111111b": {
"ExpectedInstructionCount": 49,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x40 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"fmul z2.s, z2.s, z3.s",
"movprfx z0, z2",
"faddp z0.s, p7/m, z0.s, z4.s",
"uzp1 z2.s, z0.s, z0.s",
"uzp2 z1.s, z0.s, z0.s",
"splice z2.d, p6, z2.d, z1.d",
"movprfx z0, z2",
"faddp z0.s, p7/m, z0.s, z4.s",
"uzp1 z2.s, z0.s, z0.s",
"uzp2 z1.s, z0.s, z0.s",
"splice z2.d, p6, z2.d, z1.d",
"mov z1.s, s2",
"mov z3.d, z4.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-4",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-3",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #-1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #0",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #1",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #2",
"mov z3.s, p0/m, z1.s",
"mov z1.s, s2",
"mov z2.d, z3.d",
"index z0.s, #-4, #1",
"cmpeq p0.s, p7/z, z0.s, #3",
"mov z2.s, p0/m, z1.s",
"mov z16.d, p7/m, z2.d"
]
},
"vdppd xmm0, xmm1, xmm2, 00000000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x41 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdppd xmm0, xmm1, xmm2, 00001111b": {
"ExpectedInstructionCount": 15,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x41 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"fmul v2.2d, v2.2d, v3.2d",
"mov v2.d[0], v4.d[0]",
"mov v2.d[1], v4.d[0]",
"faddp v2.2d, v2.2d, v4.2d",
"mov v0.16b, v4.16b",
"mov v0.d[0], v2.d[0]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdppd xmm0, xmm1, xmm2, 11110000b": {
"ExpectedInstructionCount": 3,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x41 128-bit"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vdppd xmm0, xmm1, xmm2, 11111111b": {
"ExpectedInstructionCount": 13,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x41 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"fmul v2.2d, v2.2d, v3.2d",
"faddp v2.2d, v2.2d, v4.2d",
"mov v0.16b, v4.16b",
"mov v0.d[0], v2.d[0]",
"mov v3.16b, v0.16b",
"mov v0.16b, v3.16b",
"mov v0.d[1], v2.d[0]",
"mov v2.16b, v0.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 000b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[0]",
"ext v4.16b, v2.16b, v2.16b, #0",
"ext v5.16b, v2.16b, v2.16b, #1",
"ext v6.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 001b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[1]",
"ext v4.16b, v2.16b, v2.16b, #0",
"ext v5.16b, v2.16b, v2.16b, #1",
"ext v6.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 010b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[2]",
"ext v4.16b, v2.16b, v2.16b, #0",
"ext v5.16b, v2.16b, v2.16b, #1",
"ext v6.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 011b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[3]",
"ext v4.16b, v2.16b, v2.16b, #0",
"ext v5.16b, v2.16b, v2.16b, #1",
"ext v6.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 100b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[0]",
"ext v4.16b, v2.16b, v2.16b, #4",
"ext v5.16b, v2.16b, v2.16b, #5",
"ext v6.16b, v2.16b, v2.16b, #6",
"ext v2.16b, v2.16b, v2.16b, #7",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 101b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[1]",
"ext v4.16b, v2.16b, v2.16b, #4",
"ext v5.16b, v2.16b, v2.16b, #5",
"ext v6.16b, v2.16b, v2.16b, #6",
"ext v2.16b, v2.16b, v2.16b, #7",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 110b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[2]",
"ext v4.16b, v2.16b, v2.16b, #4",
"ext v5.16b, v2.16b, v2.16b, #5",
"ext v6.16b, v2.16b, v2.16b, #6",
"ext v2.16b, v2.16b, v2.16b, #7",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw xmm0, xmm1, xmm2, 111b": {
"ExpectedInstructionCount": 18,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v3.4s, v3.s[3]",
"ext v4.16b, v2.16b, v2.16b, #4",
"ext v5.16b, v2.16b, v2.16b, #5",
"ext v6.16b, v2.16b, v2.16b, #6",
"ext v2.16b, v2.16b, v2.16b, #7",
"uabdl v4.8h, v4.8b, v3.8b",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v4.8h, v6.8h",
"addp v2.8h, v5.8h, v2.8h",
"trn1 v4.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v4.8h, v2.8h",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 000b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v8.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 001b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[1]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v8.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 010b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[2]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v8.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 011b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[3]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v8.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 100b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #4",
"ext v6.16b, v2.16b, v2.16b, #5",
"ext v7.16b, v2.16b, v2.16b, #6",
"ext v8.16b, v2.16b, v2.16b, #7",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 101b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[1]",
"ext v5.16b, v2.16b, v2.16b, #4",
"ext v6.16b, v2.16b, v2.16b, #5",
"ext v7.16b, v2.16b, v2.16b, #6",
"ext v8.16b, v2.16b, v2.16b, #7",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 110b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[2]",
"ext v5.16b, v2.16b, v2.16b, #4",
"ext v6.16b, v2.16b, v2.16b, #5",
"ext v7.16b, v2.16b, v2.16b, #6",
"ext v8.16b, v2.16b, v2.16b, #7",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vmpsadbw ymm0, ymm1, ymm2, 111b": {
"ExpectedInstructionCount": 37,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x42 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v4.4s, v3.s[3]",
"ext v5.16b, v2.16b, v2.16b, #4",
"ext v6.16b, v2.16b, v2.16b, #5",
"ext v7.16b, v2.16b, v2.16b, #6",
"ext v8.16b, v2.16b, v2.16b, #7",
"uabdl v5.8h, v5.8b, v4.8b",
"uabdl v6.8h, v6.8b, v4.8b",
"uabdl v7.8h, v7.8b, v4.8b",
"uabdl v4.8h, v8.8b, v4.8b",
"addp v5.8h, v5.8h, v7.8h",
"addp v4.8h, v6.8h, v4.8h",
"trn1 v6.4s, v5.4s, v4.4s",
"trn2 v4.4s, v5.4s, v4.4s",
"addp v4.8h, v6.8h, v4.8h",
"mov z2.q, z2.q[1]",
"mov z3.q, z3.q[1]",
"dup v3.4s, v3.s[0]",
"ext v5.16b, v2.16b, v2.16b, #0",
"ext v6.16b, v2.16b, v2.16b, #1",
"ext v7.16b, v2.16b, v2.16b, #2",
"ext v2.16b, v2.16b, v2.16b, #3",
"uabdl v5.8h, v5.8b, v3.8b",
"uabdl v6.8h, v6.8b, v3.8b",
"uabdl v7.8h, v7.8b, v3.8b",
"uabdl v2.8h, v2.8b, v3.8b",
"addp v3.8h, v5.8h, v7.8h",
"addp v2.8h, v6.8h, v2.8h",
"trn1 v5.4s, v3.4s, v2.4s",
"trn2 v2.4s, v3.4s, v2.4s",
"addp v2.8h, v5.8h, v2.8h",
"mov z1.q, q2",
"mov z2.d, z4.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vpclmulqdq xmm0, xmm1, xmm2, 00000b": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x44 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"unallocated (Unallocated)",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpclmulqdq xmm0, xmm1, xmm2, 00001b": {
"ExpectedInstructionCount": 6,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x44 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v0.2d, v2.d[1]",
"unallocated (Unallocated)",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpclmulqdq xmm0, xmm1, xmm2, 10000b": {
"ExpectedInstructionCount": 6,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x44 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"dup v0.2d, v3.d[1]",
"unallocated (Unallocated)",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpclmulqdq xmm0, xmm1, xmm2, 10001b": {
"ExpectedInstructionCount": 5,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x44 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"unallocated (Unallocated)",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpclmulqdq ymm0, ymm1, ymm2, 00000b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x44 256-bit"
]
},
"vpclmulqdq ymm0, ymm1, ymm2, 00001b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x44 256-bit"
]
},
"vpclmulqdq ymm0, ymm1, ymm2, 10000b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x44 256-bit"
]
},
"vpclmulqdq ymm0, ymm1, ymm2, 10001b": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x44 256-bit"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 00b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 01b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 10b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, q3",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 11b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, z3.q[1]",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 010000b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 010001b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 010010b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, q3",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 010011b": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, z3.q[1]",
"mov z3.d, z4.d",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 100000b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, q2",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, q3",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 100001b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, q3",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 100010b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 100011b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, q2",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 110000b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, q2",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 110001b": {
"ExpectedInstructionCount": 10,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"movi v4.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z2.d, z4.d",
"mov z2.b, p6/m, z1.b",
"mov z1.q, z3.q[1]",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 110010b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"movi v3.2d, #0x0",
"mov z1.q, q2",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vperm2i128 ymm0, ymm1, ymm2, 110011b": {
"ExpectedInstructionCount": 9,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x46 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z18.d",
"movi v3.2d, #0x0",
"mov z1.q, z2.q[1]",
"mov z3.b, p6/m, z1.b",
"mov z1.q, z2.q[1]",
"mov z2.d, z3.d",
"not p0.b, p7/z, p6.b",
"mov z2.b, p0/m, z1.b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendvps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": 7,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x4a 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z4.d, p7/m, z19.d",
"sshr v4.4s, v4.4s, #31",
"bit v2.16b, v3.16b, v4.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendvps ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x4a 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z4.d, p7/m, z19.d",
"asr z4.s, p7/m, z4.s, #31",
"movprfx z0, z3",
"bsl z0.d, z0.d, z2.d, z4.d",
"mov z2.d, z0.d",
"mov z16.d, p7/m, z2.d"
]
},
"vblendvpd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": 7,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x4b 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z4.d, p7/m, z19.d",
"sshr v4.2d, v4.2d, #63",
"bit v2.16b, v3.16b, v4.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vblendvpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x4b 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z4.d, p7/m, z19.d",
"asr z4.d, p7/m, z4.d, #63",
"movprfx z0, z3",
"bsl z0.d, z0.d, z2.d, z4.d",
"mov z2.d, z0.d",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendvb xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": 7,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x4c 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z4.d, p7/m, z19.d",
"sshr v4.16b, v4.16b, #7",
"bit v2.16b, v3.16b, v4.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vpblendvb ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0x4c 256-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"mov z3.d, p7/m, z18.d",
"mov z4.d, p7/m, z19.d",
"asr z4.b, p7/m, z4.b, #7",
"movprfx z0, z3",
"bsl z0.d, z0.d, z2.d, z4.d",
"mov z2.d, z0.d",
"mov z16.d, p7/m, z2.d"
]
},
"vfmaddsubps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5c 128-bit"
]
},
"vfmaddsubps ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5c 256-bit"
]
},
"vfmaddsubpd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5d 128-bit"
]
},
"vfmaddsubpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5d 256-bit"
]
},
"vfmsubaddps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5e 128-bit"
]
},
"vfmsubaddps ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5e 256-bit"
]
},
"vfmsubaddpd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5f 128-bit"
]
},
"vfmsubaddpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x5f 256-bit"
]
},
"vfmaddps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x68 128-bit"
]
},
"vfmaddps ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x68 256-bit"
]
},
"vfmaddpd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x69 128-bit"
]
},
"vfmaddpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x69 256-bit"
]
},
"vfmaddss xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6a 128-bit"
]
},
"vfmaddsd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6b 128-bit"
]
},
"vfmsubps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6c 128-bit"
]
},
"vfmsubps ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6c 256-bit"
]
},
"vfmsubpd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6d 128-bit"
]
},
"vfmsubpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6d 256-bit"
]
},
"vfmsubss xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6e 128-bit"
]
},
"vfmsubsd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x6f 128-bit"
]
},
"vfnmaddps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x78 128-bit"
]
},
"vfnmaddpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x78 256-bit"
]
},
"vfnmaddss xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x79 128-bit"
]
},
"vfnmaddsd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7a 128-bit"
]
},
"vfnmsubps xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7c 128-bit"
]
},
"vfnmsubps ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7c 256-bit"
]
},
"vfnmsubpd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7d 128-bit"
]
},
"vfnmsubpd ymm0, ymm1, ymm2, ymm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7d 256-bit"
]
},
"vfnmsubss xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7e 128-bit"
]
},
"vfnmsubsd xmm0, xmm1, xmm2, xmm3": {
"ExpectedInstructionCount": -1,
"Optimal": "Unknown",
"Skip": "Yes",
"Comment": [
"Map 3 0b01 0x7f 128-bit"
]
},
"vaeskeygenassist xmm0, xmm1, 0": {
"ExpectedInstructionCount": 8,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0xdf 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"ldr x0, [x28, #1608]",
"ldr q3, [x0]",
"movi v4.2d, #0x0",
"unimplemented (Unimplemented)",
"tbl v2.16b, {v2.16b}, v3.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"vaeskeygenassist xmm0, xmm1, 0xFF": {
"ExpectedInstructionCount": 11,
"Optimal": "No",
"Comment": [
"Map 3 0b01 0xdf 128-bit"
],
"ExpectedArm64ASM": [
"mov z2.d, p7/m, z17.d",
"ldr x0, [x28, #1608]",
"ldr q3, [x0]",
"movi v4.2d, #0x0",
"unimplemented (Unimplemented)",
"tbl v2.16b, {v2.16b}, v3.16b",
"mov x0, #0xff00000000",
"dup v1.2d, x0",
"eor v2.16b, v2.16b, v1.16b",
"mov v2.16b, v2.16b",
"mov z16.d, p7/m, z2.d"
]
},
"rorx eax, ebx, 0": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b11 0xf0 32-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w7, #0",
"ror w4, w20, #0"
]
},
"rorx eax, ebx, 31": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b11 0xf0 32-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w7, #0",
"ror w4, w20, #31"
]
},
"rorx eax, ebx, 32": {
"ExpectedInstructionCount": 2,
"Optimal": "No",
"Comment": [
"Map 3 0b11 0xf0 32-bit"
],
"ExpectedArm64ASM": [
"lsr w20, w7, #0",
"ror w4, w20, #0"
]
},
"rorx rax, rbx, 0": {
"ExpectedInstructionCount": 1,
"Optimal": "Yes",
"Comment": [
"Map 3 0b11 0xf0 64-bit"
],
"ExpectedArm64ASM": [
"ror x4, x7, #0"
]
},
"rorx rax, rbx, 63": {
"ExpectedInstructionCount": 1,
"Optimal": "Yes",
"Comment": [
"Map 3 0b11 0xf0 64-bit"
],
"ExpectedArm64ASM": [
"ror x4, x7, #63"
]
},
"rorx rax, rbx, 64": {
"ExpectedInstructionCount": 1,
"Optimal": "No",
"Comment": [
"Map 3 0b11 0xf0 64-bit"
],
"ExpectedArm64ASM": [
"ror x4, x7, #0"
]
}
}
}
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