Files
FEX-Emu--FEX/External/FEXCore
Ryan Houdek 35dbf6c44b OpcodeDispatcher: Moves all GPR and XMM accesses to direct register accesses
This is a bit of a large commit since it is an all or nothing sort of
change.

Instead of doing LoadContext and StoreContext for GPRs and FPRs, any
that are statically allocated (GPR and XMM) should use
{Load,Store}Register directly.

This is now enforced that {Load,Store}Context{,Indexed} will assert if
trying to access these ranges.

This is the first step towards accelerating our JIT compile times in
that it removes the need for the SRA pass to convert all the IR over.

This ensures that from the Dispatcher directly we are handling SRA
accesses as "registers", ensuring that future changes don't need to run
in to this problem.

Even though it wasn't a target of this change, in a simple test
application this removes ~12% of the total JIT compile time.
2022-11-22 23:06:18 -08:00
..
2021-02-23 12:08:57 +02:00
2020-03-06 09:07:37 +02:00
2022-03-29 11:27:43 +02:00

FEXCore - Fast x86 Core emulation library

This is the core emulation library that is used for the FEX emulator project. This project aims to provide a fast and functional x86-64 emulation library that can meet and surpass other x86-64 emulation libraries.

Goals

  • Be as fast as possible, beating and exceeding current options for x86-64 emulation
    • 25% - 50% lower performance than native code would be desired target
    • Use an IR to efficiently translate x86-64 to our host architecture
    • Support a tiered recompiler to allow for fast runtime performance
    • Support offline compilation and offline tooling for inspection and performance analysis
    • Support threaded emulation. Including emulating x86-64's strong memory model on weak memory model architectures
  • Support a significant portion of the x86-64 instruction space.
    • Including MMX, SSE, SSE2, SSE3, SSSE3, and SSE4*
  • Support fallback routines for uncommonly used x86-64 instructions
    • Including x87 and 3DNow!
  • Only support userspace emulation.
    • All x86-64 instructions run as if they are under CPL-3(userland) security layer
  • Minimal Linux Syscall emulation for testing purposes
  • Portable library implementation in order to support easy integration in to applications

Target Host Architecture

The target host architecture for this library is AArch64. Specifically the ARMv8.1 version or newer. The CPU IR is designed with AArch64 in mind but should allow for other architectures as well. x86-64 host support is available for ease of development, but is not a priority.

Not desired

  • Kernel space emulation
  • CPL0-2 emulation
  • Real Mode, Protected Mode, Virtual-8086 Mode, System Management Mode
  • IRQs
  • SVM
  • "Cycle Accurate" emulation