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FEX-Emu--FEX/FEXCore/Source/Interface/IR/Passes
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Ryan Houdek fba7c4bedc IR/RA: Fixes register aliasing and pre-colouring for AVX 
This is the cause of a bunch of redundant moves that shows up in
InstCountCI. Fixing this aliasing and pre-colouring issue causes a ton
of 256-bit operations to become optimal.
2023-10-04 10:04:06 -07:00
..
ConstProp.cpp
ConstProp: Fixes unscaled signed 9-bit range
2023-09-23 01:13:54 -07:00
DeadCodeElimination.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
DeadContextStoreElimination.cpp
RCLSE: Optimize redundant store->load operations
2023-09-23 06:06:18 -07:00
DeadStoreElimination.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
InlineCallOptimization.cpp
Passes: Rename SyscallOptimization
2023-09-24 17:25:38 -07:00
IRCompaction.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
IRDumperPass.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
IRValidation.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
IRValidation.h
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
LongDivideRemovalPass.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
RAValidation.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
RedundantFlagCalculationElimination.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
RegisterAllocationPass.cpp
IR/RA: Fixes register aliasing and pre-colouring for AVX
2023-10-04 10:04:06 -07:00
RegisterAllocationPass.h
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
ValueDominanceValidation.cpp
FEXCore/Interface/IR: Adds SPDX identifier
2023-09-19 17:33:14 -07:00