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Ryan Houdek
5472d1cc04
This does a gather load three ways, SVE256, SVE128, and ASIMD. This operation is a bit special since it it can't quite handle all gather loadstores in the 256-bit case and requires the frontend to decompose the operation in the case that the striding hits a mode that SVE doesn't support! The 128-bit case is a lot simpler since both support all the cases where stride doesn't match. I find this to be a nice compromise while there aren't any SVE256 products on the market. In the 128-bit case there is an SVE path which is utilized if the passed in stride supports what SVE understands, otherwise it falls back to an ASIMD implementation which manually emulates everything that is necessary. This instruction is very explicitly doing basically exactly what AVX gather instructions want, because it's complex enough that we don't want to try and make this a generic solution.
FEXCore - Fast x86 Core emulation library
This is the core emulation library that is used for the FEX emulator project. This project aims to provide a fast and functional x86-64 emulation library that can meet and surpass other x86-64 emulation libraries.
Goals
- Be as fast as possible, beating and exceeding current options for x86-64 emulation
- 25% - 50% lower performance than native code would be desired target
- Use an IR to efficiently translate x86-64 to our host architecture
- Support a tiered recompiler to allow for fast runtime performance
- Support offline compilation and offline tooling for inspection and performance analysis
- Support threaded emulation. Including emulating x86-64's strong memory model on weak memory model architectures
- Support a significant portion of the x86-64 instruction space.
- Including MMX, SSE, SSE2, SSE3, SSSE3, and SSE4*
- Support fallback routines for uncommonly used x86-64 instructions
- Including x87 and 3DNow!
- Only support userspace emulation.
- All x86-64 instructions run as if they are under CPL-3(userland) security layer
- Minimal Linux Syscall emulation for testing purposes
- Portable library implementation in order to support easy integration in to applications
Target Host Architecture
The target host architecture for this library is AArch64. Specifically the ARMv8.1 version or newer. The CPU IR is designed with AArch64 in mind but should allow for other architectures as well. x86-64 host support is available for ease of development, but is not a priority.
Not desired
- Kernel space emulation
- CPL0-2 emulation
- Real Mode, Protected Mode, Virtual-8086 Mode, System Management Mode
- IRQs
- SVM
- "Cycle Accurate" emulation