mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-28 07:00:49 +01:00
Ryan Houdek
7937b7e52d
Test behaviour themselves not changed at all, just data moved or aligned. For tests that aren't explicitly testing out SMC behaviour, we were accidentally relying on some aggressive SMC tracking by mixing data and code in the same page. To fix this just align the test's data to the next page boundary which means FEX's SMC tracking won't get triggered since it is no longer living in the same page. This has been a thorn for a while, so just get rid of it. We obviously still have ASM tests that still exist that /do/ rely on SMC, and those are still expected to work.
46 lines
721 B
NASM
46 lines
721 B
NASM
%ifdef CONFIG
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{
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"RegData": {
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"RAX": "0x3f800000",
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"RBX": "0x3f800000",
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"RCX": "0x3f800000",
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"RBP": "0x3f800000",
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"RDI": "0x3f800000",
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"RSP": "0x3f800000"
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},
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"MemoryRegions": {
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"0xf0000000": "4096"
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},
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"Mode": "32BIT"
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}
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%endif
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; Setup
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fld1
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lea edx, [rel base]
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mov esi, 0x64
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; Test fst
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fst dword [edx]
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fst dword [edx + 0xa]
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fst dword [edx + esi]
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fst dword [edx + esi * 4]
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fst dword [edx + esi + 0xa]
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fst dword [edx + esi * 4 + 0xa]
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; Result check
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mov eax, dword [edx]
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mov ebx, dword [edx + 0xa]
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mov ecx, dword [edx + esi]
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mov ebp, dword [edx + esi * 4]
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mov edi, dword [edx + esi + 0xa]
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mov esp, dword [edx + esi * 4 + 0xa]
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hlt
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align 4096
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section .bss
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base resb 4096
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section .text
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