Lioncache 5e6a3c6280 ARMEmitter: Remove predicate implicit conversion operators ...

Like with the vector registers, we can remove all implicit conversion
operators except the ones that convert down to the base PRegister class.

With this, all of the registers are now adequately constrained, so we
shouldn't have any wonky implicit conversions happening anymore.

2023-03-01 22:44:40 -05:00

..

Config

CPUID: Adds an config option to hide hypervisor bit

2023-02-27 23:11:23 -08:00

Context

Merge pull request #2400 from Sonicadvance1/rip_reconstruct

2023-02-22 09:48:02 -05:00

Core

ARMEmitter: Remove predicate implicit conversion operators

2023-03-01 22:44:40 -05:00

GDBJIT

GDBSymbols: Cleanups

2022-06-27 14:44:07 +03:00

HLE/Thunks

FEXCore: Removes C wrapper interface

2023-02-19 11:59:11 -08:00

IR

OpcodeDispatcher: Add VTrn/VTrn2 IR opcodes

2023-02-20 16:44:14 -05:00