Ryan Houdek 7eb8ceafbe Ensures IRList doesn't store stale aliased data in cache

2020-04-17 15:23:44 -07:00

..

Interpreter

Adds interpreter support for the new pair IR ops

2020-04-08 00:17:54 -07:00

JIT

Remove magic numbers for invalid register class definition

2020-04-10 01:02:29 -07:00

LLVMJIT

Adds LLVM support for the new pair IR ops

2020-04-10 00:50:35 -07:00

X86Tables

Fixes COMIS instruction table definitions

2020-04-10 01:02:02 -07:00

BlockCache.cpp

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

BlockCache.h

BlockCache: Remove MemoryBase logic, check full address on aliased lookup

2020-04-10 13:50:09 +03:00

BlockSamplingData.cpp

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

BlockSamplingData.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

Core.cpp

Ensures IRList doesn't store stale aliased data in cache

2020-04-17 15:23:44 -07:00

Core.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

CPUID.cpp

Remove CPUID flag saying that we support AES

2020-04-09 13:40:36 -07:00

CPUID.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

DebugData.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

Frontend.cpp

Make the MMX frontend register selection use InvalidReg

2020-04-01 20:04:05 -07:00

Frontend.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

GdbServer.cpp

Cleans up x86-64 syscall implementation

2020-04-05 14:00:13 -07:00

GdbServer.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

InternalThreadState.h

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

OpcodeDispatcher.cpp

Implements CVTSD2SI

2020-04-12 17:46:42 -07:00

OpcodeDispatcher.h

Implements support for CMPXCHG8B and CMPXCHG16B

2020-04-10 00:50:35 -07:00

X86DebugInfo.cpp

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00

X86Tables.cpp

FEXCore: Move to Externals/FEXCore

2020-03-06 09:07:37 +02:00