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Alyssa Rosenzweig 3661da1bc6 OpcodeDispatcher: calculate deferred flags before RMW on NZCV

otherwise we might have the wrong input NZCV.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2024-04-05 20:34:05 -04:00

..

FEXCore: Fixes priority of FEX_APP_CONFIG

2024-04-05 13:10:43 -07:00

Merge pull request #3534 from Sonicadvance1/move_ir_defines

2024-04-01 10:00:20 -07:00

OpcodeDispatcher: calculate deferred flags before RMW on NZCV

2024-04-05 20:34:05 -04:00

FEXCore/Interface/GDBJIT: Adds SPDX identifier

2023-09-19 17:33:15 -07:00

FEXCore: Move nearly all IR definitions to internal

2024-03-29 17:20:18 -07:00

Merge pull request #3549 from alyssarosenzweig/constprop/dce

2024-04-03 11:22:30 -04:00