mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-29 04:01:27 +01:00
Ryan Houdek
ed3af580c5
It has been a long time coming that FEX no longer needed to leak IR implementation details to the frontend, this was legacy due to IR CI and various other problems. Now that the last bits of IR leaking has been removed, move everything that we can internally to the implementation. We still have a couple of minor details in the exposed IR.h to the frontend, but these are limited to a few enums and some thunking struct information rather than all the implementation details. No functional change with this, just moving headers around.
100 lines
2.8 KiB
C++
100 lines
2.8 KiB
C++
// SPDX-License-Identifier: MIT
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#pragma once
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#include "IR.h"
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#include <FEXCore/Core/Context.h>
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#include <FEXCore/Utils/Allocator.h>
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#include <cstring>
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namespace FEXCore::IR {
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union PhysicalRegister {
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uint8_t Raw;
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struct {
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// 32 maximum physical registers
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uint8_t Reg: 5;
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// 8 Maximum classes
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uint8_t Class: 3;
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};
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bool operator==(const PhysicalRegister &Other) const {
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return Raw == Other.Raw;
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}
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PhysicalRegister(RegisterClassType Class, uint8_t Reg) : Reg(Reg), Class(Class.Val) { }
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static const PhysicalRegister Invalid() {
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return PhysicalRegister(InvalidClass, InvalidReg);
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}
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bool IsInvalid() const {
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return *this == Invalid();
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}
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};
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static_assert(sizeof(PhysicalRegister) == 1);
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struct RegisterAllocationDataDeleter;
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// This class is serialized, can't have any holes in the structure
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// otherwise ASAN complains about reading uninitialized memory
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class FEX_PACKED RegisterAllocationData {
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public:
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uint32_t SpillSlotCount {};
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uint32_t MapCount {};
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bool IsShared {false};
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PhysicalRegister Map[0];
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PhysicalRegister GetNodeRegister(NodeID Node) const {
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return Map[Node.Value];
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}
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uint32_t SpillSlots() const { return SpillSlotCount; }
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static size_t Size(uint32_t NodeCount) {
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return sizeof(RegisterAllocationData) + NodeCount * sizeof(Map[0]);
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}
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using UniquePtr = std::unique_ptr<FEXCore::IR::RegisterAllocationData, RegisterAllocationDataDeleter>;
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static UniquePtr Create(uint32_t NodeCount);
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UniquePtr CreateCopy() const;
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void Serialize(FEXCore::Context::AOTIRWriter& stream) const {
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stream.Write((const char*)&SpillSlotCount, sizeof(SpillSlotCount));
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stream.Write((const char*)&MapCount, sizeof(MapCount));
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// RAData (inline)
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// In file, IsShared is always set
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bool _IsShared = true;
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stream.Write((const char*)&_IsShared, sizeof(IsShared));
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stream.Write((const char*)&Map[0], sizeof(Map[0]) * MapCount);
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}
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};
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struct RegisterAllocationDataDeleter {
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void operator()(RegisterAllocationData* r) const {
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if (!r->IsShared) {
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FEXCore::Allocator::free(r);
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}
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}
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};
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inline auto RegisterAllocationData::Create(uint32_t NodeCount) -> UniquePtr {
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auto Ret = (RegisterAllocationData*)FEXCore::Allocator::malloc(Size(NodeCount));
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memset(&Ret->Map[0], PhysicalRegister::Invalid().Raw, NodeCount);
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Ret->SpillSlotCount = 0;
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Ret->MapCount = NodeCount;
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Ret->IsShared = false;
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return UniquePtr { Ret };
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}
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inline auto RegisterAllocationData::CreateCopy() const -> UniquePtr {
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auto copy = (RegisterAllocationData*)FEXCore::Allocator::malloc(Size(MapCount));
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memcpy((void*)©->Map[0], (void*)&Map[0], MapCount * sizeof(Map[0]));
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copy->SpillSlotCount = SpillSlotCount;
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copy->MapCount = MapCount;
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copy->IsShared = IsShared;
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return UniquePtr { copy };
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}
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}
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