Merge pull request #1232 from Sonicadvance1/iwyu_fixes

Massive amount of IWYU cleanup

External/FEXCore/Source/Common/NetStream.cpp

@@ -1,11 +1,7 @@
 #include "NetStream.h"
 
-#include <cstring>
-
-#include <sys/types.h>
 #include <sys/socket.h>
 
-#include <stdio.h>
 #include <unistd.h>
 
 int NetStream::NetBuf::flushBuffer(const char *buffer, size_t size) {
@@ -29,7 +25,7 @@ std::streamsize NetStream::NetBuf::xsputn(const char* buffer, std::streamsize si
 
     // Check if the string fits neatly in our buffer
     if (size <= buf_remaining) {
-        std::memcpy(pptr(), buffer, size);
+        ::memcpy(pptr(), buffer, size);
         pbump(size);
         return size;
     }

External/FEXCore/Source/Common/NetStream.h

@@ -2,6 +2,7 @@
 
 #include <array>
 #include <iostream>
+#include <iterator>
 #include <string.h>
 
 class NetStream : public std::iostream {

External/FEXCore/Source/Common/Paths.cpp

@@ -3,8 +3,9 @@
 
 #include <cstdlib>
 #include <filesystem>
+#include <memory>
 #include <pwd.h>
-#include <sys/stat.h>
+#include <system_error>
 #include <unistd.h>
 
 namespace FEXCore::Paths {

External/FEXCore/Source/Interface/Config/Config.cpp

@@ -1,16 +1,36 @@
 #include "Common/StringConv.h"
 #include "Common/Paths.h"
 
-#include <FEXCore/Utils/LogManager.h>
-#include "Interface/Context/Context.h"
-
 #include <FEXCore/Config/Config.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <assert.h>
+#include <cstdlib>
 #include <filesystem>
 #include <fstream>
+#include <functional>
 #include <map>
+#include <memory>
+#include <list>
+#include <optional>
+#include <stddef.h>
+#include <stdint.h>
+#include <string>
+#include <string_view>
 #include <sys/sysinfo.h>
+#include <system_error>
+#include <type_traits>
+#include <unordered_map>
+#include <utility>
+#include <vector>
+
 #include <tiny-json.h>
 
+namespace FEXCore::Context {
+  struct Context;
+}
+
 namespace FEXCore::Config {
 namespace DefaultValues {
 #define P(x) x

External/FEXCore/Source/Interface/Context/Context.cpp

@@ -4,9 +4,18 @@
 #include "Interface/Core/OpcodeDispatcher.h"
 #include "Interface/Core/X86Tables/X86Tables.h"
 
-#include <FEXCore/Config/Config.h>
 #include <FEXCore/Core/CoreState.h>
-#include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/Core/Context.h>
+#include <FEXCore/Core/CPUID.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include "FEXCore/Debug/InternalThreadState.h"
+
+#include <string.h>
+#include <utility>
+
+namespace FEXCore::HLE {
+  class SyscallVisitor;
+}
 
 namespace FEXCore::Context {
   void InitializeStaticTables(OperatingMode Mode) {

External/FEXCore/Source/Interface/Context/Context.h

@@ -1,48 +1,47 @@
 #pragma once
 
-#include "Common/JitSymbols.h"
 #include "Interface/Core/CPUID.h"
-#include "Interface/Core/Frontend.h"
 #include "Interface/Core/HostFeatures.h"
-#include "Interface/Core/InternalThreadState.h"
 #include "Interface/Core/X86HelperGen.h"
-#include "Interface/IR/PassManager.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
 #include <FEXCore/Config/Config.h>
-#include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Core/Context.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/Utils/CompilerDefs.h>
 #include <FEXCore/Utils/Event.h>
 #include <stdint.h>
 
+#include <atomic>
+#include <condition_variable>
 #include <functional>
 #include <istream>
 #include <map>
 #include <memory>
 #include <mutex>
-#include <optional>
-#include <ostream>
-#include <set>
 #include <shared_mutex>
+#include <stddef.h>
+#include <string>
 #include <unordered_map>
 #include <queue>
+#include <vector>
 
 namespace FEXCore {
+class CodeLoader;
 class ThunkHandler;
-class BlockSamplingData;
 class GdbServer;
-class SiganlDelegator;
 
 namespace CPU {
   class Arm64JITCore;
   class X86JITCore;
 }
 namespace HLE {
+struct SyscallArguments;
 class SyscallHandler;
 }
 }
 
 namespace FEXCore::IR {
-  class RegisterAllocationPass;
   class RegisterAllocationData;
   class IRListView;
 namespace Validation {

External/FEXCore/Source/Interface/Core/ArchHelpers/Arm64_stubs.cpp

@@ -1,6 +1,7 @@
 #include "Interface/Core/ArchHelpers/Arm64.h"
 
 #include <FEXCore/Utils/LogManager.h>
+#include <stdint.h>
 
 namespace FEXCore::ArchHelpers::Arm64 {
 
@@ -23,4 +24,4 @@ bool HandleAtomicMemOp(void *_ucontext, void *_info, uint32_t Instr) {
 }
 #endif
 
-}
+}

External/FEXCore/Source/Interface/Core/BlockSamplingData.cpp

@@ -2,6 +2,7 @@
 #include <FEXCore/Utils/LogManager.h>
 #include <cstring>
 #include <fstream>
+#include <utility>
 
 namespace FEXCore {
   void BlockSamplingData::DumpBlockData() {

External/FEXCore/Source/Interface/Core/BlockSamplingData.h

@@ -1,6 +1,7 @@
 #pragma once
+
+#include <cstdint>
 #include <unordered_map>
-#include <stdint.h>
 
 namespace FEXCore {
 class BlockSamplingData {

External/FEXCore/Source/Interface/Core/CPUID.cpp

@@ -5,8 +5,11 @@ desc: Handles presented capability bits for guest cpu
 $end_info$
 */
 
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/CPUID.h>
 #include "Interface/Context/Context.h"
 #include "Interface/Core/CPUID.h"
+#include "Interface/Core/HostFeatures.h"
 #include "git_version.h"
 
 #include <cstring>

External/FEXCore/Source/Interface/Core/CPUID.h

@@ -4,7 +4,9 @@
 
 #include <FEXCore/Core/CPUID.h>
 #include <FEXCore/Config/Config.h>
-#include <FEXCore/Utils/LogManager.h>
+
+#include <cstdint>
+#include <utility>
 
 namespace FEXCore {
 namespace Context {

External/FEXCore/Source/Interface/Core/CompileService.cpp

@@ -1,8 +1,21 @@
 #include "Interface/Context/Context.h"
 #include "Interface/Core/LookupCache.h"
 #include "Interface/Core/CompileService.h"
-#include "Interface/Core/InternalThreadState.h"
 #include "Interface/Core/OpcodeDispatcher.h"
+#include "FEXCore/Debug/InternalThreadState.h"
+#include "FEXCore/HLE/Linux/ThreadManagement.h"
+#include "Interface/IR/PassManager.h"
+
+#include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/Utils/Event.h>
+#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/Utils/Threads.h>
+
+#include <memory>
+#include <pthread.h>
+#include <stdio.h>
 
 namespace FEXCore {
   static void* ThreadHandler(void *Arg) {

External/FEXCore/Source/Interface/Core/CompileService.h

@@ -1,23 +1,22 @@
 #pragma once
 
-#include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/Utils/Event.h>
 #include <FEXCore/Utils/Threads.h>
 
+#include <atomic>
 #include <memory>
-#include <thread>
-#include <unordered_map>
+#include <mutex>
 #include <queue>
+#include <stdint.h>
+#include <vector>
 
 namespace FEXCore {
 namespace Context {
   struct Context;
 }
-namespace Core {
-  struct InternalThreadState;
-}
-
 namespace IR {
+  class IRListView;
   class RegisterAllocationData;
 };
 class CompileService final {

External/FEXCore/Source/Interface/Core/Core.cpp

@@ -7,42 +7,70 @@ desc: Glues Frontend, OpDispatcher and IR Opts & Compilation, LookupCache, Dispa
 $end_info$
 */
 
-#include "Common/MathUtils.h"
-#include "Common/Paths.h"
-
 #include "Interface/Context/Context.h"
 #include "Interface/Core/LookupCache.h"
-#include "Interface/Core/BlockSamplingData.h"
 #include "Interface/Core/CompileService.h"
 #include "Interface/Core/Core.h"
-#include "Interface/Core/DebugData.h"
+#include "Interface/Core/CPUID.h"
+#include "Interface/Core/Frontend.h"
+#include "Interface/Core/GdbServer.h"
 #include "Interface/Core/OpcodeDispatcher.h"
 #include "Interface/Core/Interpreter/InterpreterCore.h"
 #include "Interface/Core/JIT/JITCore.h"
+#include "Interface/HLE/Thunks/Thunks.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 #include "Interface/IR/Passes.h"
+#include "Interface/IR/PassManager.h"
 
 #include <FEXCore/Config/Config.h>
 #include <FEXCore/Core/CodeLoader.h>
+#include <FEXCore/Core/Context.h>
 #include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Core/SignalDelegator.h>
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/InternalThreadState.h>
+#include <FEXCore/Debug/X86Tables.h>
 #include <FEXCore/HLE/SyscallHandler.h>
+#include <FEXCore/HLE/Linux/ThreadManagement.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/IR/RegisterAllocationData.h>
 #include <FEXCore/Utils/Allocator.h>
+#include <FEXCore/Utils/Event.h>
+#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/Utils/Threads.h>
 
-#include "Interface/HLE/Thunks/Thunks.h"
-#include "FEXCore/Utils/Allocator.h"
-
-#include <xxhash.h>
-#include <fstream>
-#include <unistd.h>
-#include <filesystem>
 #include <algorithm>
+#include <array>
+#include <atomic>
+#include <chrono>
+#include <condition_variable>
+#include <cstdint>
+#include <filesystem>
+#include <functional>
+#include <map>
+#include <memory>
+#include <mutex>
+#include <queue>
+#include <set>
+#include <shared_mutex>
+#include <signal.h>
+#include <stdio.h>
+#include <string.h>
+#include <string>
+#include <string_view>
+#include <sstream>
 #include <sys/mman.h>
-#include <unistd.h>
 #include <sys/stat.h>
-
-#include "Interface/Core/GdbServer.h"
+#include <sys/syscall.h>
+#include <type_traits>
+#include <unistd.h>
+#include <unordered_map>
+#include <utility>
+#include <vector>
+#include <xxhash.h>
 
 namespace FEXCore::CPU {
   bool CreateCPUCore(FEXCore::Context::Context *CTX) {

External/FEXCore/Source/Interface/Core/Dispatcher/Arm64Dispatcher.cpp

@@ -2,17 +2,28 @@
 
 #include "Interface/Core/ArchHelpers/MContext.h"
 #include "Interface/Core/Dispatcher/Arm64Dispatcher.h"
-
 #include "Interface/Core/Interpreter/InterpreterClass.h"
-#include "Interface/Context/Context.h"
 
+#include "Interface/Context/Context.h"
+#include "Interface/Core/X86HelperGen.h"
+
+#include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/InternalThreadState.h>
+#include <array>
 #include <bit>
 #include <cmath>
+#include <cstdint>
+#include <memory>
+#include <stddef.h>
 
 #include "aarch64/assembler-aarch64.h"
+#include "aarch64/constants-aarch64.h"
+#include "aarch64/operands-aarch64.h"
 #include "aarch64/cpu-aarch64.h"
-#include "aarch64/disasm-aarch64.h"
+#include "code-buffer-vixl.h"
+#include "platform-vixl.h"
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/Dispatcher/Arm64Dispatcher.h

@@ -3,7 +3,13 @@
 #include "Interface/Core/ArchHelpers/Arm64Emitter.h"
 #include "Interface/Core/Dispatcher/Dispatcher.h"
 
-#include "aarch64/assembler-aarch64.h"
+namespace FEXCore::Context {
+struct Context;
+}
+
+namespace FEXCore::Core {
+struct InternalThreadState;
+}
 
 namespace FEXCore::CPU {
 
@@ -15,4 +21,4 @@ class Arm64Dispatcher final : public Dispatcher, public Arm64Emitter {
     void SpillSRA(void *ucontext) override;
 };
 
-}
+}

External/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp

@@ -1,8 +1,23 @@
-#include "Interface/Core/Dispatcher/Dispatcher.h"
 
 #include "Common/MathUtils.h"
 #include "Interface/Core/ArchHelpers/MContext.h"
+#include "Interface/Core/Dispatcher/Dispatcher.h"
+#include "Interface/Core/X86HelperGen.h"
+
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/Core/UContext.h>
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/InternalThreadState.h>
+#include <FEXCore/Utils/Event.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <atomic>
+#include <condition_variable>
+#include <bits/types/siginfo_t.h>
+#include <signal.h>
+#include <string.h>
 
 namespace FEXCore::CPU {
 
@@ -360,18 +375,18 @@ bool Dispatcher::HandleGuestSignal(int Signal, void *info, void *ucontext, Guest
   }
 
   if (Is64BitMode) {
-    Frame->State.gregs[X86State::REG_RDI] = Signal;
+    Frame->State.gregs[FEXCore::X86State::REG_RDI] = Signal;
 
     // Set up the new SP for stack handling
     NewGuestSP -= 8;
     *(uint64_t*)NewGuestSP = SignalReturn;
-    Frame->State.gregs[X86State::REG_RSP] = NewGuestSP;
+    Frame->State.gregs[FEXCore::X86State::REG_RSP] = NewGuestSP;
   }
   else {
     NewGuestSP -= 4;
     *(uint32_t*)NewGuestSP = SignalReturn;
     LOGMAN_THROW_A(SignalReturn < 0x1'0000'0000ULL, "This needs to be below 4GB");
-    Frame->State.gregs[X86State::REG_RSP] = NewGuestSP;
+    Frame->State.gregs[FEXCore::X86State::REG_RSP] = NewGuestSP;
   }
 
   return true;

External/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.h

@@ -1,11 +1,24 @@
 #pragma once
 
 #include <FEXCore/Core/CPUBackend.h>
-#include <FEXCore/Core/SignalDelegator.h>
 
 #include "Interface/Context/Context.h"
 
+#include <bits/types/stack_t.h>
+#include <cstdint>
+#include <stddef.h>
 #include <stack>
+#include <tuple>
+#include <vector>
+
+namespace FEXCore {
+struct GuestSigAction;
+}
+
+namespace FEXCore::Core {
+struct CpuStateFrame;
+struct InternalThreadState;
+}
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/Dispatcher/X86Dispatcher.cpp

@@ -3,10 +3,21 @@
 #include "Interface/Core/Dispatcher/X86Dispatcher.h"
 
 #include "Interface/Core/Interpreter/InterpreterClass.h"
+#include "Interface/Core/X86HelperGen.h"
 #include "Interface/Context/Context.h"
 
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Debug/InternalThreadState.h>
+#include <FEXCore/Utils/Allocator.h>
+
 #include <cmath>
+#include <memory>
+#include <stddef.h>
+#include <stdint.h>
+#include <sys/mman.h>
+#include "xbyak/xbyak.h"
 
 namespace FEXCore::CPU {
 static constexpr size_t MAX_DISPATCHER_CODE_SIZE = 4096;

External/FEXCore/Source/Interface/Core/Dispatcher/X86Dispatcher.h

@@ -2,11 +2,17 @@
 
 #include "Interface/Core/Dispatcher/Dispatcher.h"
 
-#include <FEXCore/Utils/Allocator.h>
-
 #define XBYAK64
 #include <xbyak/xbyak.h>
 
+namespace FEXCore::Context {
+  struct Context;
+}
+
+namespace FEXCore::Core {
+  struct InternalThreadState;
+}
+
 namespace FEXCore::CPU {
 
 class X86Dispatcher final : public Dispatcher, public Xbyak::CodeGenerator {

External/FEXCore/Source/Interface/Core/Frontend.cpp

@@ -7,13 +7,16 @@ $end_info$
 
 #include "Interface/Context/Context.h"
 #include "Interface/Core/Frontend.h"
-#include "Interface/Core/InternalThreadState.h"
 
 #include <array>
+#include <assert.h>
 #include <algorithm>
 #include <cstring>
+#include <FEXCore/Config/Config.h>
 #include <FEXCore/Core/X86Enums.h>
 #include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/HLE/SyscallHandler.h>
+#include <FEXCore/Utils/Allocator.h>
 #include <FEXCore/Utils/LogManager.h>
 #include <FEXCore/Utils/Telemetry.h>
 #include <set>

External/FEXCore/Source/Interface/Core/Frontend.h

@@ -6,9 +6,8 @@
 
 #include <array>
 #include <cstdint>
-#include <utility>
 #include <set>
-#include <stack>
+#include <stddef.h>
 #include <vector>
 
 namespace FEXCore::Context {

External/FEXCore/Source/Interface/Core/GdbServer.cpp

@@ -8,30 +8,41 @@ $end_info$
 #include <cstdlib>
 #include <cstdio>
 #include <iomanip>
-#include <iostream>
 #include <sstream>
 #include <string>
 #include <memory>
 #include <optional>
 #include "Common/NetStream.h"
 #include "Common/SoftFloat.h"
+#include "Interface/Context/Context.h"
 
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/Context.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/InternalThreadState.h>
+#include <FEXCore/HLE/Linux/ThreadManagement.h>
 #include <FEXCore/Utils/CompilerDefs.h>
 #include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/Utils/Threads.h>
 
+#include <atomic>
 #include <cstring>
+#include <errno.h>
 #include <fcntl.h>
-#include <fmt/format.h>
 #include <fstream>
+#include <fmt/format.h>
 #include <netdb.h>
+#include <signal.h>
+#include <stddef.h>
+#include <string_view>
 #include <sys/socket.h>
-#include <sys/types.h>
 #include <unistd.h>
-
+#include <utility>
+#include <vector>
 
 #include "GdbServer.h"
-#include <FEXCore/Core/CodeLoader.h>
-#include <FEXCore/Core/X86Enums.h>
 
 namespace FEXCore
 {

External/FEXCore/Source/Interface/Core/GdbServer.h

@@ -5,18 +5,21 @@ $end_info$
 */
 #pragma once
 
-#include <mutex>
-#include <thread>
-
-#include "Interface/Context/Context.h"
-#include "Common/NetStream.h"
-
+#include <FEXCore/Config/Config.h>
 #include <FEXCore/Utils/Threads.h>
 
+#include <istream>
+#include <memory>
 #include <mutex>
+#include <stdint.h>
+#include <string>
 
 namespace FEXCore {
 
+namespace Context {
+  struct Context;
+}
+
 class GdbServer {
 public:
     GdbServer(FEXCore::Context::Context *ctx);

External/FEXCore/Source/Interface/Core/Interpreter/InterpreterCore.cpp

@@ -1,30 +1,31 @@
-#include "Common/MathUtils.h"
-#include "Common/SoftFloat.h"
 #include "Interface/Context/Context.h"
 
 #include "Interface/Core/ArchHelpers/Arm64.h"
 #include "Interface/Core/ArchHelpers/MContext.h"
-#include "Interface/Core/LookupCache.h"
-#include "Interface/Core/DebugData.h"
-#include "Interface/Core/InternalThreadState.h"
+#include "Interface/Core/Dispatcher/Dispatcher.h"
 #include "Interface/Core/Interpreter/InterpreterClass.h"
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/Utils/LogManager.h>
 
-#include <FEXCore/Core/CPUBackend.h>
-#include <FEXCore/HLE/SyscallHandler.h>
-#include <FEXCore/IR/IR.h>
-#include <FEXCore/IR/IntrusiveIRList.h>
-
-#include "Interface/HLE/Thunks/Thunks.h"
-
-#include <atomic>
-#include <cmath>
-#include <limits>
-#include <vector>
+#include <memory>
+#include <bits/types/stack_t.h>
+#include <signal.h>
+#include <stdint.h>
+#include <unordered_map>
+#include <utility>
 
 #include "InterpreterOps.h"
 
+namespace FEXCore::IR {
+  class IRListView;
+  class RegisterAllocationData;
+}
+
 namespace FEXCore::CPU {
+class CPUBackend;
 
 static void InterpreterExecution(FEXCore::Core::CpuStateFrame *Frame) {
   auto Thread = Frame->Thread;

External/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.cpp

@@ -1,17 +1,16 @@
-#include "Common/MathUtils.h"
 #include "Common/SoftFloat.h"
+#include "Common/SoftFloat-3e/softfloat.h"
 #include "Interface/Context/Context.h"
+#include "Interface/Core/CPUID.h"
 #include "InterpreterOps.h"
 
 #ifdef _M_ARM_64
 #include "Interface/Core/ArchHelpers/Arm64.h"
 #endif
-#include "Interface/Core/LookupCache.h"
-#include "Interface/Core/DebugData.h"
-#include "Interface/Core/InternalThreadState.h"
-#include "Interface/Core/Interpreter/InterpreterClass.h"
 
 #include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/HLE/SyscallHandler.h>
 #include <FEXCore/IR/IR.h>
 #include <FEXCore/IR/IntrusiveIRList.h>
@@ -21,15 +20,18 @@
 
 #include "Interface/HLE/Thunks/Thunks.h"
 
+#include <alloca.h>
 #include <algorithm>
 #include <atomic>
+#include <bit>
 #include <cmath>
+#include <cstdint>
 #include <limits>
-#include <vector>
-#ifdef _M_X86_64
-#include <xmmintrin.h>
-#endif
-#include <unistd.h>
+#include <memory>
+#include <stddef.h>
+#include <stdlib.h>
+#include <string.h>
+#include <time.h>
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.h

@@ -1,9 +1,13 @@
+#pragma once
+#include <stdint.h>
+
 namespace FEXCore::Core {
   struct InternalThreadState;
 }
 
 namespace FEXCore::IR {
     class IRListView;
+    struct IROp_Header;
 }
 
 namespace FEXCore::Core{
@@ -32,11 +36,11 @@ namespace FEXCore::CPU {
     FallbackABI ABI;
     void *fn;
   };
-  
+
   class InterpreterOps {
 
     public:
       static void InterpretIR(FEXCore::Core::InternalThreadState *Thread, uint64_t Entry, FEXCore::IR::IRListView *CurrentIR, FEXCore::Core::DebugData *DebugData);
       static bool GetFallbackHandler(IR::IROp_Header *IROp, FallbackInfo *Info);
   };
-};
+};

External/FEXCore/Source/Interface/Core/JIT/x86_64/ALUOps.cpp

@@ -5,7 +5,14 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <stdint.h>
+#include <utility>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void X86JITCore::Op_##x(FEXCore::IR::IROp_Header *IROp, uint32_t Node)

External/FEXCore/Source/Interface/Core/JIT/x86_64/AtomicOps.cpp

@@ -5,7 +5,14 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <stdint.h>
+#include <utility>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void X86JITCore::Op_##x(FEXCore::IR::IROp_Header *IROp, uint32_t Node)

External/FEXCore/Source/Interface/Core/JIT/x86_64/BranchOps.cpp

@@ -4,14 +4,28 @@ tags: backend|x86-64
 $end_info$
 */
 
+#include "Interface/Context/Context.h"
+#include "Interface/Core/CPUID.h"
+#include "Interface/Core/Dispatcher/Dispatcher.h"
 #include "Interface/Core/LookupCache.h"
-
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+#include "Interface/HLE/Thunks/Thunks.h"
 
+#include <FEXCore/Core/CPUID.h>
+#include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/HLE/SyscallHandler.h>
-#include <Interface/HLE/Thunks/Thunks.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <memory>
+#include <stddef.h>
+#include <stdint.h>
+#include <unordered_map>
+#include <utility>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void X86JITCore::Op_##x(FEXCore::IR::IROp_Header *IROp, uint32_t Node)

External/FEXCore/Source/Interface/Core/JIT/x86_64/ConversionOps.cpp

@@ -5,7 +5,13 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <stdint.h>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/JIT/x86_64/EncryptionOps.cpp

@@ -5,7 +5,12 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/IR/IR.h>
+
+#include <array>
+#include <stdint.h>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void X86JITCore::Op_##x(FEXCore::IR::IROp_Header *IROp, uint32_t Node)

External/FEXCore/Source/Interface/Core/JIT/x86_64/FlagOps.cpp

@@ -5,7 +5,12 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/IR/IR.h>
+
+#include <array>
+#include <stdint.h>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp

@@ -8,20 +8,36 @@ $end_info$
 #include "Interface/Context/Context.h"
 #include "Interface/Core/LookupCache.h"
 
+#include "Interface/Core/Dispatcher/Dispatcher.h"
 #include "Interface/Core/Dispatcher/X86Dispatcher.h"
+#include "Interface/Core/Interpreter/InterpreterOps.h"
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/Core/InternalThreadState.h"
-
+#include "Interface/IR/PassManager.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 
-#include <FEXCore/Core/X86Enums.h>
-#include <FEXCore/Core/UContext.h>
+#include <FEXCore/Core/CPUBackend.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/Debug/InternalThreadState.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/IR/RegisterAllocationData.h>
 #include <FEXCore/Utils/Allocator.h>
+#include <FEXCore/Utils/LogManager.h>
 
-#include <cmath>
+#include <algorithm>
+#include <array>
+#include <bits/types/stack_t.h>
+#include <memory>
+#include <stddef.h>
+#include <stdint.h>
 #include <signal.h>
-
-#include "Interface/Core/Interpreter/InterpreterOps.h"
+#include <sys/mman.h>
+#include <tuple>
+#include <unordered_map>
+#include <utility>
+#include <vector>
+#include <xbyak/xbyak.h>
 
 // #define DEBUG_RA 1
 // #define DEBUG_CYCLES

External/FEXCore/Source/Interface/Core/JIT/x86_64/MemoryOps.cpp

@@ -5,9 +5,15 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
 
-#include <cmath>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <stddef.h>
+#include <stdint.h>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/JIT/x86_64/MiscOps.cpp

@@ -4,8 +4,18 @@ tags: backend|x86-64
 $end_info$
 */
 
+#include "Interface/Context/Context.h"
+#include "Interface/Core/Dispatcher/Dispatcher.h"
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/IR/IR.h>
+
+#include <array>
+#include <stddef.h>
+#include <stdint.h>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 static void PrintValue(uint64_t Value) {

External/FEXCore/Source/Interface/Core/JIT/x86_64/MoveOps.cpp

@@ -5,7 +5,13 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+
+#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/IR/IR.h>
+
+#include <array>
+#include <stdint.h>
+#include <utility>
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/JIT/x86_64/VectorOps.cpp

@@ -5,8 +5,14 @@ $end_info$
 */
 
 #include "Interface/Core/JIT/x86_64/JITClass.h"
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
 
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <stddef.h>
+#include <stdint.h>
+#include <xbyak/xbyak.h>
 
 namespace FEXCore::CPU {
 

External/FEXCore/Source/Interface/Core/LookupCache.cpp

@@ -5,10 +5,11 @@ desc: Stores information about blocks, and provides C++ implementations to looku
 $end_info$
 */
 
-#include "Interface/Context/Context.h"
-#include "Interface/Core/Core.h"
-#include "Interface/Core/LookupCache.h"
 #include <FEXCore/Utils/Allocator.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include "Interface/Context/Context.h"
+#include "Interface/Core/LookupCache.h"
 
 #include <sys/mman.h>
 

External/FEXCore/Source/Interface/Core/LookupCache.h

@@ -1,10 +1,18 @@
 #pragma once
-#include "Interface/Context/Context.h"
 #include <FEXCore/Utils/LogManager.h>
 
+#include <cstdint>
+#include <functional>
 #include <map>
+#include <stddef.h>
+#include <utility>
+#include <vector>
 
 namespace FEXCore {
+namespace Context {
+  struct Context;
+}
+
 class LookupCache {
 public:
 

External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp

@@ -7,16 +7,22 @@ $end_info$
 
 #include "Interface/Context/Context.h"
 #include "Interface/Core/OpcodeDispatcher.h"
-#include "Interface/HLE/Thunks/Thunks.h"
 
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/Context.h>
 #include <FEXCore/Core/CoreState.h>
-#include <bit>
-#include <climits>
-#include <cstddef>
-#include <cstdint>
-
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/X86Tables.h>
 #include <FEXCore/HLE/SyscallHandler.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <algorithm>
+#include <array>
+#include <cstdint>
+#include <tuple>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/Core/OpcodeDispatcher.h

@@ -3,7 +3,8 @@
 #include "Interface/Core/Frontend.h"
 #include "Interface/Context/Context.h"
 
-#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/Context.h>
 #include <FEXCore/Debug/X86Tables.h>
 #include <FEXCore/IR/IntrusiveIRList.h>
 #include <FEXCore/IR/IR.h>
@@ -12,9 +13,10 @@
 #include <FEXCore/Utils/LogManager.h>
 
 #include <cstdint>
-#include <functional>
 #include <map>
-#include <set>
+#include <stddef.h>
+#include <utility>
+#include <vector>
 
 namespace FEXCore::IR {
 class Pass;

External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp

@@ -5,11 +5,16 @@ desc: Handles x86/64 Crypto instructions to IR
 $end_info$
 */
 
+#include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/Utils/LogManager.h>
 #include "Interface/Core/OpcodeDispatcher.h"
 
-#include <FEXCore/Core/X86Enums.h>
+#include <stdint.h>
 
 namespace FEXCore::IR {
+class OrderedNode;
+
 #define OpcodeArgs [[maybe_unused]] FEXCore::X86Tables::DecodedOp Op
 
 void OpDispatchBuilder::AESImcOp(OpcodeArgs) {

External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Flags.cpp

@@ -5,9 +5,17 @@ desc: Handles x86/64 flag generation
 $end_info$
 */
 
+#include "Interface/Context/Context.h"
 #include "Interface/Core/OpcodeDispatcher.h"
 
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/IR/IR.h>
+
+#include <array>
+#include <cstdint>
 
 namespace FEXCore::IR {
 constexpr std::array<uint32_t, 17> FlagOffsets = {

External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp

@@ -5,9 +5,20 @@ desc: Handles x86/64 Vector instructions to IR
 $end_info$
 */
 
+#include "Interface/Context/Context.h"
 #include "Interface/Core/OpcodeDispatcher.h"
 
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <bit>
+#include <cstdint>
+#include <stddef.h>
 
 namespace FEXCore::IR {
 #define OpcodeArgs [[maybe_unused]] FEXCore::X86Tables::DecodedOp Op

External/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp

@@ -7,9 +7,18 @@ $end_info$
 
 #include "Interface/Core/OpcodeDispatcher.h"
 
+#include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/X86Enums.h>
+#include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/IR/IREmitter.h>
+
+#include <stddef.h>
+#include <stdint.h>
 
 namespace FEXCore::IR {
+class OrderedNode;
+
 #define OpcodeArgs [[maybe_unused]] FEXCore::X86Tables::DecodedOp Op
 
 OrderedNode *OpDispatchBuilder::GetX87Top() {

External/FEXCore/Source/Interface/Core/SignalDelegator.cpp

@@ -2,6 +2,7 @@
 #include <FEXCore/Utils/LogManager.h>
 
 #include <unistd.h>
+#include <signal.h>
 
 namespace FEXCore {
   struct ThreadState {

External/FEXCore/Source/Interface/Core/X86HelperGen.cpp

@@ -6,12 +6,15 @@ $end_info$
 */
 
 #include "Interface/Core/X86HelperGen.h"
+
+#include <FEXCore/Config/Config.h>
 #include <FEXCore/Utils/Allocator.h>
 
+#include <cstdint>
 #include <cstring>
-#include <stdlib.h>
 #include <vector>
 #include <sys/mman.h>
+#include <bits/mman-map-flags-generic.h>
 
 namespace FEXCore {
 constexpr size_t CODE_SIZE = 0x1000;

External/FEXCore/Source/Interface/Core/X86HelperGen.h

@@ -5,8 +5,8 @@ $end_info$
 */
 
 #pragma once
-#include <FEXCore/Config/Config.h>
 
+#include <stddef.h>
 #include <stdint.h>
 
 namespace FEXCore {

External/FEXCore/Source/Interface/Core/X86Tables.cpp

@@ -5,14 +5,8 @@ tags: frontend|x86-tables
 $end_info$
 */
 
-#include <FEXCore/Utils/LogManager.h>
-
 #include <FEXCore/Core/Context.h>
 #include <FEXCore/Debug/X86Tables.h>
-#include <array>
-#include <cstdint>
-#include <tuple>
-#include <vector>
 
 namespace FEXCore::X86Tables {
 

External/FEXCore/Source/Interface/Core/X86Tables/BaseTables.cpp

@@ -7,6 +7,9 @@ $end_info$
 #include "Interface/Core/X86Tables/X86Tables.h"
 
 #include <FEXCore/Core/Context.h>
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
 
 namespace FEXCore::X86Tables {
 using namespace InstFlags;

External/FEXCore/Source/Interface/Core/X86Tables/DDDTables.cpp

@@ -6,6 +6,10 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/EVEXTables.cpp

@@ -6,6 +6,10 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/H0F38Tables.cpp

@@ -4,9 +4,11 @@ tags: frontend|x86-tables
 $end_info$
 */
 
-#include <FEXCore/Core/Context.h>
-
 #include "Interface/Core/X86Tables/X86Tables.h"
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+#include <stdint.h>
 
 namespace FEXCore::X86Tables {
 using namespace InstFlags;

External/FEXCore/Source/Interface/Core/X86Tables/H0F3ATables.cpp

@@ -6,6 +6,12 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+#include <FEXCore/Core/Context.h>
+
+#include <iterator>
+#include <stdint.h>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/PrimaryGroupTables.cpp

@@ -6,6 +6,11 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Core/Context.h>
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/SecondaryGroupTables.cpp

@@ -6,6 +6,11 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+#include <stdint.h>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/SecondaryModRMTables.cpp

@@ -6,6 +6,10 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/SecondaryTables.cpp

@@ -4,7 +4,12 @@ tags: frontend|x86-tables
 $end_info$
 */
 
- #include "Interface/Core/X86Tables/X86Tables.h"
+#include "Interface/Core/X86Tables/X86Tables.h"
+
+#include <FEXCore/Core/Context.h>
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
 
 namespace FEXCore::X86Tables {
 using namespace InstFlags;

External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp

@@ -6,6 +6,9 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+#include <iterator>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/X87Tables.cpp

@@ -6,6 +6,9 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+#include <iterator>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/Core/X86Tables/XOPTables.cpp

@@ -6,6 +6,11 @@ $end_info$
 
 #include "Interface/Core/X86Tables/X86Tables.h"
 
+#include <FEXCore/Debug/X86Tables.h>
+
+#include <iterator>
+#include <stdint.h>
+
 namespace FEXCore::X86Tables {
 using namespace InstFlags;
 

External/FEXCore/Source/Interface/HLE/Thunks/Thunks.cpp

@@ -5,21 +5,23 @@ tags: glue|thunks
 $end_info$
 */
 
+#include <FEXCore/Config/Config.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/IR/IR.h>
 #include "Thunks.h"
 
-#include "stdio.h"
 #include <dlfcn.h>
 
-
-#include <string>
-#include <map>
-#include <array>
 #include <Interface/Context/Context.h>
-#include "Interface/Core/InternalThreadState.h"
 #include "FEXCore/Core/X86Enums.h"
-#include <mutex>
+#include <map>
+#include <memory>
 #include <shared_mutex>
+#include <stdint.h>
+#include <string>
+#include <utility>
 
 struct LoadlibArgs {
     const char *Name;

External/FEXCore/Source/Interface/HLE/Thunks/Thunks.h

@@ -5,12 +5,15 @@ $end_info$
 */
 
 #pragma once
-#include <FEXCore/IR/IR.h>
 
 namespace FEXCore::Core {
   struct InternalThreadState;
 }
 
+namespace FEXCore::IR {
+  struct SHA256Sum;
+}
+
 namespace FEXCore {
     typedef void ThunkedFunction(void* ArgsRv);
 
@@ -22,4 +25,4 @@ namespace FEXCore {
 
         static ThunkHandler* Create();
     };
-};
+};

External/FEXCore/Source/Interface/IR/IRDumper.cpp

@@ -7,9 +7,14 @@ $end_info$
 
 #include <FEXCore/IR/IR.h>
 #include <FEXCore/IR/IntrusiveIRList.h>
-#include <FEXCore/Utils/LogManager.h>
-#include "Interface/IR/Passes/RegisterAllocationPass.h"
+#include <FEXCore/IR/RegisterAllocationData.h>
 
+#include <algorithm>
+#include <array>
+#include <ostream>
+#include <stdint.h>
+#include <string>
+#include <string_view>
 #include  <iomanip>
 
 namespace FEXCore::IR {

External/FEXCore/Source/Interface/IR/IREmitter.cpp

@@ -5,7 +5,15 @@ tags: ir|emitter
 $end_info$
 */
 
+#include <FEXCore/IR/IR.h>
 #include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <stdint.h>
+#include <string.h>
+#include <vector>
 
 namespace FEXCore::IR {
 void IREmitter::ResetWorkingList() {

External/FEXCore/Source/Interface/IR/IRParser.cpp

@@ -5,16 +5,24 @@ tags: ir|parser
 $end_info$
 */
 
-#include <string>
-#include <vector>
-#include <istream>
-#include <unordered_map>
-
 #include <FEXCore/IR/IR.h>
 #include <FEXCore/IR/IntrusiveIRList.h>
 #include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/Utils/LogManager.h>
 
-
+#include <algorithm>
+#include <array>
+#include <cstdint>
+#include <errno.h>
+#include <memory>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string>
+#include <string_view>
+#include <utility>
+#include <vector>
+#include <istream>
+#include <unordered_map>
 
 namespace FEXCore::IR {
 namespace {

External/FEXCore/Source/Interface/IR/PassManager.cpp

@@ -13,6 +13,7 @@ $end_info$
 #include <FEXCore/Config/Config.h>
 
 namespace FEXCore::IR {
+class IREmitter;
 
 void PassManager::AddDefaultPasses(bool InlineConstants, bool StaticRegisterAllocation) {
   FEX_CONFIG_OPT(DisablePasses, O0);

External/FEXCore/Source/Interface/IR/PassManager.h

@@ -7,11 +7,10 @@ $end_info$
 #pragma once
 
 #include <FEXCore/Config/Config.h>
-#include <FEXCore/IR/IntrusiveIRList.h>
-#include <FEXCore/IR/IREmitter.h>
 
 #include <functional>
 #include <memory>
+#include <utility>
 #include <vector>
 
 namespace FEXCore::HLE {
@@ -19,8 +18,9 @@ class SyscallHandler;
 }
 
 namespace FEXCore::IR {
-class OpDispatchBuilder;
-class SyscallOptimization;
+class PassManager;
+class IREmitter;
+class RegisterAllocationPass;
 
 using ShouldExitHandler = std::function<void(void)>;
 

External/FEXCore/Source/Interface/IR/Passes/ConstProp.cpp

@@ -15,7 +15,20 @@ $end_info$
 #endif
 
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
+
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <bit>
+#include <cstdint>
+#include <map>
+#include <memory>
+#include <string.h>
+#include <tuple>
+#include <unordered_map>
+#include <utility>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/DeadCodeElimination.cpp

@@ -5,11 +5,12 @@ $end_info$
 */
 
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
 
 #include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
 
-#include <array>
+#include <memory>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp

@@ -7,9 +7,21 @@ $end_info$
 
 #include "Interface/IR/Passes.h"
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
 #include <FEXCore/Core/CoreState.h>
 
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <array>
+#include <memory>
+#include <stddef.h>
+#include <stdint.h>
+#include <unordered_map>
+#include <utility>
+#include <vector>
+
 namespace {
   struct ContextMemberClassification {
     size_t Offset;

External/FEXCore/Source/Interface/IR/Passes/DeadStoreElimination.cpp

@@ -6,7 +6,17 @@ $end_info$
 */
 
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
+
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <memory>
+#include <stddef.h>
+#include <stdint.h>
+#include <unordered_map>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/IRCompaction.cpp

@@ -9,7 +9,16 @@ $end_info$
 #include "Interface/IR/PassManager.h"
 #include "Interface/Core/OpcodeDispatcher.h"
 
-#include <map>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <algorithm>
+#include <memory>
+#include <stdint.h>
+#include <string.h>
+#include <vector>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/IRValidation.cpp

@@ -7,11 +7,22 @@ $end_info$
 
 #include "Interface/IR/PassManager.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
-#include "Interface/Context/Context.h"
-#include "Interface/Core/OpcodeDispatcher.h"
 #include "Common/BitSet.h"
 
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/IR/RegisterAllocationData.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <cstdint>
+#include <memory>
+#include <stddef.h>
+#include <string>
 #include <sstream>
+#include <unordered_map>
+#include <utility>
+#include <vector>
 
 namespace {
   struct BlockInfo {

External/FEXCore/Source/Interface/IR/Passes/LongDivideRemovalPass.cpp

@@ -6,7 +6,12 @@ $end_info$
 */
 
 #include "Interface/IR/PassManager.h"
-#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+
+#include <memory>
+#include <stdint.h>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/PhiValidation.cpp

@@ -5,10 +5,16 @@ desc: Sanity checking pass
 $end_info$
 */
 
-#include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
 
+#include "Interface/IR/PassManager.h"
+
+#include <memory>
 #include <sstream>
+#include <string>
 
 namespace FEXCore::IR::Validation {
 

External/FEXCore/Source/Interface/IR/Passes/RedundantFlagCalculationElimination.cpp

@@ -5,8 +5,13 @@ desc: This is not used right now, possibly broken
 $end_info$
 */
 
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
+
+#include <array>
+#include <memory>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp

@@ -4,15 +4,27 @@ tags: ir|opts
 $end_info$
 */
 
-#include "Common/BitSet.h"
+#include "Common/MathUtils.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 #include "Interface/IR/Passes.h"
-#include "Interface/Core/OpcodeDispatcher.h"
-#include <FEXCore/Utils/Allocator.h>
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/Core/SignalDelegator.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/IR/RegisterAllocationData.h>
+#include <FEXCore/Utils/LogManager.h>
 
-#include <iterator>
+#include <algorithm>
+#include <cstdint>
+#include <set>
+#include <stddef.h>
+#include <string.h>
+#include <strings.h>
+#include <unordered_map>
 #include <unordered_set>
-#include <sys/mman.h>
+#include <utility>
+#include <vector>
 
 #define SRA_DEBUG(...) // printf(__VA_ARGS__)
 

External/FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.h

@@ -6,11 +6,14 @@ $end_info$
 
 #pragma once
 #include "Interface/IR/PassManager.h"
-#include <FEXCore/IR/RegisterAllocationData.h>
-#include <vector>
+
+#include <memory>
+#include <stdint.h>
 
 namespace FEXCore::IR {
-class IRListView;
+class RegisterAllocationData;
+struct RegisterAllocationDataDeleter;
+struct RegisterClassType;
 
 class RegisterAllocationPass : public FEXCore::IR::Pass {
   public:

External/FEXCore/Source/Interface/IR/Passes/StaticRegisterAllocationPass.cpp

@@ -6,7 +6,15 @@ $end_info$
 */
 
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
+#include <FEXCore/Core/CoreState.h>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <memory>
+#include <stddef.h>
+#include <stdint.h>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/SyscallOptimization.cpp

@@ -5,12 +5,15 @@ desc: Removes unused arguments if known syscall number
 $end_info$
 */
 
-#include "Interface/Context/Context.h"
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
 
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
 #include <FEXCore/HLE/SyscallHandler.h>
-#include <FEXCore/Utils/LogManager.h>
+
+#include <memory>
+#include <stdint.h>
 
 namespace FEXCore::IR {
 

External/FEXCore/Source/Interface/IR/Passes/ValueDominanceValidation.cpp

@@ -6,12 +6,21 @@ $end_info$
 */
 
 #include "Interface/IR/PassManager.h"
-#include "Interface/Core/OpcodeDispatcher.h"
 
-#include <map>
-#include <list>
+#include <FEXCore/IR/IR.h>
+#include <FEXCore/IR/IREmitter.h>
+#include <FEXCore/IR/IntrusiveIRList.h>
+#include <FEXCore/Utils/LogManager.h>
+
+#include <functional>
+#include <memory>
+#include <set>
+#include <stdint.h>
+#include <string>
 #include <sstream>
 #include <unordered_map>
+#include <utility>
+#include <vector>
 
 namespace {
   struct BlockInfo {

External/FEXCore/Source/Utils/Allocator.cpp

@@ -4,8 +4,10 @@
 #ifdef ENABLE_JEMALLOC
 #include <jemalloc/jemalloc.h>
 #endif
+#include <errno.h>
 #include <memory>
-#include <malloc.h>
+#include <stddef.h>
+#include <stdint.h>
 
 extern "C" {
   typedef void* (*mmap_hook_type)(

External/FEXCore/Source/Utils/Allocator/64BitAllocator.cpp

@@ -3,23 +3,22 @@
 #include "Utils/Allocator/IntrusiveArenaAllocator.h"
 #include <FEXCore/Utils/LogManager.h>
 
+#include <algorithm>
 #include <array>
-#include <bit>
-#include <bitset>
 #include <cassert>
-#include <cmath>
 #include <cstdint>
-#include <cstring>
+#include <errno.h>
 #include <list>
-#include <malloc.h>
+#include <memory>
 #include <mutex>
-#include <stdio.h>
-#include <set>
+#include <new>
+#include <stddef.h>
+#include <sstream>
 #include <sys/mman.h>
+#include <bits/mman-map-flags-generic.h>
 #include <sys/utsname.h>
-#include <sys/resource.h>
-#include <syscall.h>
-#include <vector>
+#include <type_traits>
+#include <utility>
 
 static constexpr uint64_t PAGE_SHIFT = 12;
 static constexpr uint64_t PAGE_MASK = (1 << PAGE_SHIFT) - 1;

External/FEXCore/Source/Utils/LogManager.cpp

@@ -4,9 +4,14 @@ tags: glue|log-manager
 $end_info$
 */
 
-
+#include <FEXCore/Utils/CompilerDefs.h>
 #include <FEXCore/Utils/LogManager.h>
-#include <sstream>
+
+#include <alloca.h>
+#include <fmt/format.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <string>
 #include <vector>
 
 namespace LogMan {

External/FEXCore/Source/Utils/Telemetry.cpp

@@ -1,6 +1,3 @@
-
-#include "Common/Paths.h"
-
 #include <FEXCore/Config/Config.h>
 #include <FEXCore/Utils/LogManager.h>
 #include <FEXCore/Utils/Telemetry.h>
@@ -8,6 +5,10 @@
 #include <array>
 #include <filesystem>
 #include <fstream>
+#include <stddef.h>
+#include <string>
+#include <string_view>
+#include <system_error>
 
 namespace FEXCore::Telemetry {
 #ifndef FEX_DISABLE_TELEMETRY

External/FEXCore/Source/Utils/Threads.cpp

@@ -2,10 +2,15 @@
 #include <FEXCore/Utils/LogManager.h>
 #include <FEXCore/Utils/Threads.h>
 
+#include <alloca.h>
 #include <cstring>
+#include <functional>
+#include <memory>
 #include <mutex>
 #include <pthread.h>
+#include <stdint.h>
 #include <sys/mman.h>
+#include <bits/mman-map-flags-generic.h>
 #include <deque>
 
 namespace FEXCore::Threads {

External/FEXCore/include/FEXCore/Core/SignalDelegator.h

@@ -2,9 +2,13 @@
 
 #include <FEXCore/Utils/CompilerDefs.h>
 
+#include <array>
+#include <bits/types/siginfo_t.h>
+#include <bits/types/stack_t.h>
 #include <cstdint>
 #include <functional>
-#include <signal.h>
+#include <utility>
+#include <stddef.h>
 
 namespace FEXCore {
 namespace Core {

External/FEXCore/include/FEXCore/IR/IREmitter.h

@@ -5,6 +5,10 @@
 #include <FEXCore/Utils/LogManager.h>
 
 #include <algorithm>
+#include <new>
+#include <stdint.h>
+#include <string.h>
+#include <vector>
 
 namespace FEXCore::IR {
 class Pass;

External/FEXCore/include/FEXCore/Utils/LogManager.h

@@ -2,9 +2,7 @@
 
 #include <FEXCore/Utils/CompilerDefs.h>
 
-#include <functional>
 #include <cstdarg>
-#include <sstream>
 
 #include <fmt/format.h>
 

Source/Common/ArgumentLoader.cpp

@@ -1,9 +1,10 @@
 #include "Common/ArgumentLoader.h"
-#include "Common/Config.h"
 
 #include "OptionParser.h"
 #include "git_version.h"
 
+#include <stdint.h>
+
 namespace FEX::Handler {
   std::string CoreHandler(std::string &Value) {
     if (Value == "irint")

Source/Common/Config.cpp

@@ -1,18 +1,13 @@
 #include "Common/Config.h"
 
-#include <FEXCore/Utils/LogManager.h>
+#include <FEXCore/Config/Config.h>
 
-#include <array>
-#include <cassert>
 #include <cstring>
-#include <filesystem>
 #include <fstream>
 #include <map>
-#include <memory>
 #include <list>
-#include <string_view>
 #include <unordered_map>
-#include <vector>
+#include <utility>
 #include <json-maker.h>
 
 namespace FEX::Config {

Source/Common/Config.h

@@ -1,10 +1,7 @@
 #pragma once
 #include <FEXCore/Config/Config.h>
 
-#include <cassert>
-#include <list>
 #include <string>
-#include <string_view>
 
 /**
  * @brief This is a singleton for storing global configuration state

Source/Common/EnvironmentLoader.cpp

@@ -1,9 +1,5 @@
-#include <functional>
-#include <filesystem>
+#include <string>
 #include <string_view>
-#include <unordered_map>
-#include "Common/Config.h"
-#include <FEXCore/Utils/LogManager.h>
 
 namespace FEX::EnvLoader {
 

Source/Common/FileFormatCheck.cpp

@@ -1,4 +1,5 @@
 #include <fstream>
+#include <stdint.h>
 #include <string>
 
 namespace FEX::FormatCheck {

Source/Common/RootFSSetup.cpp

@@ -1,18 +1,19 @@
 #include "ConfigDefines.h"
-#include "Common/Config.h"
 #include "Common/FileFormatCheck.h"
 
 #include <FEXCore/Config/Config.h>
+#include <FEXCore/Utils/LogManager.h>
 
 #include <filesystem>
 #include <fstream>
 
 #include <poll.h>
 #include <unistd.h>
-#include <sys/eventfd.h>
-#include <sys/prctl.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string>
+#include <system_error>
 #include <sys/stat.h>
-#include <sys/wait.h>
 #include <sys/utsname.h>
 
 namespace FEX::RootFS {

Source/CommonCore/HostFactory.cpp

@@ -1,23 +1,15 @@
-#include <FEXCore/Config/Config.h>
-#include <FEXCore/Core/CodeLoader.h>
 #include <FEXCore/Core/Context.h>
 #include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/CPUBackend.h>
 #include <FEXCore/Core/X86Enums.h>
-#include <FEXCore/HLE/SyscallHandler.h>
 #include <FEXCore/Debug/InternalThreadState.h>
 
-#include <ucontext.h>
-#include <cassert>
-#include <iostream>
-#include <sys/mman.h>
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/wait.h>
-#include <sys/ptrace.h>
-#include <errno.h>
-#include <sys/user.h>
+#include <memory>
+#include <stddef.h>
 #include <stdint.h>
+#include <string.h>
+#include <string>
+#include <ucontext.h>
 
 #include <signal.h>
 #include <xbyak/xbyak.h>

Source/Linux/Utils/ELFContainer.cpp

@@ -8,11 +8,14 @@ $end_info$
 #include "Common/MathUtils.h"
 #include "Linux/Utils/ELFContainer.h"
 #include <FEXCore/Utils/LogManager.h>
+
+#include <algorithm>
 #include <cstring>
 #include <elf.h>
 #include <filesystem>
 #include <fstream>
-#include <stdint.h>
+#include <memory>
+#include <system_error>
 #include <vector>
 
 namespace ELFLoader {

Source/Linux/Utils/ELFContainer.h

@@ -1,11 +1,14 @@
 #pragma once
 
+#include <cstdint>
 #include <elf.h>
 #include <functional>
 #include <map>
+#include <stddef.h>
 #include <string>
 #include <tuple>
 #include <unordered_map>
+#include <utility>
 #include <vector>
 
 // Add macros which are missing in some versions of <elf.h>