OpcodeDispatcher: Convert packed vector shifts to Bind handler

This commit is contained in:
Ryan Houdek committed 2024-08-22 15:07:09 -07:00
1 parent 57eacab654
commit 23a076c313
3 files changed
+72 -140

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@@ -5186,9 +5186,9 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(1, 0b01, 0xD0), 1, &OpDispatchBuilder::VADDSUBPOp<8>},
{OPD(1, 0b11, 0xD0), 1, &OpDispatchBuilder::VADDSUBPOp<4>},
{OPD(1, 0b01, 0xD1), 1, &OpDispatchBuilder::VPSRLDOp<2>},
{OPD(1, 0b01, 0xD2), 1, &OpDispatchBuilder::VPSRLDOp<4>},
{OPD(1, 0b01, 0xD3), 1, &OpDispatchBuilder::VPSRLDOp<8>},
{OPD(1, 0b01, 0xD1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRLDOp, 2>},
{OPD(1, 0b01, 0xD2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRLDOp, 4>},
{OPD(1, 0b01, 0xD3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRLDOp, 8>},
{OPD(1, 0b01, 0xD4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVXVectorALUOp, IR::OP_VADD, 8>},
{OPD(1, 0b01, 0xD5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVXVectorALUOp, IR::OP_VMUL, 2>},
{OPD(1, 0b01, 0xD6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVQOp, OpDispatchBuilder::VectorOpType::AVX>},
@@ -5204,8 +5204,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(1, 0b01, 0xDF), 1, &OpDispatchBuilder::VANDNOp},
{OPD(1, 0b01, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVXVectorALUOp, IR::OP_VURAVG, 1>},
{OPD(1, 0b01, 0xE1), 1, &OpDispatchBuilder::VPSRAOp<2>},
{OPD(1, 0b01, 0xE2), 1, &OpDispatchBuilder::VPSRAOp<4>},
{OPD(1, 0b01, 0xE1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRAOp, 2>},
{OPD(1, 0b01, 0xE2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRAOp, 4>},
{OPD(1, 0b01, 0xE3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVXVectorALUOp, IR::OP_VURAVG, 2>},
{OPD(1, 0b01, 0xE4), 1, &OpDispatchBuilder::VPMULHWOp<false>},
{OPD(1, 0b01, 0xE5), 1, &OpDispatchBuilder::VPMULHWOp<true>},
@@ -5226,9 +5226,9 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(1, 0b01, 0xEF), 1, &OpDispatchBuilder::AVXVectorXOROp},
{OPD(1, 0b11, 0xF0), 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
{OPD(1, 0b01, 0xF1), 1, &OpDispatchBuilder::VPSLLOp<2>},
{OPD(1, 0b01, 0xF2), 1, &OpDispatchBuilder::VPSLLOp<4>},
{OPD(1, 0b01, 0xF3), 1, &OpDispatchBuilder::VPSLLOp<8>},
{OPD(1, 0b01, 0xF1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSLLOp, 2>},
{OPD(1, 0b01, 0xF2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSLLOp, 4>},
{OPD(1, 0b01, 0xF3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSLLOp, 8>},
{OPD(1, 0b01, 0xF4), 1, &OpDispatchBuilder::VPMULLOp<4, false>},
{OPD(1, 0b01, 0xF5), 1, &OpDispatchBuilder::VPMADDWDOp},
{OPD(1, 0b01, 0xF6), 1, &OpDispatchBuilder::VPSADBWOp},
@@ -5419,17 +5419,17 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
#define OPD(group, pp, opcode) (((group - X86Tables::TYPE_VEX_GROUP_12) << 4) | (pp << 3) | (opcode))
static constexpr std::tuple<uint8_t, uint8_t, X86Tables::OpDispatchPtr> VEXTableGroupOps[] {
{OPD(X86Tables::TYPE_VEX_GROUP_12, 1, 0b010), 1, &OpDispatchBuilder::VPSRLIOp<2>},
{OPD(X86Tables::TYPE_VEX_GROUP_12, 1, 0b110), 1, &OpDispatchBuilder::VPSLLIOp<2>},
{OPD(X86Tables::TYPE_VEX_GROUP_12, 1, 0b100), 1, &OpDispatchBuilder::VPSRAIOp<2>},
{OPD(X86Tables::TYPE_VEX_GROUP_12, 1, 0b010), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRLIOp, 2>},
{OPD(X86Tables::TYPE_VEX_GROUP_12, 1, 0b110), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSLLIOp, 2>},
{OPD(X86Tables::TYPE_VEX_GROUP_12, 1, 0b100), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRAIOp, 2>},
{OPD(X86Tables::TYPE_VEX_GROUP_13, 1, 0b010), 1, &OpDispatchBuilder::VPSRLIOp<4>},
{OPD(X86Tables::TYPE_VEX_GROUP_13, 1, 0b110), 1, &OpDispatchBuilder::VPSLLIOp<4>},
{OPD(X86Tables::TYPE_VEX_GROUP_13, 1, 0b100), 1, &OpDispatchBuilder::VPSRAIOp<4>},
{OPD(X86Tables::TYPE_VEX_GROUP_13, 1, 0b010), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRLIOp, 4>},
{OPD(X86Tables::TYPE_VEX_GROUP_13, 1, 0b110), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSLLIOp, 4>},
{OPD(X86Tables::TYPE_VEX_GROUP_13, 1, 0b100), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRAIOp, 4>},
{OPD(X86Tables::TYPE_VEX_GROUP_14, 1, 0b010), 1, &OpDispatchBuilder::VPSRLIOp<8>},
{OPD(X86Tables::TYPE_VEX_GROUP_14, 1, 0b010), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSRLIOp, 8>},
{OPD(X86Tables::TYPE_VEX_GROUP_14, 1, 0b011), 1, &OpDispatchBuilder::VPSRLDQOp},
{OPD(X86Tables::TYPE_VEX_GROUP_14, 1, 0b110), 1, &OpDispatchBuilder::VPSLLIOp<8>},
{OPD(X86Tables::TYPE_VEX_GROUP_14, 1, 0b110), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VPSLLIOp, 8>},
{OPD(X86Tables::TYPE_VEX_GROUP_14, 1, 0b111), 1, &OpDispatchBuilder::VPSLLDQOp},
{OPD(X86Tables::TYPE_VEX_GROUP_15, 0, 0b010), 1, &OpDispatchBuilder::LDMXCSR},
@@ -5684,9 +5684,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{0xC2, 1, &OpDispatchBuilder::VFCMPOp<4>},
{0xC6, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHUFOp, 4>},
{0xD1, 1, &OpDispatchBuilder::PSRLDOp<2>},
{0xD2, 1, &OpDispatchBuilder::PSRLDOp<4>},
{0xD3, 1, &OpDispatchBuilder::PSRLDOp<8>},
{0xD1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLDOp, 2>},
{0xD2, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLDOp, 4>},
{0xD3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLDOp, 8>},
{0xD4, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VADD, 8>},
{0xD5, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VMUL, 2>},
{0xD7, 1, &OpDispatchBuilder::MOVMSKOpOne}, // PMOVMSKB
@@ -5699,8 +5699,8 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{0xDE, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VUMAX, 1>},
{0xDF, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUROp, IR::OP_VANDN, 8>},
{0xE0, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VURAVG, 1>},
{0xE1, 1, &OpDispatchBuilder::PSRAOp<2>},
{0xE2, 1, &OpDispatchBuilder::PSRAOp<4>},
{0xE1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAOp, 2>},
{0xE2, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAOp, 4>},
{0xE3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VURAVG, 2>},
{0xE4, 1, &OpDispatchBuilder::PMULHW<false>},
{0xE5, 1, &OpDispatchBuilder::PMULHW<true>},
@@ -5714,9 +5714,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{0xEE, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VSMAX, 2>},
{0xEF, 1, &OpDispatchBuilder::VectorXOROp},
{0xF1, 1, &OpDispatchBuilder::PSLL<2>},
{0xF2, 1, &OpDispatchBuilder::PSLL<4>},
{0xF3, 1, &OpDispatchBuilder::PSLL<8>},
{0xF1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLL, 2>},
{0xF2, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLL, 4>},
{0xF3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLL, 8>},
{0xF4, 1, &OpDispatchBuilder::PMULLOp<4, false>},
{0xF5, 1, &OpDispatchBuilder::PMADDWD},
{0xF6, 1, &OpDispatchBuilder::PSADBW},
@@ -5983,9 +5983,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{0xC6, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHUFOp, 8>},
{0xD0, 1, &OpDispatchBuilder::ADDSUBPOp<8>},
{0xD1, 1, &OpDispatchBuilder::PSRLDOp<2>},
{0xD2, 1, &OpDispatchBuilder::PSRLDOp<4>},
{0xD3, 1, &OpDispatchBuilder::PSRLDOp<8>},
{0xD1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLDOp, 2>},
{0xD2, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLDOp, 4>},
{0xD3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLDOp, 8>},
{0xD4, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VADD, 8>},
{0xD5, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VMUL, 2>},
{0xD6, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVQOp, OpDispatchBuilder::VectorOpType::SSE>},
@@ -5999,8 +5999,8 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{0xDE, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VUMAX, 1>},
{0xDF, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUROp, IR::OP_VANDN, 8>},
{0xE0, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VURAVG, 1>},
{0xE1, 1, &OpDispatchBuilder::PSRAOp<2>},
{0xE2, 1, &OpDispatchBuilder::PSRAOp<4>},
{0xE1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAOp, 2>},
{0xE2, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAOp, 4>},
{0xE3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VURAVG, 2>},
{0xE4, 1, &OpDispatchBuilder::PMULHW<false>},
{0xE5, 1, &OpDispatchBuilder::PMULHW<true>},
@@ -6015,9 +6015,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{0xEE, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VectorALUOp, IR::OP_VSMAX, 2>},
{0xEF, 1, &OpDispatchBuilder::VectorXOROp},
{0xF1, 1, &OpDispatchBuilder::PSLL<2>},
{0xF2, 1, &OpDispatchBuilder::PSLL<4>},
{0xF3, 1, &OpDispatchBuilder::PSLL<8>},
{0xF1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLL, 2>},
{0xF2, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLL, 4>},
{0xF3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLL, 8>},
{0xF4, 1, &OpDispatchBuilder::PMULLOp<4, false>},
{0xF5, 1, &OpDispatchBuilder::PMADDWD},
{0xF6, 1, &OpDispatchBuilder::PSADBW},
@@ -6094,30 +6094,30 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
{OPD(FEXCore::X86Tables::TYPE_GROUP_9, PF_F3, 7), 1, &OpDispatchBuilder::RDPIDOp},
// GROUP 12
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_NONE, 2), 1, &OpDispatchBuilder::PSRLI<2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_NONE, 4), 1, &OpDispatchBuilder::PSRAIOp<2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_NONE, 6), 1, &OpDispatchBuilder::PSLLI<2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_NONE, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLI, 2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_NONE, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAIOp, 2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_NONE, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLLI, 2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_66, 2), 1, &OpDispatchBuilder::PSRLI<2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_66, 4), 1, &OpDispatchBuilder::PSRAIOp<2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_66, 6), 1, &OpDispatchBuilder::PSLLI<2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_66, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLI, 2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_66, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAIOp, 2>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_12, PF_66, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLLI, 2>},
// GROUP 13
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_NONE, 2), 1, &OpDispatchBuilder::PSRLI<4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_NONE, 4), 1, &OpDispatchBuilder::PSRAIOp<4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_NONE, 6), 1, &OpDispatchBuilder::PSLLI<4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_NONE, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLI, 4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_NONE, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAIOp, 4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_NONE, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLLI, 4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_66, 2), 1, &OpDispatchBuilder::PSRLI<4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_66, 4), 1, &OpDispatchBuilder::PSRAIOp<4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_66, 6), 1, &OpDispatchBuilder::PSLLI<4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_66, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLI, 4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_66, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRAIOp, 4>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_13, PF_66, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLLI, 4>},
// GROUP 14
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_NONE, 2), 1, &OpDispatchBuilder::PSRLI<8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_NONE, 6), 1, &OpDispatchBuilder::PSLLI<8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_NONE, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLI, 8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_NONE, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLLI, 8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_66, 2), 1, &OpDispatchBuilder::PSRLI<8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_66, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSRLI, 8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_66, 3), 1, &OpDispatchBuilder::PSRLDQ},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_66, 6), 1, &OpDispatchBuilder::PSLLI<8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_66, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PSLLI, 8>},
{OPD(FEXCore::X86Tables::TYPE_GROUP_14, PF_66, 7), 1, &OpDispatchBuilder::PSLLDQ},
// GROUP 15
@@ -469,20 +469,14 @@ public:
void PSHUFWOp(OpcodeArgs, bool Low);
void PSHUFW8ByteOp(OpcodeArgs);
void PSHUFDOp(OpcodeArgs);
template<size_t ElementSize>
void PSRLDOp(OpcodeArgs);
template<size_t ElementSize>
void PSRLI(OpcodeArgs);
template<size_t ElementSize>
void PSLLI(OpcodeArgs);
template<size_t ElementSize>
void PSLL(OpcodeArgs);
template<size_t ElementSize>
void PSRAOp(OpcodeArgs);
void PSRLDOp(OpcodeArgs, size_t ElementSize);
void PSRLI(OpcodeArgs, size_t ElementSize);
void PSLLI(OpcodeArgs, size_t ElementSize);
void PSLL(OpcodeArgs, size_t ElementSize);
void PSRAOp(OpcodeArgs, size_t ElementSize);
void PSRLDQ(OpcodeArgs);
void PSLLDQ(OpcodeArgs);
template<size_t ElementSize>
void PSRAIOp(OpcodeArgs);
void PSRAIOp(OpcodeArgs, size_t ElementSize);
void MOVDDUPOp(OpcodeArgs);
template<size_t DstElementSize>
void CVTGPR_To_FPR(OpcodeArgs);
@@ -688,32 +682,26 @@ public:
void VPSHUFWOp(OpcodeArgs, size_t ElementSize, bool Low);
template<size_t ElementSize>
void VPSLLOp(OpcodeArgs);
void VPSLLOp(OpcodeArgs, size_t ElementSize);
void VPSLLDQOp(OpcodeArgs);
template<size_t ElementSize>
void VPSLLIOp(OpcodeArgs);
void VPSLLIOp(OpcodeArgs, size_t ElementSize);
void VPSLLVOp(OpcodeArgs);
template<size_t ElementSize>
void VPSRAOp(OpcodeArgs);
void VPSRAOp(OpcodeArgs, size_t ElementSize);
template<size_t ElementSize>
void VPSRAIOp(OpcodeArgs);
void VPSRAIOp(OpcodeArgs, size_t ElementSize);
void VPSRAVDOp(OpcodeArgs);
void VPSRLVOp(OpcodeArgs);
template<size_t ElementSize>
void VPSRLDOp(OpcodeArgs);
void VPSRLDOp(OpcodeArgs, size_t ElementSize);
void VPSRLDQOp(OpcodeArgs);
void VPUNPCKHOp(OpcodeArgs, size_t ElementSize);
void VPUNPCKLOp(OpcodeArgs, size_t ElementSize);
template<size_t ElementSize>
void VPSRLIOp(OpcodeArgs);
void VPSRLIOp(OpcodeArgs, size_t ElementSize);
void VSHUFOp(OpcodeArgs, size_t ElementSize);
@@ -1706,8 +1706,7 @@ Ref OpDispatchBuilder::PSRLDOpImpl(OpcodeArgs, size_t ElementSize, Ref Src, Ref
return _VUShrSWide(Size, ElementSize, Src, ShiftVec);
}
template<size_t ElementSize>
void OpDispatchBuilder::PSRLDOp(OpcodeArgs) {
void OpDispatchBuilder::PSRLDOp(OpcodeArgs, size_t ElementSize) {
Ref Dest = LoadSource(FPRClass, Op, Op->Dest, Op->Flags);
Ref Src = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags);
Ref Result = PSRLDOpImpl(Op, ElementSize, Dest, Src);
@@ -1715,12 +1714,7 @@ void OpDispatchBuilder::PSRLDOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::PSRLDOp<2>(OpcodeArgs);
template void OpDispatchBuilder::PSRLDOp<4>(OpcodeArgs);
template void OpDispatchBuilder::PSRLDOp<8>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::VPSRLDOp(OpcodeArgs) {
void OpDispatchBuilder::VPSRLDOp(OpcodeArgs, size_t ElementSize) {
const auto DstSize = GetDstSize(Op);
const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE;
@@ -1734,12 +1728,7 @@ void OpDispatchBuilder::VPSRLDOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::VPSRLDOp<2>(OpcodeArgs);
template void OpDispatchBuilder::VPSRLDOp<4>(OpcodeArgs);
template void OpDispatchBuilder::VPSRLDOp<8>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::PSRLI(OpcodeArgs) {
void OpDispatchBuilder::PSRLI(OpcodeArgs, size_t ElementSize) {
const uint64_t ShiftConstant = Op->Src[1].Literal();
if (ShiftConstant == 0) [[unlikely]] {
// Nothing to do, value is already in Dest.
@@ -1753,12 +1742,7 @@ void OpDispatchBuilder::PSRLI(OpcodeArgs) {
StoreResult(FPRClass, Op, Shift, -1);
}
template void OpDispatchBuilder::PSRLI<2>(OpcodeArgs);
template void OpDispatchBuilder::PSRLI<4>(OpcodeArgs);
template void OpDispatchBuilder::PSRLI<8>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::VPSRLIOp(OpcodeArgs) {
void OpDispatchBuilder::VPSRLIOp(OpcodeArgs, size_t ElementSize) {
const auto Size = GetSrcSize(Op);
const auto Is128Bit = Size == Core::CPUState::XMM_SSE_REG_SIZE;
const uint64_t ShiftConstant = Op->Src[1].Literal();
@@ -1777,10 +1761,6 @@ void OpDispatchBuilder::VPSRLIOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::VPSRLIOp<2>(OpcodeArgs);
template void OpDispatchBuilder::VPSRLIOp<4>(OpcodeArgs);
template void OpDispatchBuilder::VPSRLIOp<8>(OpcodeArgs);
Ref OpDispatchBuilder::PSLLIImpl(OpcodeArgs, size_t ElementSize, Ref Src, uint64_t Shift) {
if (Shift == 0) [[unlikely]] {
// If zero-shift then just return the source.
@@ -1790,8 +1770,7 @@ Ref OpDispatchBuilder::PSLLIImpl(OpcodeArgs, size_t ElementSize, Ref Src, uint64
return _VShlI(Size, ElementSize, Src, Shift);
}
template<size_t ElementSize>
void OpDispatchBuilder::PSLLI(OpcodeArgs) {
void OpDispatchBuilder::PSLLI(OpcodeArgs, size_t ElementSize) {
const uint64_t ShiftConstant = Op->Src[1].Literal();
if (ShiftConstant == 0) [[unlikely]] {
// Nothing to do, value is already in Dest.
@@ -1804,12 +1783,7 @@ void OpDispatchBuilder::PSLLI(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::PSLLI<2>(OpcodeArgs);
template void OpDispatchBuilder::PSLLI<4>(OpcodeArgs);
template void OpDispatchBuilder::PSLLI<8>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::VPSLLIOp(OpcodeArgs) {
void OpDispatchBuilder::VPSLLIOp(OpcodeArgs, size_t ElementSize) {
const uint64_t ShiftConstant = Op->Src[1].Literal();
const auto DstSize = GetDstSize(Op);
const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE;
@@ -1823,10 +1797,6 @@ void OpDispatchBuilder::VPSLLIOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::VPSLLIOp<2>(OpcodeArgs);
template void OpDispatchBuilder::VPSLLIOp<4>(OpcodeArgs);
template void OpDispatchBuilder::VPSLLIOp<8>(OpcodeArgs);
Ref OpDispatchBuilder::PSLLImpl(OpcodeArgs, size_t ElementSize, Ref Src, Ref ShiftVec) {
const auto Size = GetDstSize(Op);
@@ -1834,8 +1804,7 @@ Ref OpDispatchBuilder::PSLLImpl(OpcodeArgs, size_t ElementSize, Ref Src, Ref Shi
return _VUShlSWide(Size, ElementSize, Src, ShiftVec);
}
template<size_t ElementSize>
void OpDispatchBuilder::PSLL(OpcodeArgs) {
void OpDispatchBuilder::PSLL(OpcodeArgs, size_t ElementSize) {
Ref Dest = LoadSource(FPRClass, Op, Op->Dest, Op->Flags);
Ref Src = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags);
Ref Result = PSLLImpl(Op, ElementSize, Dest, Src);
@@ -1843,12 +1812,7 @@ void OpDispatchBuilder::PSLL(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::PSLL<2>(OpcodeArgs);
template void OpDispatchBuilder::PSLL<4>(OpcodeArgs);
template void OpDispatchBuilder::PSLL<8>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::VPSLLOp(OpcodeArgs) {
void OpDispatchBuilder::VPSLLOp(OpcodeArgs, size_t ElementSize) {
const auto DstSize = GetDstSize(Op);
const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE;
@@ -1862,10 +1826,6 @@ void OpDispatchBuilder::VPSLLOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::VPSLLOp<2>(OpcodeArgs);
template void OpDispatchBuilder::VPSLLOp<4>(OpcodeArgs);
template void OpDispatchBuilder::VPSLLOp<8>(OpcodeArgs);
Ref OpDispatchBuilder::PSRAOpImpl(OpcodeArgs, size_t ElementSize, Ref Src, Ref ShiftVec) {
const auto Size = GetDstSize(Op);
@@ -1873,8 +1833,7 @@ Ref OpDispatchBuilder::PSRAOpImpl(OpcodeArgs, size_t ElementSize, Ref Src, Ref S
return _VSShrSWide(Size, ElementSize, Src, ShiftVec);
}
template<size_t ElementSize>
void OpDispatchBuilder::PSRAOp(OpcodeArgs) {
void OpDispatchBuilder::PSRAOp(OpcodeArgs, size_t ElementSize) {
Ref Dest = LoadSource(FPRClass, Op, Op->Dest, Op->Flags);
Ref Src = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags);
Ref Result = PSRAOpImpl(Op, ElementSize, Dest, Src);
@@ -1882,11 +1841,7 @@ void OpDispatchBuilder::PSRAOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::PSRAOp<2>(OpcodeArgs);
template void OpDispatchBuilder::PSRAOp<4>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::VPSRAOp(OpcodeArgs) {
void OpDispatchBuilder::VPSRAOp(OpcodeArgs, size_t ElementSize) {
const auto DstSize = GetDstSize(Op);
const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE;
@@ -1900,9 +1855,6 @@ void OpDispatchBuilder::VPSRAOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::VPSRAOp<2>(OpcodeArgs);
template void OpDispatchBuilder::VPSRAOp<4>(OpcodeArgs);
void OpDispatchBuilder::PSRLDQ(OpcodeArgs) {
const uint64_t Shift = Op->Src[1].Literal();
if (Shift == 0) [[unlikely]] {
@@ -2004,8 +1956,7 @@ void OpDispatchBuilder::VPSLLDQOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template<size_t ElementSize>
void OpDispatchBuilder::PSRAIOp(OpcodeArgs) {
void OpDispatchBuilder::PSRAIOp(OpcodeArgs, size_t ElementSize) {
const uint64_t Shift = Op->Src[1].Literal();
if (Shift == 0) [[unlikely]] {
// Nothing to do, value is already in Dest.
@@ -2019,11 +1970,7 @@ void OpDispatchBuilder::PSRAIOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::PSRAIOp<2>(OpcodeArgs);
template void OpDispatchBuilder::PSRAIOp<4>(OpcodeArgs);
template<size_t ElementSize>
void OpDispatchBuilder::VPSRAIOp(OpcodeArgs) {
void OpDispatchBuilder::VPSRAIOp(OpcodeArgs, size_t ElementSize) {
const uint64_t Shift = Op->Src[1].Literal();
const auto Size = GetDstSize(Op);
const auto Is128Bit = Size == Core::CPUState::XMM_SSE_REG_SIZE;
@@ -2042,9 +1989,6 @@ void OpDispatchBuilder::VPSRAIOp(OpcodeArgs) {
StoreResult(FPRClass, Op, Result, -1);
}
template void OpDispatchBuilder::VPSRAIOp<2>(OpcodeArgs);
template void OpDispatchBuilder::VPSRAIOp<4>(OpcodeArgs);
void OpDispatchBuilder::AVXVariableShiftImpl(OpcodeArgs, IROps IROp) {
const auto DstSize = GetDstSize(Op);
const auto SrcSize = GetSrcSize(Op);