IR.json: Mark TypeDefinition instances as constexpr

Create() is constexpr, so we can also mark the constants as such to
avoid potentially having static constructors.
This commit is contained in:
lioncash committed 2021-11-26 12:23:38 -05:00
1 parent e2e2687a85
commit 25b9bcc652
1 file changed
+65 -65
+65 -65
View File
@@ -1,81 +1,81 @@
{
"Defines": [
"static constexpr uint8_t COND_EQ = 0",
"static constexpr uint8_t COND_NEQ = 1",
"static constexpr uint8_t COND_UGE = 2",
"static constexpr uint8_t COND_ULT = 3",
"static constexpr uint8_t COND_MI = 4",
"static constexpr uint8_t COND_PL = 5",
"static constexpr uint8_t COND_VS = 6",
"static constexpr uint8_t COND_VC = 7",
"static constexpr uint8_t COND_UGT = 8",
"static constexpr uint8_t COND_ULE = 9",
"static constexpr uint8_t COND_SGE = 10",
"static constexpr uint8_t COND_SLT = 11",
"static constexpr uint8_t COND_SGT = 12",
"static constexpr uint8_t COND_SLE = 13",
"constexpr uint8_t COND_EQ = 0",
"constexpr uint8_t COND_NEQ = 1",
"constexpr uint8_t COND_UGE = 2",
"constexpr uint8_t COND_ULT = 3",
"constexpr uint8_t COND_MI = 4",
"constexpr uint8_t COND_PL = 5",
"constexpr uint8_t COND_VS = 6",
"constexpr uint8_t COND_VC = 7",
"constexpr uint8_t COND_UGT = 8",
"constexpr uint8_t COND_ULE = 9",
"constexpr uint8_t COND_SGE = 10",
"constexpr uint8_t COND_SLT = 11",
"constexpr uint8_t COND_SGT = 12",
"constexpr uint8_t COND_SLE = 13",
"static constexpr uint8_t COND_FLU = 16 /* float less or unordred */",
"static constexpr uint8_t COND_FGE = 17 /* float greater or equal */",
"static constexpr uint8_t COND_FLEU = 18 /* float less or equal or unordred */",
"static constexpr uint8_t COND_FGT = 19 /* float greater */",
"static constexpr uint8_t COND_FU = 20 /* float unordred */",
"static constexpr uint8_t COND_FNU = 21 /* float not unordred */",
"constexpr uint8_t COND_FLU = 16 /* float less or unordred */",
"constexpr uint8_t COND_FGE = 17 /* float greater or equal */",
"constexpr uint8_t COND_FLEU = 18 /* float less or equal or unordred */",
"constexpr uint8_t COND_FGT = 19 /* float greater */",
"constexpr uint8_t COND_FU = 20 /* float unordred */",
"constexpr uint8_t COND_FNU = 21 /* float not unordred */",
"static constexpr FEXCore::IR::RegisterClassType GPRClass {0}",
"static constexpr FEXCore::IR::RegisterClassType GPRFixedClass {1}",
"static constexpr FEXCore::IR::RegisterClassType FPRClass {2}",
"static constexpr FEXCore::IR::RegisterClassType FPRFixedClass {3}",
"static constexpr FEXCore::IR::RegisterClassType GPRPairClass {4}",
"static constexpr FEXCore::IR::RegisterClassType ComplexClass {5}",
"static constexpr FEXCore::IR::RegisterClassType InvalidClass {7}",
"constexpr FEXCore::IR::RegisterClassType GPRClass {0}",
"constexpr FEXCore::IR::RegisterClassType GPRFixedClass {1}",
"constexpr FEXCore::IR::RegisterClassType FPRClass {2}",
"constexpr FEXCore::IR::RegisterClassType FPRFixedClass {3}",
"constexpr FEXCore::IR::RegisterClassType GPRPairClass {4}",
"constexpr FEXCore::IR::RegisterClassType ComplexClass {5}",
"constexpr FEXCore::IR::RegisterClassType InvalidClass {7}",
"",
"static constexpr uint8_t InvalidReg {31}",
"constexpr uint8_t InvalidReg {31}",
"",
"static const FEXCore::IR::TypeDefinition i8 {TypeDefinition::Create(1, 0)}",
"static const FEXCore::IR::TypeDefinition i16 {TypeDefinition::Create(2, 0)}",
"static const FEXCore::IR::TypeDefinition i32 {TypeDefinition::Create(4, 0)}",
"static const FEXCore::IR::TypeDefinition i64 {TypeDefinition::Create(8, 0)}",
"static const FEXCore::IR::TypeDefinition i128 {TypeDefinition::Create(16, 0)}",
"constexpr FEXCore::IR::TypeDefinition i8 {TypeDefinition::Create(1, 0)}",
"constexpr FEXCore::IR::TypeDefinition i16 {TypeDefinition::Create(2, 0)}",
"constexpr FEXCore::IR::TypeDefinition i32 {TypeDefinition::Create(4, 0)}",
"constexpr FEXCore::IR::TypeDefinition i64 {TypeDefinition::Create(8, 0)}",
"constexpr FEXCore::IR::TypeDefinition i128 {TypeDefinition::Create(16, 0)}",
"",
"static const FEXCore::IR::TypeDefinition i8v8 {TypeDefinition::Create(1, 8)}",
"static const FEXCore::IR::TypeDefinition i8v16 {TypeDefinition::Create(1, 16)}",
"static const FEXCore::IR::TypeDefinition i16v4 {TypeDefinition::Create(2, 4)}",
"static const FEXCore::IR::TypeDefinition i16v8 {TypeDefinition::Create(2, 8)}",
"static const FEXCore::IR::TypeDefinition i32v2 {TypeDefinition::Create(4, 2)}",
"static const FEXCore::IR::TypeDefinition i32v4 {TypeDefinition::Create(4, 4)}",
"static const FEXCore::IR::TypeDefinition i64v2 {TypeDefinition::Create(8, 2)}",
"constexpr FEXCore::IR::TypeDefinition i8v8 {TypeDefinition::Create(1, 8)}",
"constexpr FEXCore::IR::TypeDefinition i8v16 {TypeDefinition::Create(1, 16)}",
"constexpr FEXCore::IR::TypeDefinition i16v4 {TypeDefinition::Create(2, 4)}",
"constexpr FEXCore::IR::TypeDefinition i16v8 {TypeDefinition::Create(2, 8)}",
"constexpr FEXCore::IR::TypeDefinition i32v2 {TypeDefinition::Create(4, 2)}",
"constexpr FEXCore::IR::TypeDefinition i32v4 {TypeDefinition::Create(4, 4)}",
"constexpr FEXCore::IR::TypeDefinition i64v2 {TypeDefinition::Create(8, 2)}",
"",
"static constexpr uint8_t FCMP_FLAG_EQ = 0",
"static constexpr uint8_t FCMP_FLAG_LT = 1",
"static constexpr uint8_t FCMP_FLAG_UNORDERED = 2",
"constexpr uint8_t FCMP_FLAG_EQ = 0",
"constexpr uint8_t FCMP_FLAG_LT = 1",
"constexpr uint8_t FCMP_FLAG_UNORDERED = 2",
"static constexpr FEXCore::IR::FenceType Fence_Load {0}",
"static constexpr FEXCore::IR::FenceType Fence_Store {1}",
"static constexpr FEXCore::IR::FenceType Fence_LoadStore {2}",
"constexpr FEXCore::IR::FenceType Fence_Load {0}",
"constexpr FEXCore::IR::FenceType Fence_Store {1}",
"constexpr FEXCore::IR::FenceType Fence_LoadStore {2}",
"static constexpr uint8_t ROUND_MODE_NEAREST = 0",
"static constexpr uint8_t ROUND_MODE_NEGATIVE_INFINITY = 1",
"static constexpr uint8_t ROUND_MODE_POSITIVE_INFINITY = 2",
"static constexpr uint8_t ROUND_MODE_TOWARDS_ZERO = 3",
"static constexpr uint8_t ROUND_MODE_FLUSH_TO_ZERO = 1 << 2",
"constexpr uint8_t ROUND_MODE_NEAREST = 0",
"constexpr uint8_t ROUND_MODE_NEGATIVE_INFINITY = 1",
"constexpr uint8_t ROUND_MODE_POSITIVE_INFINITY = 2",
"constexpr uint8_t ROUND_MODE_TOWARDS_ZERO = 3",
"constexpr uint8_t ROUND_MODE_FLUSH_TO_ZERO = 1 << 2",
"static constexpr FEXCore::IR::RoundType Round_Nearest {ROUND_MODE_NEAREST}",
"static constexpr FEXCore::IR::RoundType Round_Negative_Infinity {ROUND_MODE_NEGATIVE_INFINITY}",
"static constexpr FEXCore::IR::RoundType Round_Positive_Infinity {ROUND_MODE_POSITIVE_INFINITY}",
"static constexpr FEXCore::IR::RoundType Round_Towards_Zero {ROUND_MODE_TOWARDS_ZERO} /* Truncate */",
"static constexpr FEXCore::IR::RoundType Round_Host {ROUND_MODE_TOWARDS_ZERO + 1}",
"constexpr FEXCore::IR::RoundType Round_Nearest {ROUND_MODE_NEAREST}",
"constexpr FEXCore::IR::RoundType Round_Negative_Infinity {ROUND_MODE_NEGATIVE_INFINITY}",
"constexpr FEXCore::IR::RoundType Round_Positive_Infinity {ROUND_MODE_POSITIVE_INFINITY}",
"constexpr FEXCore::IR::RoundType Round_Towards_Zero {ROUND_MODE_TOWARDS_ZERO} /* Truncate */",
"constexpr FEXCore::IR::RoundType Round_Host {ROUND_MODE_TOWARDS_ZERO + 1}",
"static constexpr FEXCore::IR::MemOffsetType MEM_OFFSET_SXTX {0};",
"static constexpr FEXCore::IR::MemOffsetType MEM_OFFSET_UXTW {1};",
"static constexpr FEXCore::IR::MemOffsetType MEM_OFFSET_SXTW {2};",
"constexpr FEXCore::IR::MemOffsetType MEM_OFFSET_SXTX {0};",
"constexpr FEXCore::IR::MemOffsetType MEM_OFFSET_UXTW {1};",
"constexpr FEXCore::IR::MemOffsetType MEM_OFFSET_SXTW {2};",
"static constexpr FEXCore::IR::BreakReason Break_Unimplemented {0}",
"static constexpr FEXCore::IR::BreakReason Break_Interrupt {1}",
"static constexpr FEXCore::IR::BreakReason Break_Interrupt3 {2}",
"static constexpr FEXCore::IR::BreakReason Break_Halt {3}",
"static constexpr FEXCore::IR::BreakReason Break_Overflow {4}",
"static constexpr FEXCore::IR::BreakReason Break_InvalidInstruction {5}"
"constexpr FEXCore::IR::BreakReason Break_Unimplemented {0}",
"constexpr FEXCore::IR::BreakReason Break_Interrupt {1}",
"constexpr FEXCore::IR::BreakReason Break_Interrupt3 {2}",
"constexpr FEXCore::IR::BreakReason Break_Halt {3}",
"constexpr FEXCore::IR::BreakReason Break_Overflow {4}",
"constexpr FEXCore::IR::BreakReason Break_InvalidInstruction {5}"
],
"Ops": {