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OpDispatcher: Force a recheck of TF after POPF
The dispatcher/block linker will handle this, but if the instruction following a POPF flag doesn't otherwise trigger one of those the interrupt would be missed.
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@@ -146,6 +146,15 @@ DEF_OP(ExitFunction) {
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} else {
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stp<ARMEmitter::IndexType::PRE>(ARMEmitter::XReg::zr, ARMEmitter::XReg::zr, REG_CALLRET_SP, -0x10);
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}
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} else if (Op->Hint == IR::BranchHint::CheckTF) {
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ARMEmitter::ForwardLabel TFUnset;
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ldrb(TMP1, STATE_PTR(CpuStateFrame, State.flags[X86State::RFLAG_TF_RAW_LOC]));
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cbz(ARMEmitter::Size::i32Bit, TMP1, &TFUnset);
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LoadConstant(ARMEmitter::Size::i64Bit, TMP1, NewRIP);
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str(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, State.rip));
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ldr(TMP2, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.Common.DispatcherLoopTop));
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blr(TMP2);
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Bind(&TFUnset);
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}
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EmitLinkedBranch(NewRIP, Op->Hint == IR::BranchHint::Call);
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@@ -3604,6 +3604,10 @@ void OpDispatchBuilder::POPFOp(OpcodeArgs) {
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Src = _Or(OpSize::i64Bit, Src, Constant(0x202));
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SetPackedRFLAG(false, Src);
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auto NewRIP = GetRelocatedPC(Op);
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ExitFunction(NewRIP, BranchHint::CheckTF);
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BlockSetRIP = true;
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}
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void OpDispatchBuilder::NEGOp(OpcodeArgs) {
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@@ -621,11 +621,7 @@ enum class ShiftType : uint8_t {
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ROR,
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};
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enum class BranchHint : uint8_t {
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None = 0,
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Call,
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Return,
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};
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enum class BranchHint : uint8_t { None = 0, Call, Return, CheckTF };
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// Converts a size stored as an integer in to an OpSize enum.
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