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InstCountCI: Update for vmovd/vmovq optimization
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@@ -1392,22 +1392,20 @@
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]
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},
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"movd mm0, eax": {
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"ExpectedInstructionCount": 3,
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"Optimal": "No",
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"ExpectedInstructionCount": 2,
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"Optimal": "Yes",
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"Comment": "0x0f 0x6e",
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"ExpectedArm64ASM": [
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"ubfx x20, x4, #0, #32",
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"fmov s4, w20",
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"fmov s4, w4",
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"str d4, [x28, #752]"
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]
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},
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"movd mm0, [rax]": {
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"ExpectedInstructionCount": 3,
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"Optimal": "No",
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"ExpectedInstructionCount": 2,
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"Optimal": "Yes",
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"Comment": "0x0f 0x6e",
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"ExpectedArm64ASM": [
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"ldr w20, [x4]",
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"fmov s4, w20",
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"ldr s4, [x4]",
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"str d4, [x28, #752]"
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]
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},
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@@ -1592,13 +1590,12 @@
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]
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},
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"movd [rax], mm0": {
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"ExpectedInstructionCount": 3,
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"Optimal": "No",
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"ExpectedInstructionCount": 2,
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"Optimal": "Yes",
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"Comment": "0x0f 0x7e",
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"ExpectedArm64ASM": [
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"ldr d4, [x28, #752]",
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"mov w20, v4.s[0]",
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"str w20, [x4]"
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"str s4, [x4]"
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]
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},
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"db 0x0f, 0x7f, 0xc1": {
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@@ -490,21 +490,19 @@
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]
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},
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"movd xmm0, dword [rax]": {
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"ExpectedInstructionCount": 2,
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"Optimal": "No",
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"ExpectedInstructionCount": 1,
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"Optimal": "Yes",
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"Comment": "0x66 0x0f 0x6e",
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"ExpectedArm64ASM": [
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"ldr w20, [x4]",
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"fmov s16, w20"
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"ldr s16, [x4]"
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]
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},
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"movd xmm0, eax": {
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"ExpectedInstructionCount": 2,
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"Optimal": "No",
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"ExpectedInstructionCount": 1,
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"Optimal": "Yes",
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"Comment": "0x66 0x0f 0x6e",
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"ExpectedArm64ASM": [
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"ubfx x20, x4, #0, #32",
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"fmov s16, w20"
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"fmov s16, w4"
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]
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},
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"movq xmm0, qword [rax]": {
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@@ -711,21 +709,19 @@
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]
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},
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"movd dword [rax], xmm0": {
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"ExpectedInstructionCount": 2,
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"Optimal": "No",
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"ExpectedInstructionCount": 1,
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"Optimal": "Yes",
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"Comment": "0x66 0x0f 0x7e",
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"ExpectedArm64ASM": [
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"mov w20, v16.s[0]",
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"str w20, [x4]"
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"str s16, [x4]"
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]
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},
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"movq qword [rax], xmm0": {
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"ExpectedInstructionCount": 2,
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"Optimal": "No",
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"ExpectedInstructionCount": 1,
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"Optimal": "Yes",
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"Comment": "0x66 0x0f 0x7e",
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"ExpectedArm64ASM": [
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"mov v4.8b, v16.8b",
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"str d4, [x4]"
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"str d16, [x4]"
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]
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},
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"movdqa [rax], xmm0": {
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@@ -4797,15 +4797,13 @@
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]
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},
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"vmovd xmm0, dword [rax]": {
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"ExpectedInstructionCount": 4,
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"ExpectedInstructionCount": 2,
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"Optimal": "No",
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"Comment": [
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"Map 1 0b01 0x6e 128-bit"
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],
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"ExpectedArm64ASM": [
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"ldr w20, [x4]",
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"fmov s4, w20",
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"mov v4.16b, v4.16b",
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"ldr s4, [x4]",
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"mov z16.d, p7/m, z4.d"
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]
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},
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@@ -5031,7 +5029,7 @@
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]
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},
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"vmovd dword [rax], xmm0": {
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"ExpectedInstructionCount": 6,
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"ExpectedInstructionCount": 5,
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"Optimal": "No",
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"Comment": [
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"Map 1 0b01 0x7e 128-bit"
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@@ -5041,8 +5039,7 @@
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"movi v0.2d, #0x0",
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"mov v0.s[0], v4.s[0]",
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"mov v4.16b, v0.16b",
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"mov w20, v4.s[0]",
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"str w20, [x4]"
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"str s4, [x4]"
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]
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},
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"vmovq qword [rax], xmm0": {
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