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Merge pull request #4387 from Sonicadvance1/analysis_warnings

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IR: Remove some static analysis warnings
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LC authored and GitHub committed 2025-03-05 21:01:46 -05:00
2 parents 711021e24e 66841ce35c
commit 8ed9f8aef5
1 file changed
+6 -6
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FEXCore/Source/Interface/IR/IR.json
+6 -6
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@@ -749,8 +749,8 @@
"HasSideEffects": true,
"DestSize": "RegisterSize",
"EmitValidation": [
"Offset % IR::OpSizeToSize(RegisterSize) == 0",
"RegisterSize == FEXCore::IR::OpSize::i128Bit || RegisterSize == FEXCore::IR::OpSize::i256Bit"
"RegisterSize == FEXCore::IR::OpSize::i128Bit || RegisterSize == FEXCore::IR::OpSize::i256Bit",
"Offset % IR::OpSizeToSize(RegisterSize) == 0"
]
},
"VStoreNonTemporalPair OpSize:#RegisterSize, FPR:$ValueLow, FPR:$ValueHigh, GPR:$Addr, i8:$Offset": {
@@ -761,8 +761,8 @@
"HasSideEffects": true,
"DestSize": "RegisterSize",
"EmitValidation": [
"Offset % IR::OpSizeToSize(RegisterSize) == 0",
"RegisterSize == FEXCore::IR::OpSize::i128Bit"
"RegisterSize == FEXCore::IR::OpSize::i128Bit",
"Offset % IR::OpSizeToSize(RegisterSize) == 0"
]
},
"FPR = VLoadNonTemporal OpSize:#RegisterSize, GPR:$Addr, i8:$Offset": {
@@ -773,8 +773,8 @@
"HasSideEffects": true,
"DestSize": "RegisterSize",
"EmitValidation": [
"Offset % IR::OpSizeToSize(RegisterSize) == 0",
"RegisterSize == FEXCore::IR::OpSize::i128Bit || RegisterSize == FEXCore::IR::OpSize::i256Bit"
"RegisterSize == FEXCore::IR::OpSize::i128Bit || RegisterSize == FEXCore::IR::OpSize::i256Bit",
"Offset % IR::OpSizeToSize(RegisterSize) == 0"
]
}
},