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Merge pull request #2350 from Sonicadvance1/optimize_dispatcher_slightly
Arm64: Merge two loads in to an LDP
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1 file changed
+6
-4
@@ -155,14 +155,16 @@ void Arm64Dispatcher::EmitDispatcher() {
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// Shift the offset by the size of the block cache entry
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add(ARMEmitter::XReg::x0, ARMEmitter::XReg::x0, ARMEmitter::XReg::x1, ARMEmitter::ShiftType::LSL, (int)log2(sizeof(FEXCore::LookupCache::LookupCacheEntry)));
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// Load the guest address first to ensure it maps to the address we are currently at
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// The the full LookupCacheEntry with a single LDP.
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// Check the guest address first to ensure it maps to the address we are currently at.
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// This fixes aliasing problems
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ldr(ARMEmitter::XReg::x1, ARMEmitter::Reg::r0, offsetof(FEXCore::LookupCache::LookupCacheEntry, GuestCode));
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ldp<ARMEmitter::IndexType::OFFSET>(ARMEmitter::XReg::x3, ARMEmitter::XReg::x1, ARMEmitter::Reg::r0, 0);
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// If the guest address doesn't match, Compile the block.
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cmp(ARMEmitter::XReg::x1, RipReg);
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b(ARMEmitter::Condition::CC_NE, &NoBlock);
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// Now load the actual host block to execute if we can
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ldr(ARMEmitter::XReg::x3, ARMEmitter::Reg::r0, offsetof(FEXCore::LookupCache::LookupCacheEntry, HostCode));
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// Check the host address to see if it matches, else compile the block.
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cbz(ARMEmitter::Size::i64Bit, ARMEmitter::Reg::r3, &NoBlock);
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// If we've made it here then we have a real compiled block
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