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Merge pull request #3727 from Sonicadvance1/vaes

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VAES support
This commit is contained in:
Ryan Houdek authored and GitHub committed 2024-06-19 19:22:56 -07:00
2 parents df96bc83cc 643bc10d52
commit d2baef2b36
12 files changed
+255 -37
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FEXCore/Source/Interface/Core/CPUID.cpp
+32 -32
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@@ -637,38 +637,38 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const {
(0 << 30) | // Reserved
(0 << 31); // Reserved
Res.ecx = (1 << 0) | // PREFETCHWT1
(0 << 1) | // AVX512VBMI
(0 << 2) | // Usermode instruction prevention
(0 << 3) | // Protection keys for user mode pages
(0 << 4) | // OS protection keys
(0 << 5) | // waitpkg
(0 << 6) | // AVX512_VBMI2
(0 << 7) | // CET shadow stack
(0 << 8) | // GFNI
(0 << 9) | // VAES
(0 << 10) | // VPCLMULQDQ
(0 << 11) | // AVX512_VNNI
(0 << 12) | // AVX512_BITALG
(0 << 13) | // Intel Total Memory Encryption
(0 << 14) | // AVX512_VPOPCNTDQ
(0 << 15) | // Reserved
(0 << 16) | // 5 Level page tables
(0 << 17) | // MPX MAWAU
(0 << 18) | // MPX MAWAU
(0 << 19) | // MPX MAWAU
(0 << 20) | // MPX MAWAU
(0 << 21) | // MPX MAWAU
(1 << 22) | // RDPID Read Processor ID
(0 << 23) | // Reserved
(0 << 24) | // Reserved
(0 << 25) | // CLDEMOTE
(0 << 26) | // Reserved
(0 << 27) | // MOVDIRI
(0 << 28) | // MOVDIR64B
(0 << 29) | // Reserved
(0 << 30) | // SGX Launch configuration
(0 << 31); // Reserved
Res.ecx = (1 << 0) | // PREFETCHWT1
(0 << 1) | // AVX512VBMI
(0 << 2) | // Usermode instruction prevention
(0 << 3) | // Protection keys for user mode pages
(0 << 4) | // OS protection keys
(0 << 5) | // waitpkg
(0 << 6) | // AVX512_VBMI2
(0 << 7) | // CET shadow stack
(0 << 8) | // GFNI
(CTX->HostFeatures.SupportsAES256 << 9) | // VAES
(0 << 10) | // VPCLMULQDQ
(0 << 11) | // AVX512_VNNI
(0 << 12) | // AVX512_BITALG
(0 << 13) | // Intel Total Memory Encryption
(0 << 14) | // AVX512_VPOPCNTDQ
(0 << 15) | // Reserved
(0 << 16) | // 5 Level page tables
(0 << 17) | // MPX MAWAU
(0 << 18) | // MPX MAWAU
(0 << 19) | // MPX MAWAU
(0 << 20) | // MPX MAWAU
(0 << 21) | // MPX MAWAU
(1 << 22) | // RDPID Read Processor ID
(0 << 23) | // Reserved
(0 << 24) | // Reserved
(0 << 25) | // CLDEMOTE
(0 << 26) | // Reserved
(0 << 27) | // MOVDIRI
(0 << 28) | // MOVDIR64B
(0 << 29) | // Reserved
(0 << 30) | // SGX Launch configuration
(0 << 31); // Reserved
Res.edx = (0 << 0) | // Reserved
(0 << 1) | // Reserved
FEXCore/Source/Interface/Core/HostFeatures.cpp
+5
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@@ -108,11 +108,13 @@ static void OverrideFeatures(HostFeatures* Features) {
Features->SupportsCRC = true;
Features->SupportsSHA = true;
Features->SupportsPMULL_128Bit = true;
Features->SupportsAES256 = true;
} else if (DisableCrypto) {
Features->SupportsAES = false;
Features->SupportsCRC = false;
Features->SupportsSHA = false;
Features->SupportsPMULL_128Bit = false;
Features->SupportsAES256 = false;
}
///< Only force enable SVE256 if SVE is already enabled and ForceSVEWidth is set to >= 256.
@@ -165,6 +167,8 @@ HostFeatures::HostFeatures() {
#endif
SupportsAVX = SupportsSVE256;
SupportsAES256 = SupportsAVX && SupportsAES;
// TODO: AVX2 is currently unsupported. Disable until the remaining features are implemented.
SupportsAVX2 = false;
SupportsBMI1 = true;
@@ -259,6 +263,7 @@ HostFeatures::HostFeatures() {
SupportsBMI2 = X86Features.has(Xbyak::util::Cpu::tBMI2);
SupportsCLWB = X86Features.has(Xbyak::util::Cpu::tCLWB);
SupportsPMULL_128Bit = X86Features.has(Xbyak::util::Cpu::tPCLMULQDQ);
SupportsAES256 = SupportsAES && X86Features.has(Xbyak::util::Cpu::tVAES);
// xbyak doesn't know how to check for CLZero
// First ensure we support a new enough extended CPUID function range
FEXCore/include/FEXCore/Core/HostFeatures.h
+1
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@@ -39,6 +39,7 @@ public:
bool SupportsFlagM2 {};
bool SupportsRPRES {};
bool SupportsPreserveAllABI {};
bool SupportsAES256 {};
// Float exception behaviour
bool SupportsAFP {};
Scripts/InstructionCountParser.py
+2
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@@ -53,6 +53,7 @@ class HostFeatures(Flag) :
FEATURE_FLAGM = (1 << 8)
FEATURE_FLAGM2 = (1 << 9)
FEATURE_CRYPTO = (1 << 10)
FEATURE_AES256 = (1 << 11)
HostFeaturesLookup = {
"SVE128" : HostFeatures.FEATURE_SVE128,
@@ -66,6 +67,7 @@ HostFeaturesLookup = {
"FLAGM" : HostFeatures.FEATURE_FLAGM,
"FLAGM2" : HostFeatures.FEATURE_FLAGM2,
"CRYPTO" : HostFeatures.FEATURE_CRYPTO,
"AES256" : HostFeatures.FEATURE_AES256,
}
def GetHostFeatures(data):
Scripts/json_config_parse.py
+2
View File
@@ -74,6 +74,7 @@ class HostFeatures(Flag) :
FEATURE_CLWB = (1 << 8)
FEATURE_LINUX = (1 << 9)
FEATURE_AVX2 = (1 << 10)
FEATURE_AES256 = (1 << 11)
RegStringLookup = {
"NONE": Regs.REG_NONE,
@@ -147,6 +148,7 @@ HostFeaturesLookup = {
"CLWB" : HostFeatures.FEATURE_CLWB,
"LINUX" : HostFeatures.FEATURE_LINUX,
"AVX2" : HostFeatures.FEATURE_AVX2,
"AES256" : HostFeatures.FEATURE_AES256,
}
def parse_hexstring(s):
Source/Tools/CommonTools/HarnessHelpers.h
+7
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@@ -308,6 +308,7 @@ public:
FEATURE_CLWB = (1 << 8),
FEATURE_LINUX = (1 << 9),
FEATURE_AVX2 = (1 << 10),
FEATURE_AES256 = (1 << 11),
};
bool Requires3DNow() const {
@@ -343,6 +344,9 @@ public:
bool RequiresLinux() const {
return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_LINUX;
}
bool RequiresAES256() const {
return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AES256;
}
private:
FEX_CONFIG_OPT(ConfigDumpGPRs, DUMPGPRS);
@@ -512,6 +516,9 @@ public:
bool RequiresLinux() const {
return Config.RequiresLinux();
}
bool RequiresAES256() const {
return Config.RequiresAES256();
}
private:
constexpr static uint64_t STACK_OFFSET = 0xc000'0000;
Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp
+6 -5
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@@ -264,11 +264,12 @@ int main(int argc, char** argv, char** const envp) {
SupportsAVX = HostFeatures.SupportsAVX;
SupportsAVX2 = HostFeatures.SupportsAVX2;
bool TestUnsupported = (!HostFeatures.Supports3DNow && Loader.Requires3DNow()) || (!HostFeatures.SupportsSSE4A && Loader.RequiresSSE4A()) ||
(!SupportsAVX && Loader.RequiresAVX()) || (!SupportsAVX2 && Loader.RequiresAVX2()) ||
(!HostFeatures.SupportsRAND && Loader.RequiresRAND()) || (!HostFeatures.SupportsSHA && Loader.RequiresSHA()) ||
(!HostFeatures.SupportsCLZERO && Loader.RequiresCLZERO()) || (!HostFeatures.SupportsBMI1 && Loader.RequiresBMI1()) ||
(!HostFeatures.SupportsBMI2 && Loader.RequiresBMI2()) || (!HostFeatures.SupportsCLWB && Loader.RequiresCLWB());
bool TestUnsupported = (!HostFeatures.Supports3DNow && Loader.Requires3DNow()) ||
(!HostFeatures.SupportsSSE4A && Loader.RequiresSSE4A()) || (!SupportsAVX && Loader.RequiresAVX()) ||
(!SupportsAVX2 && Loader.RequiresAVX2()) || (!HostFeatures.SupportsRAND && Loader.RequiresRAND()) ||
(!HostFeatures.SupportsSHA && Loader.RequiresSHA()) || (!HostFeatures.SupportsCLZERO && Loader.RequiresCLZERO()) ||
(!HostFeatures.SupportsBMI1 && Loader.RequiresBMI1()) || (!HostFeatures.SupportsBMI2 && Loader.RequiresBMI2()) ||
(!HostFeatures.SupportsCLWB && Loader.RequiresCLWB()) || (!HostFeatures.SupportsAES256 && Loader.RequiresAES256());
#ifdef _WIN32
TestUnsupported |= Loader.RequiresLinux();
unittests/ASM/Disabled_Tests_Simulator
+4
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@@ -10,6 +10,10 @@ Test_VEX/vaesdeclast.asm
Test_VEX/vaesenc.asm
Test_VEX/vaesenclast.asm
Test_VEX/vaesimc.asm
Test_VEX/vaesdec256.asm
Test_VEX/vaesdeclast256.asm
Test_VEX/vaesenc256.asm
Test_VEX/vaesenclast256.asm
Test_VEX/vaeskeygenassist.asm
# PCMUL considered to be part of crypto operations. Simulator doesn't support this.
unittests/ASM/VEX/vaesdec256.asm
+49
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@@ -0,0 +1,49 @@
%ifdef CONFIG
{
"HostFeatures": ["AES256"],
"RegData": {
"XMM1": ["0x7A1FC5A0A07A1FC5", "0xC5A07A1F1FC5A07A", "0x7a1fc5a0a07a1fc5", "0xc5a07a1f1fc5a07a"],
"XMM2": ["0x85E03A5F5F85E03A", "0x3A5F85E0E03A5F85", "0x85e03a5f5f85e03a", "0x3a5f85e0e03a5f85"],
"XMM3": ["0x7A1FC5A1A07A1FC4", "0xC5A07A1E1FC5A07B", "0x7a1fc5a1a07a1fc4", "0xc5a07a1e1fc5a07b"],
"XMM4": ["0x85E03A5FA07A1FC5", "0xC5A07A1EE03A5F85", "0x85e03a5fa07a1fc5", "0xc5a07a1ee03a5f85"]
}
}
%endif
lea rdx, [rel .data]
vmovaps ymm0, [rdx + 32 * 4]
vaesdec ymm1, ymm0, [rdx + 32 * 0]
vaesdec ymm2, ymm0, [rdx + 32 * 1]
vaesdec ymm3, ymm0, [rdx + 32 * 2]
vaesdec ymm4, ymm0, [rdx + 32 * 3]
hlt
align 32
.data:
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0x0202020202020202
dq 0x0303030303030303
dq 0x0202020202020202
dq 0x0303030303030303
unittests/ASM/VEX/vaesdeclast256.asm
+49
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@@ -0,0 +1,49 @@
%ifdef CONFIG
{
"HostFeatures": ["AES256"],
"RegData": {
"XMM1": ["0xD5D56A6A6AD5D56A", "0x6A6AD5D5D56A6AD5", "0xd5d56a6a6ad5d56a", "0x6a6ad5d5d56a6ad5"],
"XMM2": ["0x2A2A9595952A2A95", "0x95952A2A2A95952A", "0x2a2a9595952a2a95", "0x95952a2a2a95952a"],
"XMM3": ["0xD5D56A6B6AD5D56B", "0x6A6AD5D4D56A6AD4", "0xd5d56a6b6ad5d56b", "0x6a6ad5d4d56a6ad4"],
"XMM4": ["0x2A2A95956AD5D56A", "0x6A6AD5D42A95952A", "0x2a2a95956ad5d56a", "0x6a6ad5d42a95952a"]
}
}
%endif
lea rdx, [rel .data]
vmovaps ymm0, [rdx + 32 * 4]
vaesdeclast ymm1, ymm0, [rdx + 32 * 0]
vaesdeclast ymm2, ymm0, [rdx + 32 * 1]
vaesdeclast ymm3, ymm0, [rdx + 32 * 2]
vaesdeclast ymm4, ymm0, [rdx + 32 * 3]
hlt
align 32
.data:
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0x0202020202020202
dq 0x0303030303030303
dq 0x0202020202020202
dq 0x0303030303030303
unittests/ASM/VEX/vaesenc256.asm
+49
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@@ -0,0 +1,49 @@
%ifdef CONFIG
{
"HostFeatures": ["AES256"],
"RegData": {
"XMM1": ["0x77637B6F637B6F77", "0x7B6F77636F77637B", "0x77637b6f637b6f77", "0x7b6f77636f77637b"],
"XMM2": ["0x889C84909C849088", "0x8490889C90889C84", "0x889c84909c849088", "0x8490889c90889c84"],
"XMM3": ["0x77637B6E637B6F76", "0x7B6F77626F77637A", "0x77637b6e637b6f76", "0x7b6f77626f77637a"],
"XMM4": ["0x889C8490637B6F77", "0x7B6F776290889C84", "0x889c8490637b6f77", "0x7b6f776290889c84"]
}
}
%endif
lea rdx, [rel .data]
vmovaps ymm0, [rdx + 32 * 4]
vaesenc ymm1, ymm0, [rdx + 32 * 0]
vaesenc ymm2, ymm0, [rdx + 32 * 1]
vaesenc ymm3, ymm0, [rdx + 32 * 2]
vaesenc ymm4, ymm0, [rdx + 32 * 3]
hlt
align 32
.data:
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0x0202020202020202
dq 0x0303030303030303
dq 0x0202020202020202
dq 0x0303030303030303
unittests/ASM/VEX/vaesenclast256.asm
+49
View File
@@ -0,0 +1,49 @@
%ifdef CONFIG
{
"HostFeatures": ["AES256"],
"RegData": {
"XMM1": ["0x777B7B777B7B7777", "0x7B77777B77777B7B", "0x777b7b777b7b7777", "0x7b77777b77777b7b"],
"XMM2": ["0x8884848884848888", "0x8488888488888484", "0x8884848884848888", "0x8488888488888484"],
"XMM3": ["0x777B7B767B7B7776", "0x7B77777A77777B7A", "0x777b7b767b7b7776", "0x7b77777a77777b7a"],
"XMM4": ["0x888484887B7B7777", "0x7B77777A88888484", "0x888484887b7b7777", "0x7b77777a88888484"]
}
}
%endif
lea rdx, [rel .data]
vmovaps ymm0, [rdx + 32 * 4]
vaesenclast ymm1, ymm0, [rdx + 32 * 0]
vaesenclast ymm2, ymm0, [rdx + 32 * 1]
vaesenclast ymm3, ymm0, [rdx + 32 * 2]
vaesenclast ymm4, ymm0, [rdx + 32 * 3]
hlt
align 32
.data:
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0x0000000000000000
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0xFFFFFFFFFFFFFFFF
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0x0000000100000001
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0xFFFFFFFF00000000
dq 0x00000001FFFFFFFF
dq 0x0202020202020202
dq 0x0303030303030303
dq 0x0202020202020202
dq 0x0303030303030303