OpcodeDispatcher: Handle PEXT

External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp

@@ -2449,6 +2449,14 @@ void OpDispatchBuilder::MULX(OpcodeArgs) {
   StoreResult(GPRClass, Op, Op->Dest, ResultHi, -1);
 }
 
+void OpDispatchBuilder::PEXT(OpcodeArgs) {
+  auto* Input = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, -1);
+  auto* Mask = LoadSource(GPRClass, Op, Op->Src[1], Op->Flags, -1);
+  auto Result = _PExt(Input, Mask);
+
+  StoreResult(GPRClass, Op, Op->Dest, Result, -1);
+}
+
 void OpDispatchBuilder::ADXOp(OpcodeArgs) {
   // Handles ADCX and ADOX
 
@@ -6178,6 +6186,7 @@ constexpr uint16_t PF_F2 = 3;
 
     {OPD(2, 0b00, 0xF2), 1, &OpDispatchBuilder::ANDNBMIOp},
     {OPD(2, 0b00, 0xF5), 1, &OpDispatchBuilder::BZHI},
+    {OPD(2, 0b10, 0xF5), 1, &OpDispatchBuilder::PEXT},
     {OPD(2, 0b11, 0xF6), 1, &OpDispatchBuilder::MULX},
     {OPD(2, 0b00, 0xF7), 1, &OpDispatchBuilder::BEXTRBMIOp},
     {OPD(2, 0b01, 0xF7), 1, &OpDispatchBuilder::BMI2Shift},

External/FEXCore/Source/Interface/Core/OpcodeDispatcher.h

@@ -338,6 +338,7 @@ public:
   void BMI2Shift(OpcodeArgs);
   void BZHI(OpcodeArgs);
   void MULX(OpcodeArgs);
+  void PEXT(OpcodeArgs);
   void RORX(OpcodeArgs);
 
   // ADX Ops

External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp

@@ -394,7 +394,8 @@ void InitializeVEXTables() {
     {OPD(2, 0b11, 0xF3), 1, X86InstInfo{"", TYPE_VEX_GROUP_17, FLAGS_NONE, 0, nullptr}}, // VEX Group 17
 
     {OPD(2, 0b00, 0xF5), 1, X86InstInfo{"BZHI", TYPE_INST, FLAGS_MODRM | FLAGS_VEX_2ND_SRC, 0, nullptr}},
-    {OPD(2, 0b01, 0xF5), 1, X86InstInfo{"PEXT", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
+    // AMD reference manual is incorrect. PEXT actually maps to 0b10, not 0b01.
+    {OPD(2, 0b10, 0xF5), 1, X86InstInfo{"PEXT", TYPE_INST, FLAGS_MODRM | FLAGS_VEX_1ST_SRC, 0, nullptr}},
     {OPD(2, 0b11, 0xF5), 1, X86InstInfo{"PDEP", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
 
     {OPD(2, 0b11, 0xF6), 1, X86InstInfo{"MULX", TYPE_INST, FLAGS_MODRM | FLAGS_VEX_1ST_SRC, 0, nullptr}},

unittests/ASM/VEX/pext.asm

@@ -0,0 +1,24 @@
+%ifdef CONFIG
+{
+  "RegData": {
+      "RAX": "0x12345678",
+      "RBX": "0xFF00FFF0",
+      "RCX": "0x00012567",
+      "RDX": "0x1234567812345678",
+      "RSI": "0xFF00FF00FF00FF00",
+      "RDI": "0x12561256"
+  }
+}
+%endif
+
+; 32-bit
+mov eax, 0x12345678
+mov ebx, 0xFF00FFF0
+pext ecx, eax, ebx
+
+; 64-bit
+mov rdx, 0x1234567812345678
+mov rsi, 0xFF00FF00FF00FF00
+pext rdi, rdx, rsi
+
+hlt