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https://github.com/FEX-Emu/FEX.git
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Fixes RIP literal sign extending on 32bit
RIP Literal isn't actually RIP literal on 32bit, it is RIP absolute. 64bit treats the 32bit as a signed offset, while 32bit treats it as a 32bit unsigned offset
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6741b9d23f
commit
dd49a04809
3 files changed
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-6
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@@ -424,7 +424,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op)
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Bytes -= 4;
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NonGPR.TypeRIPLiteral.Type = DecodedOperand::TYPE_RIP_RELATIVE;
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NonGPR.TypeRIPLiteral.Literal = Literal;
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NonGPR.TypeRIPLiteral.Literal.u = Literal;
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}
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else {
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// Register-direct addressing
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@@ -4505,11 +4505,11 @@ OrderedNode *OpDispatchBuilder::LoadSource_WithOpSize(FEXCore::IR::RegisterClass
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}
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else if (Operand.TypeNone.Type == FEXCore::X86Tables::DecodedOperand::TYPE_RIP_RELATIVE) {
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if (CTX->Config.Is64BitMode) {
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Src = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal + Op->PC + Op->InstSize);
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Src = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal.s + Op->PC + Op->InstSize);
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}
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else {
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// 32bit this isn't RIP relative but instead absolute
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Src = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal);
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Src = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal.u);
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}
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LoadableType = true;
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@@ -4637,11 +4637,11 @@ void OpDispatchBuilder::StoreResult_WithOpSize(FEXCore::IR::RegisterClassType Cl
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}
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else if (Operand.TypeNone.Type == FEXCore::X86Tables::DecodedOperand::TYPE_RIP_RELATIVE) {
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if (CTX->Config.Is64BitMode) {
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MemStoreDst = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal + Op->PC + Op->InstSize);
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MemStoreDst = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal.s + Op->PC + Op->InstSize);
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}
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else {
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// 32bit this isn't RIP relative but instead absolute
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MemStoreDst = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal);
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MemStoreDst = _Constant(GPRSize * 8, Operand.TypeRIPLiteral.Literal.u);
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}
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MemStore = true;
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}
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+4
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@@ -128,7 +128,10 @@ union DecodedOperand {
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struct {
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uint8_t Type;
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int32_t Literal;
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union {
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int32_t s;
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uint32_t u;
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} Literal;
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} TypeRIPLiteral;
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struct {
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