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Actually enable LLVM optimization passes in the LLVM JIT

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We were using whatever was the LLVM default before.
This commit is contained in:
Ryan Houdek authored and Stefanos Kornilios Mitsis Poiitidis committed 2020-03-06 07:55:45 +02:00
1 parent 9e132e107a
commit ee53b70bfe
1 file changed
+18 -8
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Source/Interface/Core/LLVMJIT/LLVMCore.cpp
+18 -8
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@@ -1850,20 +1850,30 @@ void* FEXCore::CPU::LLVMJITCore::CompileCode(FEXCore::IR::IRListView<true> const
}
}
llvm::ModulePassManager FPM;
llvm::ModuleAnalysisManager FAM;
llvm::ModulePassManager MPM;
llvm::LoopAnalysisManager LAM;
llvm::FunctionAnalysisManager FAM;
llvm::CGSCCAnalysisManager CGAM;
llvm::ModuleAnalysisManager MAM;
llvm::PassBuilder passBuilder(LLVMTarget);
passBuilder.registerModuleAnalyses(FAM);
passBuilder.buildModuleSimplificationPipeline(
llvm::PassBuilder::OptimizationLevel::O3,
llvm::PassBuilder::ThinLTOPhase::None);
passBuilder.registerLoopAnalyses(LAM);
passBuilder.registerFunctionAnalyses(FAM);
passBuilder.registerCGSCCAnalyses(CGAM);
passBuilder.registerModuleAnalyses(MAM);
passBuilder.crossRegisterProxies(LAM, FAM, CGAM, MAM);
MPM = passBuilder.buildModuleOptimizationPipeline(
llvm::PassBuilder::OptimizationLevel::O3);
raw_ostream &Out = outs();
if (CTX->Config.LLVM_PrinterPass)
{
FPM.addPass(PrintModulePass(Out));
MPM.addPass(PrintModulePass(Out));
}
if (CTX->Config.LLVM_IRValidation)
@@ -1871,7 +1881,7 @@ void* FEXCore::CPU::LLVMJITCore::CompileCode(FEXCore::IR::IRListView<true> const
verifyModule(*FunctionModule, &Out);
}
FPM.run(*FunctionModule, FAM);
MPM.run(*FunctionModule, MAM);
Engine->finalizeObject();
JITState.Functions.emplace_back(Engine);